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- DefinitionBlock ("./dsdt.aml", "SSDT", 1, "APPLE ", "CpuPm", 0x00001000)
- {
- External (\_PR_.CPU7, DeviceObj)
- External (\_PR_.CPU6, DeviceObj)
- External (\_PR_.CPU5, DeviceObj)
- External (\_PR_.CPU4, DeviceObj)
- External (\_PR_.CPU3, DeviceObj)
- External (\_PR_.CPU2, DeviceObj)
- External (\_PR_.CPU1, DeviceObj)
- External (\_PR_.CPU0, DeviceObj)
- Scope (\_PR.CPU0)
- {
- Name (VERS, "Core i7 3.9 GHz Maximum Clock SSDT based on Greggen\'s at tonymacx86.com 2012-05-16")
- Name (APSN, 0x04)
- Name (APSS, Package (0x18)
- {
- Package (0x06)
- {
- 0x0F3C,
- Zero,
- 0x0A,
- 0x0A,
- 0x2700,
- 0x2700
- },
- Package (0x06)
- {
- 0x0ED8,
- Zero,
- 0x0A,
- 0x0A,
- 0x2600,
- 0x2600
- },
- Package (0x06)
- {
- 0x0E74,
- Zero,
- 0x0A,
- 0x0A,
- 0x2500,
- 0x2500
- },
- Package (0x06)
- {
- 0x0E10,
- Zero,
- 0x0A,
- 0x0A,
- 0x2400,
- 0x2400
- },
- Package (0x06)
- {
- 0x0DAC,
- Zero,
- 0x0A,
- 0x0A,
- 0x2300,
- 0x2300
- },
- Package (0x06)
- {
- 0x0D48,
- Zero,
- 0x0A,
- 0x0A,
- 0x2200,
- 0x2200
- },
- Package (0x06)
- {
- 0x0CE4,
- Zero,
- 0x0A,
- 0x0A,
- 0x2100,
- 0x2100
- },
- Package (0x06)
- {
- 0x0C80,
- Zero,
- 0x0A,
- 0x0A,
- 0x2000,
- 0x2000
- },
- Package (0x06)
- {
- 0x0C1C,
- Zero,
- 0x0A,
- 0x0A,
- 0x1F00,
- 0x1F00
- },
- Package (0x06)
- {
- 0x0BB8,
- Zero,
- 0x0A,
- 0x0A,
- 0x1E00,
- 0x1E00
- },
- Package (0x06)
- {
- 0x0B54,
- Zero,
- 0x0A,
- 0x0A,
- 0x1D00,
- 0x1D00
- },
- Package (0x06)
- {
- 0x0AF0,
- Zero,
- 0x0A,
- 0x0A,
- 0x1C00,
- 0x1C00
- },
- Package (0x06)
- {
- 0x0A8C,
- Zero,
- 0x0A,
- 0x0A,
- 0x1B00,
- 0x1B00
- },
- Package (0x06)
- {
- 0x0A28,
- Zero,
- 0x0A,
- 0x0A,
- 0x1A00,
- 0x1A00
- },
- Package (0x06)
- {
- 0x09C4,
- Zero,
- 0x0A,
- 0x0A,
- 0x1900,
- 0x1900
- },
- Package (0x06)
- {
- 0x0960,
- Zero,
- 0x0A,
- 0x0A,
- 0x1800,
- 0x1800
- },
- Package (0x06)
- {
- 0x08FC,
- Zero,
- 0x0A,
- 0x0A,
- 0x1700,
- 0x1700
- },
- Package (0x06)
- {
- 0x0898,
- Zero,
- 0x0A,
- 0x0A,
- 0x1600,
- 0x1600
- },
- Package (0x06)
- {
- 0x0834,
- Zero,
- 0x0A,
- 0x0A,
- 0x1500,
- 0x1500
- },
- Package (0x06)
- {
- 0x07D0,
- Zero,
- 0x0A,
- 0x0A,
- 0x1400,
- 0x1400
- },
- Package (0x06)
- {
- 0x076C,
- Zero,
- 0x0A,
- 0x0A,
- 0x1300,
- 0x1300
- },
- Package (0x06)
- {
- 0x0708,
- Zero,
- 0x0A,
- 0x0A,
- 0x1200,
- 0x1200
- },
- Package (0x06)
- {
- 0x06A4,
- Zero,
- 0x0A,
- 0x0A,
- 0x1100,
- 0x1100
- },
- Package (0x06)
- {
- 0x0640,
- Zero,
- 0x0A,
- 0x0A,
- 0x1000,
- 0x1000
- }
- })
- Method (ACST, 0, NotSerialized)
- {
- Return (Package (0x06)
- {
- One,
- 0x04,
- Package (0x04)
- {
- ResourceTemplate ()
- {
- Register (FFixedHW,
- 0x01, // Bit Width
- 0x02, // Bit Offset
- 0x0000000000000000, // Address
- 0x01, // Access Size
- )
- },
- One,
- 0x03,
- 0x03E8
- },
- Package (0x04)
- {
- ResourceTemplate ()
- {
- Register (FFixedHW,
- 0x01, // Bit Width
- 0x02, // Bit Offset
- 0x0000000000000010, // Address
- 0x03, // Access Size
- )
- },
- 0x03,
- 0xCD,
- 0x01F4
- },
- Package (0x04)
- {
- ResourceTemplate ()
- {
- Register (FFixedHW,
- 0x01, // Bit Width
- 0x02, // Bit Offset
- 0x0000000000000020, // Address
- 0x03, // Access Size
- )
- },
- 0x06,
- 0xF5,
- 0x015E
- },
- Package (0x04)
- {
- ResourceTemplate ()
- {
- Register (FFixedHW,
- 0x01, // Bit Width
- 0x02, // Bit Offset
- 0x0000000000000030, // Address
- 0x03, // Access Size
- )
- },
- 0x07,
- 0xF5,
- 0xC8
- }
- })
- }
- }
- Scope (\_PR.CPU1)
- {
- Method (APSS, 0, NotSerialized)
- {
- Return (\_PR.CPU0.APSS)
- }
- }
- Scope (\_PR.CPU2)
- {
- Method (APSS, 0, NotSerialized)
- {
- Return (\_PR.CPU0.APSS)
- }
- }
- Scope (\_PR.CPU3)
- {
- Method (APSS, 0, NotSerialized)
- {
- Return (\_PR.CPU0.APSS)
- }
- }
- Scope (\_PR.CPU4)
- {
- Method (APSS, 0, NotSerialized)
- {
- Return (\_PR.CPU0.APSS)
- }
- }
- Scope (\_PR.CPU5)
- {
- Method (APSS, 0, NotSerialized)
- {
- Return (\_PR.CPU0.APSS)
- }
- }
- Scope (\_PR.CPU6)
- {
- Method (APSS, 0, NotSerialized)
- {
- Return (\_PR.CPU0.APSS)
- }
- }
- Scope (\_PR.CPU7)
- {
- Method (APSS, 0, NotSerialized)
- {
- Return (\_PR.CPU0.APSS)
- }
- }
- }
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