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linux-3.18.5-kirkwood-tld-1.patch

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  1. diff -Naur a/arch/arm/boot/dts/kirkwood-goflexhome.dts b/arch/arm/boot/dts/kirkwood-goflexhome.dts
  2. --- a/arch/arm/boot/dts/kirkwood-goflexhome.dts 1969-12-31 16:00:00.000000000 -0800
  3. +++ b/arch/arm/boot/dts/kirkwood-goflexhome.dts 2015-02-05 14:04:01.000000000 -0800
  4. @@ -0,0 +1,127 @@
  5. +/dts-v1/;
  6. +
  7. +#include "kirkwood.dtsi"
  8. +#include "kirkwood-6281.dtsi"
  9. +
  10. +/ {
  11. + model = "Seagate GoFlex Home";
  12. + compatible = "seagate,goflexhome", "marvell,kirkwood-88f6281", "marvell,kirkwood";
  13. +
  14. + memory {
  15. + device_type = "memory";
  16. + reg = <0x00000000 0x8000000>;
  17. + };
  18. +
  19. + chosen {
  20. + bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
  21. + stdout-path = &uart0;
  22. + };
  23. +
  24. + ocp@f1000000 {
  25. + pinctrl: pin-controller@10000 {
  26. + pmx_usb_power_enable: pmx-usb-power-enable {
  27. + marvell,pins = "mpp29";
  28. + marvell,function = "gpio";
  29. + };
  30. + pmx_led_white: pmx-led_white {
  31. + marvell,pins = "mpp40";
  32. + marvell,function = "gpio";
  33. + };
  34. + pmx_led_green: pmx-led_green {
  35. + marvell,pins = "mpp46";
  36. + marvell,function = "gpio";
  37. + };
  38. + pmx_led_orange: pmx-led_orange {
  39. + marvell,pins = "mpp47";
  40. + marvell,function = "gpio";
  41. + };
  42. + };
  43. + serial@12000 {
  44. + status = "ok";
  45. + };
  46. +
  47. + sata@80000 {
  48. + status = "okay";
  49. + nr-ports = <1>;
  50. + };
  51. +
  52. + };
  53. + gpio-leds {
  54. + compatible = "gpio-leds";
  55. + pinctrl-0 = < &pmx_led_orange
  56. + &pmx_led_green
  57. + &pmx_led_white
  58. + >;
  59. + pinctrl-names = "default";
  60. +
  61. + health {
  62. + label = "status:green:health";
  63. + gpios = <&gpio1 14 GPIO_ACTIVE_LOW>;
  64. + default-state = "keep";
  65. + };
  66. + fault {
  67. + label = "status:orange:fault";
  68. + gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
  69. + };
  70. + misc {
  71. + label = "status:white:misc";
  72. + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  73. + linux,default-trigger = "ide-disk";
  74. + };
  75. + };
  76. + regulators {
  77. + compatible = "simple-bus";
  78. + #address-cells = <1>;
  79. + #size-cells = <0>;
  80. + pinctrl-0 = <&pmx_usb_power_enable>;
  81. + pinctrl-names = "default";
  82. +
  83. + usb_power: regulator@1 {
  84. + compatible = "regulator-fixed";
  85. + reg = <1>;
  86. + regulator-name = "USB Power";
  87. + regulator-min-microvolt = <5000000>;
  88. + regulator-max-microvolt = <5000000>;
  89. + enable-active-high;
  90. + regulator-always-on;
  91. + regulator-boot-on;
  92. + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
  93. + };
  94. + };
  95. +};
  96. +
  97. +&nand {
  98. + chip-delay = <40>;
  99. + status = "okay";
  100. +
  101. + partition@0 {
  102. + label = "u-boot";
  103. + reg = <0x0000000 0x100000>;
  104. + read-only;
  105. + };
  106. +
  107. + partition@100000 {
  108. + label = "uImage";
  109. + reg = <0x0100000 0x0600000>;
  110. + };
  111. +
  112. + partition@0600000 {
  113. + label = "root";
  114. + reg = <0x0600000 0xd800000>;
  115. + };
  116. +};
  117. +
  118. +&mdio {
  119. + status = "okay";
  120. +
  121. + ethphy0: ethernet-phy@0 {
  122. + reg = <0>;
  123. + };
  124. +};
  125. +
  126. +&eth0 {
  127. + status = "okay";
  128. + ethernet0-port@0 {
  129. + phy-handle = <&ethphy0>;
  130. + };
  131. +};
  132. diff -Naur a/arch/arm/boot/dts/kirkwood-nsa325.dts b/arch/arm/boot/dts/kirkwood-nsa325.dts
  133. --- a/arch/arm/boot/dts/kirkwood-nsa325.dts 1969-12-31 16:00:00.000000000 -0800
  134. +++ b/arch/arm/boot/dts/kirkwood-nsa325.dts 2015-02-05 14:04:01.000000000 -0800
  135. @@ -0,0 +1,358 @@
  136. +/*
  137. + * Device tree file for Zyxel NSA 325 NAS
  138. + */
  139. +
  140. +/dts-v1/;
  141. +
  142. +#include "kirkwood.dtsi"
  143. +#include "kirkwood-6282.dtsi"
  144. +
  145. +/ {
  146. + model = "ZyXEL NSA325";
  147. + compatible = "zyxel,nsa325", "marvell,kirkwood-88f6282", "marvell,kirkwood";
  148. +
  149. + memory {
  150. + device_type = "memory";
  151. + reg = <0x00000000 0x20000000>;
  152. + };
  153. +
  154. + chosen {
  155. + bootargs = "console=ttyS0,115200";
  156. + stdout-path = &uart0;
  157. + };
  158. +
  159. + mbus {
  160. + pcie-controller {
  161. + status = "okay";
  162. +
  163. + pcie@1,0 {
  164. + status = "okay";
  165. + };
  166. + };
  167. + };
  168. +
  169. + ocp@f1000000 {
  170. + pinctrl: pin-controller@10000 {
  171. + pinctrl-names = "default";
  172. +
  173. + pmx_led_sata2_green: pmx-led-sata2-green {
  174. + marvell,pins = "mpp12";
  175. + marvell,function = "gpo";
  176. + };
  177. +
  178. + pmx_led_sata2_red: pmx-led-sata2-red {
  179. + marvell,pins = "mpp13";
  180. + marvell,function = "gpio";
  181. + };
  182. +
  183. + pmx_mcu_data: pmx-mcu-data {
  184. + marvell,pins = "mpp14";
  185. + marvell,function = "gpio";
  186. + };
  187. +
  188. + pmx_led_usb_green: pmx-led-usb-green {
  189. + marvell,pins = "mpp15";
  190. + marvell,function = "gpio";
  191. + };
  192. +
  193. + pmx_mcu_clk: pmx-mcu-clk {
  194. + marvell,pins = "mpp16";
  195. + marvell,function = "gpio";
  196. + };
  197. +
  198. + pmx_mcu_act: pmx-mcu-act {
  199. + marvell,pins = "mpp17";
  200. + marvell,function = "gpio";
  201. + };
  202. +
  203. + pmx_usb_power_off: pmx-usb-power-off {
  204. + marvell,pins = "mpp21";
  205. + marvell,function = "gpio";
  206. + };
  207. +
  208. + pmx_led_sys_green: pmx-led-sys-green {
  209. + marvell,pins = "mpp28";
  210. + marvell,function = "gpio";
  211. + };
  212. +
  213. + pmx_led_sys_orange: pmx-led-sys-orange {
  214. + marvell,pins = "mpp29";
  215. + marvell,function = "gpio";
  216. + };
  217. +
  218. + pmx_btn_reset: pmx-btn-reset {
  219. + marvell,pins = "mpp36";
  220. + marvell,function = "gpio";
  221. + };
  222. +
  223. + pmx_btn_copy: pmx-btn-copy {
  224. + marvell,pins = "mpp37";
  225. + marvell,function = "gpio";
  226. + };
  227. +
  228. + pmx_led_copy_green: pmx-led-copy-green {
  229. + marvell,pins = "mpp39";
  230. + marvell,function = "gpio";
  231. + };
  232. +
  233. + pmx_led_copy_red: pmx-led-copy-red {
  234. + marvell,pins = "mpp40";
  235. + marvell,function = "gpio";
  236. + };
  237. +
  238. + pmx_led_sata1_green: pmx-led-sata1-green {
  239. + marvell,pins = "mpp41";
  240. + marvell,function = "gpio";
  241. + };
  242. +
  243. + pmx_led_sata1_red: pmx-led-sata1-red {
  244. + marvell,pins = "mpp42";
  245. + marvell,function = "gpio";
  246. + };
  247. +
  248. + pmx_beeper: pmx-beeper {
  249. + marvell,pins = "mpp44";
  250. + marvell,function = "gpio";
  251. + };
  252. +
  253. + pmx_btn_power: pmx-btn-power {
  254. + marvell,pins = "mpp46";
  255. + marvell,function = "gpio";
  256. + };
  257. +
  258. + pmx_pwr_sata1: pmx-pwr-sata1 {
  259. + marvell,pins = "mpp47";
  260. + marvell,function = "gpio";
  261. + };
  262. +
  263. + pmx_pwr_off: pmx-pwr-off {
  264. + marvell,pins = "mpp48";
  265. + marvell,function = "gpio";
  266. + };
  267. + };
  268. +
  269. + /* This board uses the pcf8563 RTC instead of the SoC RTC */
  270. + rtc@10300 {
  271. + status = "disabled";
  272. + };
  273. +
  274. + i2c@11000 {
  275. + status = "okay";
  276. +
  277. + pcf8563: pcf8563@51 {
  278. + compatible = "nxp,pcf8563";
  279. + reg = <0x51>;
  280. + };
  281. + };
  282. +
  283. + serial@12000 {
  284. + status = "ok";
  285. + };
  286. +
  287. + sata@80000 {
  288. + status = "okay";
  289. + nr-ports = <2>;
  290. + };
  291. + };
  292. +
  293. + gpio_keys {
  294. + compatible = "gpio-keys";
  295. + #address-cells = <1>;
  296. + #size-cells = <0>;
  297. + pinctrl-0 = <&pmx_btn_power &pmx_btn_copy &pmx_btn_reset>;
  298. + pinctrl-names = "default";
  299. +
  300. + button@1 {
  301. + label = "Power Button";
  302. + linux,code = <KEY_POWER>;
  303. + gpios = <&gpio1 14 GPIO_ACTIVE_HIGH>;
  304. + };
  305. +
  306. + button@2 {
  307. + label = "Copy Button";
  308. + linux,code = <KEY_COPY>;
  309. + gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
  310. + };
  311. +
  312. + button@3 {
  313. + label = "Reset Button";
  314. + linux,code = <KEY_RESTART>;
  315. + gpios = <&gpio1 4 GPIO_ACTIVE_LOW>;
  316. + };
  317. + };
  318. +
  319. + gpio-leds {
  320. + compatible = "gpio-leds";
  321. + pinctrl-0 = <&pmx_led_sata1_green &pmx_led_sata1_red
  322. + &pmx_led_sata2_green &pmx_led_sata2_red
  323. + &pmx_led_sys_green &pmx_led_sys_orange
  324. + &pmx_led_copy_green &pmx_led_copy_red
  325. + &pmx_led_usb_green>;
  326. + pinctrl-names = "default";
  327. +
  328. + green-sata2 {
  329. + label = "nsa325:green:sata2";
  330. + gpios = <&gpio0 12 GPIO_ACTIVE_HIGH>;
  331. + };
  332. +
  333. + red-sata2 {
  334. + label = "nsa325:red:sata2";
  335. + gpios = <&gpio0 13 GPIO_ACTIVE_HIGH>;
  336. + };
  337. +
  338. + green-usb {
  339. + label = "nsa325:green:usb";
  340. + gpios = <&gpio0 15 GPIO_ACTIVE_HIGH>;
  341. + };
  342. +
  343. + green-sys {
  344. + label = "nsa325:green:sys";
  345. + gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
  346. + linux,default-trigger = "default-on";
  347. + };
  348. +
  349. + orange-sys {
  350. + label = "nsa325:orange:sys";
  351. + gpios = <&gpio0 29 GPIO_ACTIVE_HIGH>;
  352. + linux,default-trigger = "cpu0";
  353. + };
  354. +
  355. + green-copy {
  356. + label = "nsa325:green:copy";
  357. + gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>;
  358. + };
  359. +
  360. + red-copy {
  361. + label = "nsa325:red:copy";
  362. + gpios = <&gpio1 8 GPIO_ACTIVE_HIGH>;
  363. + };
  364. +
  365. + green-sata1 {
  366. + label = "nsa325:green:sata1";
  367. + gpios = <&gpio1 9 GPIO_ACTIVE_HIGH>;
  368. + linux,default-trigger = "sata-disk";
  369. + };
  370. +
  371. + red-sata1 {
  372. + label = "nsa325:red:sata1";
  373. + gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>;
  374. + };
  375. + };
  376. +
  377. + gpio_poweroff {
  378. + compatible = "gpio-poweroff";
  379. + pinctrl-0 = <&pmx_pwr_off>;
  380. + pinctrl-names = "default";
  381. + gpios = <&gpio1 16 GPIO_ACTIVE_HIGH>;
  382. + };
  383. +
  384. + regulators {
  385. + compatible = "simple-bus";
  386. + #address-cells = <1>;
  387. + #size-cells = <0>;
  388. + pinctrl-0 = <&pmx_mcu_data &pmx_usb_power_off &pmx_pwr_sata1>;
  389. + pinctrl-names = "default";
  390. +
  391. +/*
  392. + watchdog_data: regulator@1 {
  393. + compatible = "regulator-fixed";
  394. + regulator-name = "Watchdog Data";
  395. + regulator-min-microvolt = <5000000>;
  396. + regulator-max-microvolt = <5000000>;
  397. + regulator-always-on;
  398. + regulator-boot-on;
  399. + gpio = <&gpio0 14 GPIO_ACTIVE_HIGH>;
  400. + };
  401. +*/
  402. +
  403. + usb_power: regulator@2 {
  404. + compatible = "regulator-fixed";
  405. + reg = <2>;
  406. + regulator-name = "USB Power";
  407. + regulator-min-microvolt = <5000000>;
  408. + regulator-max-microvolt = <5000000>;
  409. + regulator-always-on;
  410. + regulator-boot-on;
  411. + enable-active-high;
  412. + gpio = <&gpio0 21 GPIO_ACTIVE_HIGH>;
  413. + };
  414. +
  415. + sata1_power: regulator@3 {
  416. + compatible = "regulator-fixed";
  417. + reg = <3>;
  418. + regulator-name = "SATA1 Power";
  419. + regulator-min-microvolt = <5000000>;
  420. + regulator-max-microvolt = <5000000>;
  421. + regulator-always-on;
  422. + regulator-boot-on;
  423. + enable-active-high;
  424. + gpio = <&gpio1 15 GPIO_ACTIVE_HIGH>;
  425. + };
  426. + };
  427. +};
  428. +
  429. +&nand {
  430. + status = "okay";
  431. + chip-delay = <35>;
  432. +
  433. + partition@0 {
  434. + label = "uboot";
  435. + reg = <0x0000000 0x0100000>;
  436. + };
  437. +
  438. + partition@100000 {
  439. + label = "uboot_env";
  440. + reg = <0x0100000 0x0080000>;
  441. + };
  442. +
  443. + partition@180000 {
  444. + label = "key_store";
  445. + reg = <0x0180000 0x0080000>;
  446. + };
  447. +
  448. + partition@200000 {
  449. + label = "info";
  450. + reg = <0x0200000 0x0080000>;
  451. + };
  452. +
  453. + partition@280000 {
  454. + label = "etc";
  455. + reg = <0x0280000 0x0a00000>;
  456. + };
  457. +
  458. + partition@c80000 {
  459. + label = "kernel_1";
  460. + reg = <0x0c80000 0x0a00000>;
  461. + };
  462. +
  463. + partition@1680000 {
  464. + label = "rootfs1";
  465. + reg = <0x1680000 0x2fc0000>;
  466. + };
  467. +
  468. + partition@4640000 {
  469. + label = "kernel_2";
  470. + reg = <0x4640000 0x0a00000>;
  471. + };
  472. +
  473. + partition@5040000 {
  474. + label = "rootfs2";
  475. + reg = <0x5040000 0x2fc0000>;
  476. + };
  477. +};
  478. +
  479. +&mdio {
  480. + status = "okay";
  481. +
  482. + ethphy0: ethernet-phy@1 {
  483. + reg = <1>;
  484. + };
  485. +};
  486. +
  487. +&eth0 {
  488. + status = "okay";
  489. +
  490. + ethernet0-port@0 {
  491. + phy-handle = <&ethphy0>;
  492. + };
  493. +};
  494. diff -Naur a/arch/arm/boot/dts/kirkwood-pogo_e02.dts b/arch/arm/boot/dts/kirkwood-pogo_e02.dts
  495. --- a/arch/arm/boot/dts/kirkwood-pogo_e02.dts 1969-12-31 16:00:00.000000000 -0800
  496. +++ b/arch/arm/boot/dts/kirkwood-pogo_e02.dts 2015-02-05 14:04:01.000000000 -0800
  497. @@ -0,0 +1,117 @@
  498. +/dts-v1/;
  499. +
  500. +#include "kirkwood.dtsi"
  501. +#include "kirkwood-6281.dtsi"
  502. +
  503. +/ {
  504. + model = "CloudEngines Pogoplug E02";
  505. + compatible = "cloudengines,pogo_e02", "marvell,kirkwood-88f6281", "marvell,kirkwood";
  506. +
  507. + memory {
  508. + device_type = "memory";
  509. + reg = <0x00000000 0x10000000>;
  510. + };
  511. +
  512. + chosen {
  513. + bootargs = "console=ttyS0,115200n8 earlyprintk root=/dev/sda1 rootdelay=10";
  514. + stdout-path = &uart0;
  515. + };
  516. +
  517. + ocp@f1000000 {
  518. + pinctrl: pin-controller@10000 {
  519. + pmx_usb_power_enable: pmx-usb-power-enable {
  520. + marvell,pins = "mpp29";
  521. + marvell,function = "gpio";
  522. + };
  523. + pmx_led_green: pmx-led_green {
  524. + marvell,pins = "mpp48";
  525. + marvell,function = "gpio";
  526. + };
  527. + pmx_led_orange: pmx-led_orange {
  528. + marvell,pins = "mpp49";
  529. + marvell,function = "gpio";
  530. + };
  531. + };
  532. + serial@12000 {
  533. + status = "ok";
  534. + };
  535. +
  536. + };
  537. + gpio-leds {
  538. + compatible = "gpio-leds";
  539. + pinctrl-0 = < &pmx_led_orange
  540. + &pmx_led_green
  541. + >;
  542. + pinctrl-names = "default";
  543. +
  544. + health {
  545. + label = "status:green:health";
  546. + gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
  547. + default-state = "keep";
  548. + };
  549. + fault {
  550. + label = "status:orange:fault";
  551. + gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
  552. + };
  553. + };
  554. + regulators {
  555. + compatible = "simple-bus";
  556. + #address-cells = <1>;
  557. + #size-cells = <0>;
  558. + pinctrl-0 = <&pmx_usb_power_enable>;
  559. + pinctrl-names = "default";
  560. +
  561. + usb_power: regulator@1 {
  562. + compatible = "regulator-fixed";
  563. + reg = <1>;
  564. + regulator-name = "USB Power";
  565. + regulator-min-microvolt = <5000000>;
  566. + regulator-max-microvolt = <5000000>;
  567. + enable-active-high;
  568. + regulator-always-on;
  569. + regulator-boot-on;
  570. + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
  571. + };
  572. + };
  573. +};
  574. +
  575. +&nand {
  576. + chip-delay = <25>;
  577. + status = "okay";
  578. +
  579. + partition@0 {
  580. + label = "u-boot";
  581. + reg = <0x0000000 0x100000>;
  582. + read-only;
  583. + };
  584. +
  585. + partition@100000 {
  586. + label = "uImage";
  587. + reg = <0x0100000 0x0500000>;
  588. + };
  589. +
  590. + partition@0500000 {
  591. + label = "pogoplug";
  592. + reg = <0x0500000 0x2500000>;
  593. + };
  594. +
  595. + partition@2500000 {
  596. + label = "root";
  597. + reg = <0x2500000 0x6c00000>;
  598. + };
  599. +};
  600. +
  601. +&mdio {
  602. + status = "okay";
  603. +
  604. + ethphy0: ethernet-phy@0 {
  605. + reg = <0>;
  606. + };
  607. +};
  608. +
  609. +&eth0 {
  610. + status = "okay";
  611. + ethernet0-port@0 {
  612. + phy-handle = <&ethphy0>;
  613. + };
  614. +};
  615. diff -Naur a/arch/arm/boot/dts/kirkwood-pogoplug_v4.dts b/arch/arm/boot/dts/kirkwood-pogoplug_v4.dts
  616. --- a/arch/arm/boot/dts/kirkwood-pogoplug_v4.dts 1969-12-31 16:00:00.000000000 -0800
  617. +++ b/arch/arm/boot/dts/kirkwood-pogoplug_v4.dts 2015-02-05 14:04:01.000000000 -0800
  618. @@ -0,0 +1,164 @@
  619. +/dts-v1/;
  620. +
  621. +#include "kirkwood.dtsi"
  622. +#include "kirkwood-6192.dtsi"
  623. +
  624. +/ {
  625. + model = "Pogoplug v4";
  626. + compatible = "cloudengines,pogoplug-v4", "cloudengines,pogoplug-mobile", "marvell,kirkwood-88f6192", "marvell,kirkwood";
  627. +
  628. + memory {
  629. + device_type = "memory";
  630. + reg = <0x00000000 0x8000000>;
  631. + };
  632. +
  633. + chosen {
  634. + bootargs = "console=ttyS0,115200";
  635. + stdout-path = &uart0;
  636. + };
  637. +
  638. + mbus {
  639. + pcie-controller {
  640. + status = "okay";
  641. +
  642. + pcie@1,0 {
  643. + status = "okay";
  644. + };
  645. + };
  646. + };
  647. +
  648. + ocp@f1000000 {
  649. + pinctrl: pin-controller@10000 {
  650. + pmx_led_green: pmx-led-green {
  651. + marvell,pins = "mpp22";
  652. + marvell,function = "gpio";
  653. + };
  654. + pmx_led_red: pmx-led-red {
  655. + marvell,pins = "mpp24";
  656. + marvell,function = "gpio";
  657. + };
  658. + pmx_button_eject: pmx-button-eject {
  659. + marvell,pins = "mpp29";
  660. + marvell,function = "gpio";
  661. + };
  662. + /*pmx_usb_power_enable: pmx-usb-power-enable {
  663. + marvell,pins = "mpp29";
  664. + marvell,function = "gpio";
  665. + };*/
  666. + };
  667. +
  668. + serial@12000 {
  669. + status = "ok";
  670. + };
  671. +
  672. + sata@80000 {
  673. + status = "okay";
  674. + nr-ports = <1>;
  675. + phys = <&sata_phy0>;
  676. + phy-names = "port0";
  677. + };
  678. +
  679. + mvsdio@90000 {
  680. + pinctrl-0 = <&pmx_sdio>;
  681. + pinctrl-names = "default";
  682. + status = "okay";
  683. + cd-gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
  684. + /* No WP GPIO */
  685. + };
  686. + };
  687. +
  688. + gpio-leds {
  689. + compatible = "gpio-leds";
  690. + pinctrl-0 = <&pmx_led_red &pmx_led_green>;
  691. + pinctrl-names = "default";
  692. +
  693. + health {
  694. + label = "status:green:health";
  695. + gpios = <&gpio0 22 GPIO_ACTIVE_LOW>;
  696. + default-state = "keep";
  697. + };
  698. + fault {
  699. + label = "status:red:fault";
  700. + gpios = <&gpio0 24 GPIO_ACTIVE_LOW>;
  701. + };
  702. + };
  703. +
  704. + gpio_keys {
  705. + compatible = "gpio-keys";
  706. + #address-cells = <1>;
  707. + #size-cells = <0>;
  708. + pinctrl-0 = <&pmx_button_eject>;
  709. + pinctrl-names = "default";
  710. +
  711. + button@1 {
  712. + label = "Eject Button";
  713. + linux,code = <KEY_EJECTCD>;
  714. + gpios = <&gpio0 29 GPIO_ACTIVE_LOW>;
  715. + };
  716. + };
  717. +
  718. + /*regulators {
  719. + compatible = "simple-bus";
  720. + #address-cells = <1>;
  721. + #size-cells = <0>;
  722. + pinctrl-0 = <&pmx_usb_power_enable>;
  723. + pinctrl-names = "default";
  724. +
  725. + usb_power: regulator@1 {
  726. + compatible = "regulator-fixed";
  727. + reg = <1>;
  728. + regulator-name = "USB Power";
  729. + regulator-min-microvolt = <5000000>;
  730. + regulator-max-microvolt = <5000000>;
  731. + enable-active-high;
  732. + regulator-always-on;
  733. + regulator-boot-on;
  734. + gpio = <&gpio0 29 GPIO_ACTIVE_HIGH>;
  735. + };
  736. + };*/
  737. +};
  738. +
  739. +&nand {
  740. + status = "okay";
  741. +
  742. + partition@0 {
  743. + label = "u-boot";
  744. + reg = <0x0000000 0x200000>;
  745. + read-only;
  746. + };
  747. +
  748. + partition@200000 {
  749. + label = "uImage";
  750. + reg = <0x200000 0x300000>;
  751. + };
  752. +
  753. + partition@500000 {
  754. + label = "uImage2";
  755. + reg = <0x500000 0x300000>;
  756. + };
  757. +
  758. + partition@800000 {
  759. + label = "failsafe";
  760. + reg = <0x800000 0x800000>;
  761. + };
  762. +
  763. + partition@1000000 {
  764. + label = "root";
  765. + reg = <0x1000000 0x7000000>;
  766. + };
  767. +};
  768. +
  769. +&mdio {
  770. + status = "okay";
  771. +
  772. + ethphy0: ethernet-phy@0 {
  773. + reg = <0>;
  774. + };
  775. +};
  776. +
  777. +&eth0 {
  778. + status = "okay";
  779. + ethernet0-port@0 {
  780. + phy-handle = <&ethphy0>;
  781. + };
  782. +};
  783. diff -Naur a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile
  784. --- a/arch/arm/boot/dts/Makefile 2015-01-29 17:41:03.000000000 -0800
  785. +++ b/arch/arm/boot/dts/Makefile 2015-02-05 14:20:01.000000000 -0800
  786. @@ -120,6 +120,7 @@
  787. kirkwood-ds411.dtb \
  788. kirkwood-ds411j.dtb \
  789. kirkwood-ds411slim.dtb \
  790. + kirkwood-goflexhome.dtb \
  791. kirkwood-goflexnet.dtb \
  792. kirkwood-guruplug-server-plus.dtb \
  793. kirkwood-ib62x0.dtb \
  794. @@ -142,11 +143,15 @@
  795. kirkwood-ns2mini.dtb \
  796. kirkwood-nsa310.dtb \
  797. kirkwood-nsa310a.dtb \
  798. + kirkwood-nsa320.dtb \
  799. + kirkwood-nsa325.dtb \
  800. kirkwood-openblocks_a6.dtb \
  801. kirkwood-openblocks_a7.dtb \
  802. kirkwood-openrd-base.dtb \
  803. kirkwood-openrd-client.dtb \
  804. kirkwood-openrd-ultimate.dtb \
  805. + kirkwood-pogo_e02.dtb \
  806. + kirkwood-pogoplug_v4.dtb \
  807. kirkwood-rd88f6192.dtb \
  808. kirkwood-rd88f6281-z0.dtb \
  809. kirkwood-rd88f6281-a.dtb \
  810. diff -Naur a/arch/arm/plat-orion/common.c b/arch/arm/plat-orion/common.c
  811. --- a/arch/arm/plat-orion/common.c 2015-01-29 17:41:03.000000000 -0800
  812. +++ b/arch/arm/plat-orion/common.c 2015-02-05 14:04:01.000000000 -0800
  813. @@ -257,7 +257,9 @@
  814. /*****************************************************************************
  815. * GE00
  816. ****************************************************************************/
  817. -static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data;
  818. +struct mv643xx_eth_shared_platform_data orion_ge00_shared_data = {
  819. + .tx_csum_limit = 1600,
  820. +};
  821.  
  822. static struct resource orion_ge00_shared_resources[] = {
  823. {
  824. diff -Naur a/arch/arm/tools/mach-types b/arch/arm/tools/mach-types
  825. --- a/arch/arm/tools/mach-types 2015-01-29 17:41:03.000000000 -0800
  826. +++ b/arch/arm/tools/mach-types 2015-02-05 14:04:01.000000000 -0800
  827. @@ -1007,3 +1007,12 @@
  828. eukrea_cpuimx28sd MACH_EUKREA_CPUIMX28SD EUKREA_CPUIMX28SD 4573
  829. domotab MACH_DOMOTAB DOMOTAB 4574
  830. pfla03 MACH_PFLA03 PFLA03 4575
  831. +goflexnet MACH_GOFLEXNET GOFLEXNET 3089
  832. +goflexhome MACH_GOFLEXHOME GOFLEXHOME 3338
  833. +iconnect MACH_ICONNECT ICONNECT 2870
  834. +pogo_e02 MACH_POGO_E02 POGO_E02 3542
  835. +nsa320 MACH_NSA320 NSA320 3956
  836. +pogoplugv4 MACH_POGOPLUGV4 POGOPLUGV4 3960
  837. +pogoplugv3 MACH_POGOPLUGV3 POGOPLUGV3 3973
  838. +pogoplugv3pci MACH_POGOPLUGV3PCI POGOPLUGV3PCI 3976
  839. +nsa310 MACH_NSA310 NSA310 4022
  840. diff -Naur a/drivers/ata/sata_mv.c b/drivers/ata/sata_mv.c
  841. --- a/drivers/ata/sata_mv.c 2015-01-29 17:41:03.000000000 -0800
  842. +++ b/drivers/ata/sata_mv.c 2015-02-05 14:04:01.000000000 -0800
  843. @@ -1,6 +1,7 @@
  844. /*
  845. * sata_mv.c - Marvell SATA support
  846. *
  847. + * Copyright 2013 bodhi <mibodhi@gmail.com>
  848. * Copyright 2008-2009: Marvell Corporation, all rights reserved.
  849. * Copyright 2005: EMC Corporation, all rights reserved.
  850. * Copyright 2005 Red Hat, Inc. All rights reserved.
  851. @@ -72,6 +73,7 @@
  852. #include <scsi/scsi_cmnd.h>
  853. #include <scsi/scsi_device.h>
  854. #include <linux/libata.h>
  855. +#include <linux/leds.h>
  856.  
  857. #define DRV_NAME "sata_mv"
  858. #define DRV_VERSION "1.28"
  859. @@ -1170,6 +1172,8 @@
  860. {
  861. int want_ncq = (protocol == ATA_PROT_NCQ);
  862.  
  863. + ledtrig_ide_activity(ap->port_no);
  864. +
  865. if (pp->pp_flags & MV_PP_FLAG_EDMA_EN) {
  866. int using_ncq = ((pp->pp_flags & MV_PP_FLAG_NCQ_EN) != 0);
  867. if (want_ncq != using_ncq)
  868. diff -Naur a/drivers/hwmon/Kconfig b/drivers/hwmon/Kconfig
  869. --- a/drivers/hwmon/Kconfig 2015-01-29 17:41:03.000000000 -0800
  870. +++ b/drivers/hwmon/Kconfig 2015-02-05 14:04:01.000000000 -0800
  871. @@ -1680,6 +1680,19 @@
  872. This driver provides support for the Ultra45 workstation environmental
  873. sensors.
  874.  
  875. +config SENSORS_NSA3XX
  876. + tristate "ZyXEL NSA3xx fan speed and temperature sensors"
  877. + depends on (MACH_NSA310 || MACH_NSA320) && GPIOLIB
  878. + help
  879. + If you say yes here you get support for hardware monitoring
  880. + for the ZyXEL NSA3XX Media Servers.
  881. +
  882. + The sensor data is taken from a Holtek HT46R065 microcontroller
  883. + connected to GPIO lines.
  884. +
  885. + This driver can also be built as a module. If so, the module
  886. + will be called nsa3xx-hwmon.
  887. +
  888. if ACPI
  889.  
  890. comment "ACPI drivers"
  891. diff -Naur a/drivers/hwmon/Makefile b/drivers/hwmon/Makefile
  892. --- a/drivers/hwmon/Makefile 2015-01-29 17:41:03.000000000 -0800
  893. +++ b/drivers/hwmon/Makefile 2015-02-05 14:04:01.000000000 -0800
  894. @@ -114,6 +114,7 @@
  895. obj-$(CONFIG_SENSORS_MAX6650) += max6650.o
  896. obj-$(CONFIG_SENSORS_MAX6697) += max6697.o
  897. obj-$(CONFIG_SENSORS_MC13783_ADC)+= mc13783-adc.o
  898. +obj-$(CONFIG_SENSORS_NSA3XX) += nsa3xx-hwmon.o
  899. obj-$(CONFIG_SENSORS_MCP3021) += mcp3021.o
  900. obj-$(CONFIG_SENSORS_MENF21BMC_HWMON) += menf21bmc_hwmon.o
  901. obj-$(CONFIG_SENSORS_NCT6683) += nct6683.o
  902. diff -Naur a/drivers/hwmon/nsa3xx-hwmon.c b/drivers/hwmon/nsa3xx-hwmon.c
  903. --- a/drivers/hwmon/nsa3xx-hwmon.c 1969-12-31 16:00:00.000000000 -0800
  904. +++ b/drivers/hwmon/nsa3xx-hwmon.c 2015-02-05 14:04:01.000000000 -0800
  905. @@ -0,0 +1,251 @@
  906. +/*
  907. + * drivers/hwmon/nsa3xx-hwmon.c
  908. + *
  909. + * ZyXEL NSA3xx Media Servers
  910. + * hardware monitoring
  911. + *
  912. + * Copyright (C) 2012 Peter Schildmann <linux@schildmann.info>
  913. + *
  914. + * This program is free software; you can redistribute it and/or modify it
  915. + * under the terms of the GNU General Public License v2 as published by the
  916. + * Free Software Foundation.
  917. + *
  918. + * This program is distributed in the hope that it will be useful, but WITHOUT
  919. + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  920. + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  921. + * more details.
  922. + *
  923. + * You should have received a copy of the GNU General Public License along with
  924. + * this program; if not, write to the Free Software Foundation, Inc.,
  925. + * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301, USA
  926. + */
  927. +
  928. +#include <linux/module.h>
  929. +#include <linux/mutex.h>
  930. +#include <linux/platform_device.h>
  931. +#include <linux/err.h>
  932. +#include <linux/gpio.h>
  933. +#include <linux/hwmon.h>
  934. +#include <linux/hwmon-sysfs.h>
  935. +#include <linux/nsa3xx-hwmon.h>
  936. +#include <linux/slab.h>
  937. +#include <linux/jiffies.h>
  938. +#include <linux/delay.h>
  939. +#include <asm/delay.h>
  940. +
  941. +#define MAGIC_NUMBER 0x55
  942. +
  943. +struct nsa3xx_hwmon {
  944. + struct platform_device *pdev;
  945. + struct device *classdev;
  946. + struct mutex update_lock; /* lock GPIO operations */
  947. + unsigned long last_updated; /* jiffies */
  948. + unsigned long mcu_data;
  949. +};
  950. +
  951. +enum nsa3xx_inputs {
  952. + NSA3XX_FAN = 1,
  953. + NSA3XX_TEMP = 0,
  954. +};
  955. +
  956. +static const char *nsa3xx_input_names[] = {
  957. + [NSA3XX_FAN] = "Chassis Fan",
  958. + [NSA3XX_TEMP] = "System Temperature",
  959. +};
  960. +
  961. +static unsigned long nsa3xx_hwmon_update(struct device *dev)
  962. +{
  963. + int i;
  964. + unsigned long mcu_data;
  965. + struct nsa3xx_hwmon *hwmon = dev_get_drvdata(dev);
  966. + struct nsa3xx_hwmon_platform_data *pdata = hwmon->pdev->dev.platform_data;
  967. +
  968. + mutex_lock(&hwmon->update_lock);
  969. +
  970. + mcu_data = hwmon->mcu_data;
  971. +
  972. + if (time_after(jiffies, hwmon->last_updated + (3 * HZ)) || mcu_data == 0) {
  973. + dev_dbg(dev, "Reading MCU data\n");
  974. +
  975. + gpio_set_value(pdata->act_pin, 0);
  976. + msleep(100);
  977. +
  978. + for (i = 31; i >= 0; i--) {
  979. + gpio_set_value(pdata->clk_pin, 0);
  980. + udelay(100);
  981. +
  982. + gpio_set_value(pdata->clk_pin, 1);
  983. + udelay(100);
  984. +
  985. + mcu_data |= gpio_get_value(pdata->data_pin) ? (1 << i) : 0;
  986. + }
  987. +
  988. + gpio_set_value(pdata->act_pin, 1);
  989. +
  990. + if ((mcu_data & 0xff000000) != (MAGIC_NUMBER << 24)) {
  991. + dev_err(dev, "Failed to read MCU data\n");
  992. + mcu_data = 0;
  993. + }
  994. +
  995. + hwmon->mcu_data = mcu_data;
  996. + hwmon->last_updated = jiffies;
  997. + }
  998. +
  999. + mutex_unlock(&hwmon->update_lock);
  1000. +
  1001. + return mcu_data;
  1002. +}
  1003. +
  1004. +static ssize_t show_name(struct device *dev,
  1005. + struct device_attribute *attr, char *buf)
  1006. +{
  1007. + return sprintf(buf, "nsa3xx\n");
  1008. +}
  1009. +
  1010. +static ssize_t show_label(struct device *dev,
  1011. + struct device_attribute *attr, char *buf)
  1012. +{
  1013. + int channel = to_sensor_dev_attr(attr)->index;
  1014. + return sprintf(buf, "%s\n", nsa3xx_input_names[channel]);
  1015. +}
  1016. +
  1017. +static ssize_t show_value(struct device *dev,
  1018. + struct device_attribute *attr, char *buf)
  1019. +{
  1020. + int channel = to_sensor_dev_attr(attr)->index;
  1021. + unsigned long mcu_data = nsa3xx_hwmon_update(dev);
  1022. + unsigned long value = 0;
  1023. + switch(channel) {
  1024. + case NSA3XX_TEMP:
  1025. + value = (mcu_data & 0xffff) * 100;
  1026. + break;
  1027. + case NSA3XX_FAN:
  1028. + value = ((mcu_data & 0xff0000) >> 16) * 100;
  1029. + break;
  1030. + }
  1031. + return sprintf(buf, "%lu\n", value);
  1032. +}
  1033. +
  1034. +static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
  1035. +static SENSOR_DEVICE_ATTR(temp1_label, S_IRUGO, show_label, NULL, NSA3XX_TEMP);
  1036. +static SENSOR_DEVICE_ATTR(temp1_input, S_IRUGO, show_value, NULL, NSA3XX_TEMP);
  1037. +static SENSOR_DEVICE_ATTR(fan1_label, S_IRUGO, show_label, NULL, NSA3XX_FAN);
  1038. +static SENSOR_DEVICE_ATTR(fan1_input, S_IRUGO, show_value, NULL, NSA3XX_FAN);
  1039. +
  1040. +static struct attribute *nsa3xx_attributes[] = {
  1041. + &dev_attr_name.attr,
  1042. + &sensor_dev_attr_temp1_label.dev_attr.attr,
  1043. + &sensor_dev_attr_temp1_input.dev_attr.attr,
  1044. + &sensor_dev_attr_fan1_label.dev_attr.attr,
  1045. + &sensor_dev_attr_fan1_input.dev_attr.attr,
  1046. + NULL
  1047. +};
  1048. +
  1049. +static const struct attribute_group nsa3xx_attr_group = {
  1050. + .attrs = nsa3xx_attributes,
  1051. +};
  1052. +
  1053. +static int nsa3xx_hwmon_request_gpios(struct nsa3xx_hwmon_platform_data *pdata)
  1054. +{
  1055. + int ret;
  1056. +
  1057. + if ((ret = gpio_request(pdata->act_pin, "act pin")))
  1058. + return ret;
  1059. +
  1060. + if ((ret = gpio_request(pdata->clk_pin, "clk pin")))
  1061. + return ret;
  1062. +
  1063. + if ((ret = gpio_request(pdata->data_pin, "data pin")))
  1064. + return ret;
  1065. +
  1066. + if ((ret = gpio_direction_output(pdata->act_pin, 1)))
  1067. + return ret;
  1068. +
  1069. + if ((ret = gpio_direction_output(pdata->clk_pin, 1)))
  1070. + return ret;
  1071. +
  1072. + if ((ret = gpio_direction_input(pdata->data_pin)))
  1073. + return ret;
  1074. +
  1075. + return 0;
  1076. +}
  1077. +
  1078. +static void nsa3xx_hwmon_free_gpios(struct nsa3xx_hwmon_platform_data *pdata)
  1079. +{
  1080. + gpio_free(pdata->act_pin);
  1081. + gpio_free(pdata->clk_pin);
  1082. + gpio_free(pdata->data_pin);
  1083. +}
  1084. +
  1085. +static int nsa3xx_hwmon_probe(struct platform_device *pdev)
  1086. +{
  1087. + int ret;
  1088. + struct nsa3xx_hwmon *hwmon;
  1089. + struct nsa3xx_hwmon_platform_data *pdata = pdev->dev.platform_data;
  1090. +
  1091. + hwmon = kzalloc(sizeof(struct nsa3xx_hwmon), GFP_KERNEL);
  1092. + if (!hwmon)
  1093. + return -ENOMEM;
  1094. +
  1095. + platform_set_drvdata(pdev, hwmon);
  1096. + hwmon->pdev = pdev;
  1097. + hwmon->mcu_data = 0;
  1098. + mutex_init(&hwmon->update_lock);
  1099. +
  1100. + ret = sysfs_create_group(&pdev->dev.kobj, &nsa3xx_attr_group);
  1101. + if (ret)
  1102. + goto err;
  1103. +
  1104. + hwmon->classdev = hwmon_device_register(&pdev->dev);
  1105. + if (IS_ERR(hwmon->classdev)) {
  1106. + ret = PTR_ERR(hwmon->classdev);
  1107. + goto err_sysfs;
  1108. + }
  1109. +
  1110. + ret = nsa3xx_hwmon_request_gpios(pdata);
  1111. + if (ret)
  1112. + goto err_free_gpio;
  1113. +
  1114. + dev_info(&pdev->dev, "initialized\n");
  1115. +
  1116. + return 0;
  1117. +
  1118. +err_free_gpio:
  1119. + nsa3xx_hwmon_free_gpios(pdata);
  1120. + hwmon_device_unregister(hwmon->classdev);
  1121. +err_sysfs:
  1122. + sysfs_remove_group(&pdev->dev.kobj, &nsa3xx_attr_group);
  1123. +err:
  1124. + platform_set_drvdata(pdev, NULL);
  1125. + kfree(hwmon);
  1126. + return ret;
  1127. +}
  1128. +
  1129. +static int nsa3xx_hwmon_remove(struct platform_device *pdev)
  1130. +{
  1131. + struct nsa3xx_hwmon *hwmon = platform_get_drvdata(pdev);
  1132. +
  1133. + nsa3xx_hwmon_free_gpios(pdev->dev.platform_data);
  1134. + hwmon_device_unregister(hwmon->classdev);
  1135. + sysfs_remove_group(&pdev->dev.kobj, &nsa3xx_attr_group);
  1136. + platform_set_drvdata(pdev, NULL);
  1137. + kfree(hwmon);
  1138. +
  1139. + return 0;
  1140. +}
  1141. +
  1142. +static struct platform_driver nsa3xx_hwmon_driver = {
  1143. + .probe = nsa3xx_hwmon_probe,
  1144. + .remove = nsa3xx_hwmon_remove,
  1145. + .driver = {
  1146. + .name = "nsa3xx-hwmon",
  1147. + .owner = THIS_MODULE,
  1148. + },
  1149. +};
  1150. +
  1151. +module_platform_driver(nsa3xx_hwmon_driver);
  1152. +
  1153. +MODULE_AUTHOR("Peter Schildmann <linux@schildmann.info>");
  1154. +MODULE_DESCRIPTION("NSA3XX Hardware Monitoring");
  1155. +MODULE_LICENSE("GPL");
  1156. +MODULE_ALIAS("platform:nsa3xx-hwmon");
  1157. diff -Naur a/drivers/leds/Kconfig b/drivers/leds/Kconfig
  1158. --- a/drivers/leds/Kconfig 2015-01-29 17:41:03.000000000 -0800
  1159. +++ b/drivers/leds/Kconfig 2015-02-05 14:04:01.000000000 -0800
  1160. @@ -505,6 +505,106 @@
  1161. This option enabled support for the LEDs on the ARM Versatile
  1162. and RealView boards. Say Y to enabled these.
  1163.  
  1164. +config LEDS_TRIGGERS
  1165. + bool "LED Trigger support"
  1166. + depends on LEDS_CLASS
  1167. + help
  1168. + This option enables trigger support for the leds class.
  1169. + These triggers allow kernel events to drive the LEDs and can
  1170. + be configured via sysfs. If unsure, say Y.
  1171. +
  1172. +
  1173. + config LEDS_TRIGGER_TIMER
  1174. + tristate "LED Timer Trigger"
  1175. + depends on LEDS_TRIGGERS
  1176. + help
  1177. + This allows LEDs to be controlled by a programmable timer
  1178. + via sysfs. Some LED hardware can be programmed to start
  1179. + blinking the LED without any further software interaction.
  1180. + For more details read Documentation/leds/leds-class.txt.
  1181. +
  1182. + If unsure, say Y.
  1183. +
  1184. + config LEDS_TRIGGER_ONESHOT
  1185. + tristate "LED One-shot Trigger"
  1186. + depends on LEDS_TRIGGERS
  1187. + help
  1188. + This allows LEDs to blink in one-shot pulses with parameters
  1189. + controlled via sysfs. It's useful to notify the user on
  1190. + sporadic events, when there are no clear begin and end trap points,
  1191. + or on dense events, where this blinks the LED at constant rate if
  1192. + rearmed continuously.
  1193. +
  1194. + It also shows how to use the led_blink_set_oneshot() function.
  1195. +
  1196. + If unsure, say Y.
  1197. +
  1198. + config LEDS_TRIGGER_IDE_DISK
  1199. + bool "LED IDE Disk Trigger"
  1200. + depends on LEDS_TRIGGERS
  1201. + help
  1202. + This allows LEDs to be controlled by IDE disk activity.
  1203. + If unsure, say Y.
  1204. +
  1205. + config LEDS_TRIGGER_HEARTBEAT
  1206. + tristate "LED Heartbeat Trigger"
  1207. + depends on LEDS_TRIGGERS
  1208. + help
  1209. + This allows LEDs to be controlled by a CPU load average.
  1210. + The flash frequency is a hyperbolic function of the 1-minute
  1211. + load average.
  1212. + If unsure, say Y.
  1213. +
  1214. + config LEDS_TRIGGER_BACKLIGHT
  1215. + tristate "LED backlight Trigger"
  1216. + depends on LEDS_TRIGGERS
  1217. + help
  1218. + This allows LEDs to be controlled as a backlight device: they
  1219. + turn off and on when the display is blanked and unblanked.
  1220. +
  1221. + If unsure, say N.
  1222. +
  1223. + config LEDS_TRIGGER_CPU
  1224. + bool "LED CPU Trigger"
  1225. + depends on LEDS_TRIGGERS
  1226. + help
  1227. + This allows LEDs to be controlled by active CPUs. This shows
  1228. + the active CPUs across an array of LEDs so you can see which
  1229. + CPUs are active on the system at any given moment.
  1230. +
  1231. + If unsure, say N.
  1232. +
  1233. + config LEDS_TRIGGER_GPIO
  1234. + tristate "LED GPIO Trigger"
  1235. + depends on LEDS_TRIGGERS
  1236. + depends on GPIOLIB
  1237. + help
  1238. + This allows LEDs to be controlled by gpio events. It's good
  1239. + when using gpios as switches and triggering the needed LEDs
  1240. + from there. One use case is n810's keypad LEDs that could
  1241. + be triggered by this trigger when user slides up to show
  1242. + keypad.
  1243. +
  1244. + If unsure, say N.
  1245. +
  1246. + config LEDS_TRIGGER_DEFAULT_ON
  1247. + tristate "LED Default ON Trigger"
  1248. + depends on LEDS_TRIGGERS
  1249. + help
  1250. + This allows LEDs to be initialised in the ON state.
  1251. + If unsure, say Y.
  1252. +
  1253. + comment "iptables trigger is under Netfilter config (LED target)"
  1254. + depends on LEDS_TRIGGERS
  1255. +
  1256. + config LEDS_TRIGGER_TRANSIENT
  1257. + tristate "LED Transient Trigger"
  1258. + depends on LEDS_TRIGGERS
  1259. + help
  1260. + This allows one time activation of a transient state on
  1261. + GPIO/PWM based hardware.
  1262. + If unsure, say Y
  1263. +
  1264. comment "LED Triggers"
  1265. source "drivers/leds/trigger/Kconfig"
  1266.  
  1267. diff -Naur a/drivers/leds/trigger/ledtrig-ide-disk.c b/drivers/leds/trigger/ledtrig-ide-disk.c
  1268. --- a/drivers/leds/trigger/ledtrig-ide-disk.c 2015-01-29 17:41:03.000000000 -0800
  1269. +++ b/drivers/leds/trigger/ledtrig-ide-disk.c 2015-02-05 14:04:01.000000000 -0800
  1270. @@ -1,8 +1,10 @@
  1271. /*
  1272. * LED IDE-Disk Activity Trigger
  1273. *
  1274. - * Copyright 2006 Openedhand Ltd.
  1275. +/* Copyright 2013 bodhi <mibodhi@gmail.com>
  1276. *
  1277. + * based on
  1278. + * Copyright 2006 Openedhand Ltd.
  1279. * Author: Richard Purdie <rpurdie@openedhand.com>
  1280. *
  1281. * This program is free software; you can redistribute it and/or modify
  1282. @@ -18,25 +20,36 @@
  1283.  
  1284. #define BLINK_DELAY 30
  1285.  
  1286. -DEFINE_LED_TRIGGER(ledtrig_ide);
  1287. +DEFINE_LED_TRIGGER(ledtrig_ide1);
  1288. +DEFINE_LED_TRIGGER(ledtrig_ide2);
  1289. static unsigned long ide_blink_delay = BLINK_DELAY;
  1290.  
  1291. -void ledtrig_ide_activity(void)
  1292. +void ledtrig_ide_activity(int portno)
  1293. {
  1294. - led_trigger_blink_oneshot(ledtrig_ide,
  1295. - &ide_blink_delay, &ide_blink_delay, 0);
  1296. + switch (portno) {
  1297. + case 0:
  1298. + led_trigger_blink_oneshot(ledtrig_ide1, &ide_blink_delay, &ide_blink_delay, 0);
  1299. + break;
  1300. + case 1:
  1301. + led_trigger_blink_oneshot(ledtrig_ide2, &ide_blink_delay, &ide_blink_delay, 0);
  1302. + break;
  1303. + default:
  1304. + break;
  1305. + }
  1306. }
  1307. EXPORT_SYMBOL(ledtrig_ide_activity);
  1308.  
  1309. static int __init ledtrig_ide_init(void)
  1310. {
  1311. - led_trigger_register_simple("ide-disk", &ledtrig_ide);
  1312. + led_trigger_register_simple("ide-disk1", &ledtrig_ide1);
  1313. + led_trigger_register_simple("ide-disk2", &ledtrig_ide2);
  1314. return 0;
  1315. }
  1316.  
  1317. static void __exit ledtrig_ide_exit(void)
  1318. {
  1319. - led_trigger_unregister_simple(ledtrig_ide);
  1320. + led_trigger_unregister_simple(ledtrig_ide1);
  1321. + led_trigger_unregister_simple(ledtrig_ide2);
  1322. }
  1323.  
  1324. module_init(ledtrig_ide_init);
  1325. diff -Naur a/drivers/media/dvb-frontends/ds3103.c b/drivers/media/dvb-frontends/ds3103.c
  1326. --- a/drivers/media/dvb-frontends/ds3103.c 1969-12-31 16:00:00.000000000 -0800
  1327. +++ b/drivers/media/dvb-frontends/ds3103.c 2015-02-05 14:04:01.000000000 -0800
  1328. @@ -0,0 +1,1395 @@
  1329. +/*
  1330. + Montage Technology DS3103 - DVBS/S2 Demodulator driver
  1331. +
  1332. + This program is free software; you can redistribute it and/or modify
  1333. + it under the terms of the GNU General Public License as published by
  1334. + the Free Software Foundation; either version 2 of the License, or
  1335. + (at your option) any later version.
  1336. +
  1337. + This program is distributed in the hope that it will be useful,
  1338. + but WITHOUT ANY WARRANTY; without even the implied warranty of
  1339. + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  1340. + GNU General Public License for more details.
  1341. +
  1342. + You should have received a copy of the GNU General Public License
  1343. + along with this program; if not, write to the Free Software
  1344. + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  1345. + */
  1346. +
  1347. +#include <linux/slab.h>
  1348. +#include <linux/kernel.h>
  1349. +#include <linux/module.h>
  1350. +#include <linux/moduleparam.h>
  1351. +#include <linux/init.h>
  1352. +#include <linux/firmware.h>
  1353. +
  1354. +#include "dvb_frontend.h"
  1355. +#include "ds3103.h"
  1356. +
  1357. +static int debug;
  1358. +
  1359. +#define dprintk(args...) \
  1360. + do { \
  1361. + if (debug) \
  1362. + printk(args); \
  1363. + } while (0)
  1364. +
  1365. +#define DS3103_DEFAULT_FIRMWARE "dvb-fe-ds3103.fw"
  1366. +
  1367. +static u8 ds310x_dvbs_init_tab[] = {
  1368. + 0x23, 0x07,
  1369. + 0x08, 0x03,
  1370. + 0x0c, 0x02,
  1371. + 0x21, 0x54,
  1372. + 0x25, 0x82,
  1373. + 0x27, 0x31,
  1374. + 0x30, 0x08,
  1375. + 0x31, 0x40,
  1376. + 0x32, 0x32,
  1377. + 0x33, 0x35,
  1378. + 0x35, 0xff,
  1379. + 0x3a, 0x00,
  1380. + 0x37, 0x10,
  1381. + 0x38, 0x10,
  1382. + 0x39, 0x02,
  1383. + 0x42, 0x60,
  1384. + 0x4a, 0x80,
  1385. + 0x4b, 0x04,
  1386. + 0x4d, 0x91,
  1387. + 0x5d, 0xc8,
  1388. + 0x50, 0x36,
  1389. + 0x51, 0x36,
  1390. + 0x52, 0x36,
  1391. + 0x53, 0x36,
  1392. + 0x63, 0x0f,
  1393. + 0x64, 0x30,
  1394. + 0x65, 0x40,
  1395. + 0x68, 0x26,
  1396. + 0x69, 0x4c,
  1397. + 0x70, 0x20,
  1398. + 0x71, 0x70,
  1399. + 0x72, 0x04,
  1400. + 0x73, 0x00,
  1401. + 0x70, 0x40,
  1402. + 0x71, 0x70,
  1403. + 0x72, 0x04,
  1404. + 0x73, 0x00,
  1405. + 0x70, 0x60,
  1406. + 0x71, 0x70,
  1407. + 0x72, 0x04,
  1408. + 0x73, 0x00,
  1409. + 0x70, 0x80,
  1410. + 0x71, 0x70,
  1411. + 0x72, 0x04,
  1412. + 0x73, 0x00,
  1413. + 0x70, 0xa0,
  1414. + 0x71, 0x70,
  1415. + 0x72, 0x04,
  1416. + 0x73, 0x00,
  1417. + 0x70, 0x1f,
  1418. + 0x76, 0x38,
  1419. + 0x77, 0xa6,
  1420. + 0x78, 0x0c,
  1421. + 0x79, 0x80,
  1422. + 0x7f, 0x14,
  1423. + 0x7c, 0x00,
  1424. + 0xae, 0x82,
  1425. + 0x80, 0x64,
  1426. + 0x81, 0x66,
  1427. + 0x82, 0x44,
  1428. + 0x85, 0x04,
  1429. + 0xcd, 0xf4,
  1430. + 0x90, 0x33,
  1431. + 0xa0, 0x44,
  1432. + 0xc0, 0x08,
  1433. + 0xc3, 0x10,
  1434. + 0xc4, 0x08,
  1435. + 0xc5, 0xf0,
  1436. + 0xc6, 0xff,
  1437. + 0xc7, 0x00,
  1438. + 0xc8, 0x1a,
  1439. + 0xc9, 0x80,
  1440. + 0xe0, 0xf8,
  1441. + 0xe6, 0x8b,
  1442. + 0xd0, 0x40,
  1443. + 0xf8, 0x20,
  1444. + 0xfa, 0x0f,
  1445. + 0x00, 0x00,
  1446. + 0xbd, 0x01,
  1447. + 0xb8, 0x00
  1448. +};
  1449. +
  1450. +static u8 ds310x_dvbs2_init_tab[] = {
  1451. + 0x23, 0x07,
  1452. + 0x08, 0x07,
  1453. + 0x0c, 0x02,
  1454. + 0x21, 0x54,
  1455. + 0x25, 0x82,
  1456. + 0x27, 0x31,
  1457. + 0x30, 0x08,
  1458. + 0x32, 0x32,
  1459. + 0x33, 0x35,
  1460. + 0x35, 0xff,
  1461. + 0x3a, 0x00,
  1462. + 0x37, 0x10,
  1463. + 0x38, 0x10,
  1464. + 0x39, 0x02,
  1465. + 0x42, 0x60,
  1466. + 0x4a, 0x80,
  1467. + 0x4b, 0x04,
  1468. + 0x4d, 0x91,
  1469. + 0x5d, 0xc8,
  1470. + 0x50, 0x36,
  1471. + 0x51, 0x36,
  1472. + 0x52, 0x36,
  1473. + 0x53, 0x36,
  1474. + 0x63, 0x0f,
  1475. + 0x64, 0x10,
  1476. + 0x65, 0x20,
  1477. + 0x68, 0x46,
  1478. + 0x69, 0xcd,
  1479. + 0x70, 0x20,
  1480. + 0x71, 0x70,
  1481. + 0x72, 0x04,
  1482. + 0x73, 0x00,
  1483. + 0x70, 0x40,
  1484. + 0x71, 0x70,
  1485. + 0x72, 0x04,
  1486. + 0x73, 0x00,
  1487. + 0x70, 0x60,
  1488. + 0x71, 0x70,
  1489. + 0x72, 0x04,
  1490. + 0x73, 0x00,
  1491. + 0x70, 0x80,
  1492. + 0x71, 0x70,
  1493. + 0x72, 0x04,
  1494. + 0x73, 0x00,
  1495. + 0x70, 0xa0,
  1496. + 0x71, 0x70,
  1497. + 0x72, 0x04,
  1498. + 0x73, 0x00,
  1499. + 0x70, 0x1f,
  1500. + 0x76, 0x38,
  1501. + 0x77, 0xa6,
  1502. + 0x78, 0x0c,
  1503. + 0x79, 0x80,
  1504. + 0x7f, 0x14,
  1505. + 0x85, 0x08,
  1506. + 0xcd, 0xf4,
  1507. + 0x90, 0x33,
  1508. + 0x86, 0x00,
  1509. + 0x87, 0x0f,
  1510. + 0x89, 0x00,
  1511. + 0x8b, 0x44,
  1512. + 0x8c, 0x66,
  1513. + 0x9d, 0xc1,
  1514. + 0x8a, 0x10,
  1515. + 0xad, 0x40,
  1516. + 0xa0, 0x44,
  1517. + 0xc0, 0x08,
  1518. + 0xc1, 0x10,
  1519. + 0xc2, 0x08,
  1520. + 0xc3, 0x10,
  1521. + 0xc4, 0x08,
  1522. + 0xc5, 0xf0,
  1523. + 0xc6, 0xff,
  1524. + 0xc7, 0x00,
  1525. + 0xc8, 0x1a,
  1526. + 0xc9, 0x80,
  1527. + 0xca, 0x23,
  1528. + 0xcb, 0x24,
  1529. + 0xcc, 0xf4,
  1530. + 0xce, 0x74,
  1531. + 0x00, 0x00,
  1532. + 0xbd, 0x01,
  1533. + 0xb8, 0x00
  1534. +};
  1535. +
  1536. +struct ds3103_state {
  1537. + struct i2c_adapter *i2c;
  1538. + const struct ds3103_config *config;
  1539. + struct dvb_frontend frontend;
  1540. + /* previous uncorrected block counter for DVB-S2 */
  1541. + u16 prevUCBS2;
  1542. +};
  1543. +
  1544. +static int ds3103_writereg(struct ds3103_state *state, int reg, int data)
  1545. +{
  1546. + u8 buf[] = { reg, data };
  1547. + struct i2c_msg msg = { .addr = state->config->demod_address,
  1548. + .flags = 0, .buf = buf, .len = 2 };
  1549. + int err;
  1550. +
  1551. + dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
  1552. +
  1553. + err = i2c_transfer(state->i2c, &msg, 1);
  1554. + if (err != 1) {
  1555. + printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x,"
  1556. + " value == 0x%02x)\n", __func__, err, reg, data);
  1557. + return -EREMOTEIO;
  1558. + }
  1559. +
  1560. + return 0;
  1561. +}
  1562. +
  1563. +/* I2C write for 8k firmware load */
  1564. +static int ds3103_writeFW(struct ds3103_state *state, int reg,
  1565. + const u8 *data, u16 len)
  1566. +{
  1567. + int i, ret = -EREMOTEIO;
  1568. + struct i2c_msg msg;
  1569. + u8 *buf;
  1570. +
  1571. + buf = kmalloc(33, GFP_KERNEL);
  1572. + if (buf == NULL) {
  1573. + printk(KERN_ERR "Unable to kmalloc\n");
  1574. + ret = -ENOMEM;
  1575. + goto error;
  1576. + }
  1577. +
  1578. + *(buf) = reg;
  1579. +
  1580. + msg.addr = state->config->demod_address;
  1581. + msg.flags = 0;
  1582. + msg.buf = buf;
  1583. + msg.len = 33;
  1584. +
  1585. + for (i = 0; i < len; i += 32) {
  1586. + memcpy(buf + 1, data + i, 32);
  1587. +
  1588. + dprintk("%s: write reg 0x%02x, len = %d\n", __func__, reg, len);
  1589. +
  1590. + ret = i2c_transfer(state->i2c, &msg, 1);
  1591. + if (ret != 1) {
  1592. + printk(KERN_ERR "%s: write error(err == %i, "
  1593. + "reg == 0x%02x\n", __func__, ret, reg);
  1594. + ret = -EREMOTEIO;
  1595. + }
  1596. + }
  1597. +
  1598. +error:
  1599. + kfree(buf);
  1600. +
  1601. + return ret;
  1602. +}
  1603. +
  1604. +static int ds3103_readreg(struct ds3103_state *state, u8 reg)
  1605. +{
  1606. + int ret;
  1607. + u8 b0[] = { reg };
  1608. + u8 b1[] = { 0 };
  1609. + struct i2c_msg msg[] = {
  1610. + {
  1611. + .addr = state->config->demod_address,
  1612. + .flags = 0,
  1613. + .buf = b0,
  1614. + .len = 1
  1615. + }, {
  1616. + .addr = state->config->demod_address,
  1617. + .flags = I2C_M_RD,
  1618. + .buf = b1,
  1619. + .len = 1
  1620. + }
  1621. + };
  1622. +
  1623. + ret = i2c_transfer(state->i2c, msg, 2);
  1624. +
  1625. + if (ret != 2) {
  1626. + printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
  1627. + return ret;
  1628. + }
  1629. +
  1630. + dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]);
  1631. +
  1632. + return b1[0];
  1633. +}
  1634. +
  1635. +static int ds3103_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
  1636. +{
  1637. + struct ds3103_state *state = fe->demodulator_priv;
  1638. +
  1639. + if (enable)
  1640. + ds3103_writereg(state, 0x03, 0x12);
  1641. + else
  1642. + ds3103_writereg(state, 0x03, 0x02);
  1643. +
  1644. + return 0;
  1645. +}
  1646. +static int ds3103_load_firmware(struct dvb_frontend *fe,
  1647. + const struct firmware *fw);
  1648. +
  1649. +static int ds3103_firmware_ondemand(struct dvb_frontend *fe)
  1650. +{
  1651. + struct ds3103_state *state = fe->demodulator_priv;
  1652. + const struct firmware *fw;
  1653. + int ret = 0;
  1654. +
  1655. + dprintk("%s()\n", __func__);
  1656. +
  1657. + if (ds3103_readreg(state, 0xb2) <= 0)
  1658. + return ret;
  1659. +
  1660. + /* global reset, global diseqc reset, global fec reset */
  1661. + ds3103_writereg(state, 0x07, 0xe0);
  1662. + ds3103_writereg(state, 0x07, 0x00);
  1663. +
  1664. + /* request the firmware, this will block until someone uploads it */
  1665. + printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__,
  1666. + DS3103_DEFAULT_FIRMWARE);
  1667. + ret = request_firmware(&fw, DS3103_DEFAULT_FIRMWARE,
  1668. + state->i2c->dev.parent);
  1669. + printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", __func__);
  1670. + if (ret) {
  1671. + printk(KERN_ERR "%s: No firmware uploaded (timeout or file not "
  1672. + "found?)\n", __func__);
  1673. + return ret;
  1674. + }
  1675. +
  1676. + ret = ds3103_load_firmware(fe, fw);
  1677. + if (ret)
  1678. + printk("%s: Writing firmware to device failed\n", __func__);
  1679. +
  1680. + release_firmware(fw);
  1681. +
  1682. + dprintk("%s: Firmware upload %s\n", __func__,
  1683. + ret == 0 ? "complete" : "failed");
  1684. +
  1685. + return ret;
  1686. +}
  1687. +
  1688. +static int ds3103_load_firmware(struct dvb_frontend *fe,
  1689. + const struct firmware *fw)
  1690. +{
  1691. + struct ds3103_state *state = fe->demodulator_priv;
  1692. +
  1693. + dprintk("%s\n", __func__);
  1694. + dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n",
  1695. + fw->size,
  1696. + fw->data[0],
  1697. + fw->data[1],
  1698. + fw->data[fw->size - 2],
  1699. + fw->data[fw->size - 1]);
  1700. +
  1701. + /* Begin the firmware load process */
  1702. + ds3103_writereg(state, 0xb2, 0x01);
  1703. + /* write the entire firmware */
  1704. + ds3103_writeFW(state, 0xb0, fw->data, fw->size);
  1705. + ds3103_writereg(state, 0xb2, 0x00);
  1706. +
  1707. + return 0;
  1708. +}
  1709. +
  1710. +static int ds3103_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
  1711. +{
  1712. + struct ds3103_state *state = fe->demodulator_priv;
  1713. + u8 data;
  1714. +
  1715. + dprintk("%s(%d)\n", __func__, voltage);
  1716. +
  1717. + data = ds3103_readreg(state, 0xa2);
  1718. + data |= 0x03; /* bit0 V/H, bit1 off/on */
  1719. +
  1720. + switch (voltage) {
  1721. + case SEC_VOLTAGE_18:
  1722. + data &= ~0x03;
  1723. + break;
  1724. + case SEC_VOLTAGE_13:
  1725. + data &= ~0x03;
  1726. + data |= 0x01;
  1727. + break;
  1728. + case SEC_VOLTAGE_OFF:
  1729. + break;
  1730. + }
  1731. +
  1732. + ds3103_writereg(state, 0xa2, data);
  1733. +
  1734. + return 0;
  1735. +}
  1736. +
  1737. +static int ds3103_read_status(struct dvb_frontend *fe, fe_status_t* status)
  1738. +{
  1739. + struct ds3103_state *state = fe->demodulator_priv;
  1740. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  1741. + int lock;
  1742. +
  1743. + *status = 0;
  1744. +
  1745. + switch (c->delivery_system) {
  1746. + case SYS_DVBS:
  1747. + lock = ds3103_readreg(state, 0xd1);
  1748. + if ((lock & 0x07) == 0x07)
  1749. + *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  1750. + FE_HAS_VITERBI | FE_HAS_SYNC |
  1751. + FE_HAS_LOCK;
  1752. +
  1753. + break;
  1754. + case SYS_DVBS2:
  1755. + lock = ds3103_readreg(state, 0x0d);
  1756. + if ((lock & 0x8f) == 0x8f)
  1757. + *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
  1758. + FE_HAS_VITERBI | FE_HAS_SYNC |
  1759. + FE_HAS_LOCK;
  1760. +
  1761. + break;
  1762. + default:
  1763. + return 1;
  1764. + }
  1765. +
  1766. + if (state->config->set_lock_led)
  1767. + state->config->set_lock_led(fe, *status == 0 ? 0 : 1);
  1768. +
  1769. + dprintk("%s: status = 0x%02x\n", __func__, lock);
  1770. +
  1771. + return 0;
  1772. +}
  1773. +
  1774. +/* read DS3103 BER value */
  1775. +static int ds3103_read_ber(struct dvb_frontend *fe, u32* ber)
  1776. +{
  1777. + struct ds3103_state *state = fe->demodulator_priv;
  1778. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  1779. + u8 data;
  1780. + u32 ber_reading, lpdc_frames;
  1781. +
  1782. + dprintk("%s()\n", __func__);
  1783. +
  1784. + switch (c->delivery_system) {
  1785. + case SYS_DVBS:
  1786. + /* set the number of bytes checked during
  1787. + BER estimation */
  1788. + ds3103_writereg(state, 0xf9, 0x04);
  1789. + /* read BER estimation status */
  1790. + data = ds3103_readreg(state, 0xf8);
  1791. + /* check if BER estimation is ready */
  1792. + if ((data & 0x10) == 0) {
  1793. + /* this is the number of error bits,
  1794. + to calculate the bit error rate
  1795. + divide to 8388608 */
  1796. + *ber = (ds3103_readreg(state, 0xf7) << 8) |
  1797. + ds3103_readreg(state, 0xf6);
  1798. + /* start counting error bits */
  1799. + /* need to be set twice
  1800. + otherwise it fails sometimes */
  1801. + data |= 0x10;
  1802. + ds3103_writereg(state, 0xf8, data);
  1803. + ds3103_writereg(state, 0xf8, data);
  1804. + } else
  1805. + /* used to indicate that BER estimation
  1806. + is not ready, i.e. BER is unknown */
  1807. + *ber = 0xffffffff;
  1808. + break;
  1809. + case SYS_DVBS2:
  1810. + /* read the number of LPDC decoded frames */
  1811. + lpdc_frames = (ds3103_readreg(state, 0xd7) << 16) |
  1812. + (ds3103_readreg(state, 0xd6) << 8) |
  1813. + ds3103_readreg(state, 0xd5);
  1814. + /* read the number of packets with bad CRC */
  1815. + ber_reading = (ds3103_readreg(state, 0xf8) << 8) |
  1816. + ds3103_readreg(state, 0xf7);
  1817. + if (lpdc_frames > 750) {
  1818. + /* clear LPDC frame counters */
  1819. + ds3103_writereg(state, 0xd1, 0x01);
  1820. + /* clear bad packets counter */
  1821. + ds3103_writereg(state, 0xf9, 0x01);
  1822. + /* enable bad packets counter */
  1823. + ds3103_writereg(state, 0xf9, 0x00);
  1824. + /* enable LPDC frame counters */
  1825. + ds3103_writereg(state, 0xd1, 0x00);
  1826. + *ber = ber_reading;
  1827. + } else
  1828. + /* used to indicate that BER estimation is not ready,
  1829. + i.e. BER is unknown */
  1830. + *ber = 0xffffffff;
  1831. + break;
  1832. + default:
  1833. + return 1;
  1834. + }
  1835. +
  1836. + return 0;
  1837. +}
  1838. +
  1839. +/* calculate DS3103 snr value in dB */
  1840. +static int ds3103_read_snr(struct dvb_frontend *fe, u16 *snr)
  1841. +{
  1842. + struct ds3103_state *state = fe->demodulator_priv;
  1843. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  1844. + u8 snr_reading, snr_value;
  1845. + u32 dvbs2_signal_reading, dvbs2_noise_reading, tmp;
  1846. + static const u16 dvbs_snr_tab[] = { /* 20 x Table (rounded up) */
  1847. + 0x0000, 0x1b13, 0x2aea, 0x3627, 0x3ede, 0x45fe, 0x4c03,
  1848. + 0x513a, 0x55d4, 0x59f2, 0x5dab, 0x6111, 0x6431, 0x6717,
  1849. + 0x69c9, 0x6c4e, 0x6eac, 0x70e8, 0x7304, 0x7505
  1850. + };
  1851. + static const u16 dvbs2_snr_tab[] = { /* 80 x Table (rounded up) */
  1852. + 0x0000, 0x0bc2, 0x12a3, 0x1785, 0x1b4e, 0x1e65, 0x2103,
  1853. + 0x2347, 0x2546, 0x2710, 0x28ae, 0x2a28, 0x2b83, 0x2cc5,
  1854. + 0x2df1, 0x2f09, 0x3010, 0x3109, 0x31f4, 0x32d2, 0x33a6,
  1855. + 0x3470, 0x3531, 0x35ea, 0x369b, 0x3746, 0x37ea, 0x3888,
  1856. + 0x3920, 0x39b3, 0x3a42, 0x3acc, 0x3b51, 0x3bd3, 0x3c51,
  1857. + 0x3ccb, 0x3d42, 0x3db6, 0x3e27, 0x3e95, 0x3f00, 0x3f68,
  1858. + 0x3fcf, 0x4033, 0x4094, 0x40f4, 0x4151, 0x41ac, 0x4206,
  1859. + 0x425e, 0x42b4, 0x4308, 0x435b, 0x43ac, 0x43fc, 0x444a,
  1860. + 0x4497, 0x44e2, 0x452d, 0x4576, 0x45bd, 0x4604, 0x4649,
  1861. + 0x468e, 0x46d1, 0x4713, 0x4755, 0x4795, 0x47d4, 0x4813,
  1862. + 0x4851, 0x488d, 0x48c9, 0x4904, 0x493f, 0x4978, 0x49b1,
  1863. + 0x49e9, 0x4a20, 0x4a57
  1864. + };
  1865. +
  1866. + dprintk("%s()\n", __func__);
  1867. +
  1868. + switch (c->delivery_system) {
  1869. + case SYS_DVBS:
  1870. + snr_reading = ds3103_readreg(state, 0xff);
  1871. + snr_reading /= 8;
  1872. + if (snr_reading == 0)
  1873. + *snr = 0x0000;
  1874. + else {
  1875. + if (snr_reading > 20)
  1876. + snr_reading = 20;
  1877. + snr_value = dvbs_snr_tab[snr_reading - 1] * 10 / 23026;
  1878. + /* cook the value to be suitable for szap-s2
  1879. + human readable output */
  1880. + *snr = snr_value * 8 * 655;
  1881. + }
  1882. + dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
  1883. + snr_reading, *snr);
  1884. + break;
  1885. + case SYS_DVBS2:
  1886. + dvbs2_noise_reading = (ds3103_readreg(state, 0x8c) & 0x3f) +
  1887. + (ds3103_readreg(state, 0x8d) << 4);
  1888. + dvbs2_signal_reading = ds3103_readreg(state, 0x8e);
  1889. + tmp = dvbs2_signal_reading * dvbs2_signal_reading >> 1;
  1890. + if (tmp == 0) {
  1891. + *snr = 0x0000;
  1892. + return 0;
  1893. + }
  1894. + if (dvbs2_noise_reading == 0) {
  1895. + snr_value = 0x0013;
  1896. + /* cook the value to be suitable for szap-s2
  1897. + human readable output */
  1898. + *snr = 0xffff;
  1899. + return 0;
  1900. + }
  1901. + if (tmp > dvbs2_noise_reading) {
  1902. + snr_reading = tmp / dvbs2_noise_reading;
  1903. + if (snr_reading > 80)
  1904. + snr_reading = 80;
  1905. + snr_value = dvbs2_snr_tab[snr_reading - 1] / 1000;
  1906. + /* cook the value to be suitable for szap-s2
  1907. + human readable output */
  1908. + *snr = snr_value * 5 * 655;
  1909. + } else {
  1910. + snr_reading = dvbs2_noise_reading / tmp;
  1911. + if (snr_reading > 80)
  1912. + snr_reading = 80;
  1913. + *snr = -(dvbs2_snr_tab[snr_reading] / 1000);
  1914. + }
  1915. + dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
  1916. + snr_reading, *snr);
  1917. + break;
  1918. + default:
  1919. + return 1;
  1920. + }
  1921. +
  1922. + return 0;
  1923. +}
  1924. +
  1925. +/* read DS3103 uncorrected blocks */
  1926. +static int ds3103_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
  1927. +{
  1928. + struct ds3103_state *state = fe->demodulator_priv;
  1929. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  1930. + u8 data;
  1931. + u16 _ucblocks;
  1932. +
  1933. + dprintk("%s()\n", __func__);
  1934. +
  1935. + switch (c->delivery_system) {
  1936. + case SYS_DVBS:
  1937. + *ucblocks = (ds3103_readreg(state, 0xf5) << 8) |
  1938. + ds3103_readreg(state, 0xf4);
  1939. + data = ds3103_readreg(state, 0xf8);
  1940. + /* clear packet counters */
  1941. + data &= ~0x20;
  1942. + ds3103_writereg(state, 0xf8, data);
  1943. + /* enable packet counters */
  1944. + data |= 0x20;
  1945. + ds3103_writereg(state, 0xf8, data);
  1946. + break;
  1947. + case SYS_DVBS2:
  1948. + _ucblocks = (ds3103_readreg(state, 0xe2) << 8) |
  1949. + ds3103_readreg(state, 0xe1);
  1950. + if (_ucblocks > state->prevUCBS2)
  1951. + *ucblocks = _ucblocks - state->prevUCBS2;
  1952. + else
  1953. + *ucblocks = state->prevUCBS2 - _ucblocks;
  1954. + state->prevUCBS2 = _ucblocks;
  1955. + break;
  1956. + default:
  1957. + return 1;
  1958. + }
  1959. +
  1960. + return 0;
  1961. +}
  1962. +
  1963. +static int ds3103_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
  1964. +{
  1965. + struct ds3103_state *state = fe->demodulator_priv;
  1966. + u8 data;
  1967. +
  1968. + dprintk("%s(%d)\n", __func__, tone);
  1969. + if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
  1970. + printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone);
  1971. + return -EINVAL;
  1972. + }
  1973. +
  1974. + data = ds3103_readreg(state, 0xa2);
  1975. + data &= ~0xc0;
  1976. + ds3103_writereg(state, 0xa2, data);
  1977. +
  1978. + switch (tone) {
  1979. + case SEC_TONE_ON:
  1980. + dprintk("%s: setting tone on\n", __func__);
  1981. + data = ds3103_readreg(state, 0xa1);
  1982. + data &= ~0x43;
  1983. + data |= 0x04;
  1984. + ds3103_writereg(state, 0xa1, data);
  1985. + break;
  1986. + case SEC_TONE_OFF:
  1987. + dprintk("%s: setting tone off\n", __func__);
  1988. + data = ds3103_readreg(state, 0xa2);
  1989. + data |= 0x80;
  1990. + ds3103_writereg(state, 0xa2, data);
  1991. + break;
  1992. + }
  1993. +
  1994. + return 0;
  1995. +}
  1996. +
  1997. +static int ds3103_send_diseqc_msg(struct dvb_frontend *fe,
  1998. + struct dvb_diseqc_master_cmd *d)
  1999. +{
  2000. + struct ds3103_state *state = fe->demodulator_priv;
  2001. + int i;
  2002. + u8 data;
  2003. +
  2004. + /* Dump DiSEqC message */
  2005. + dprintk("%s(", __func__);
  2006. + for (i = 0 ; i < d->msg_len;) {
  2007. + dprintk("0x%02x", d->msg[i]);
  2008. + if (++i < d->msg_len)
  2009. + dprintk(", ");
  2010. + }
  2011. +
  2012. + /* enable DiSEqC message send pin */
  2013. + data = ds3103_readreg(state, 0xa2);
  2014. + data &= ~0xc0;
  2015. + data &= ~0x20;
  2016. + ds3103_writereg(state, 0xa2, data);
  2017. +
  2018. + /* DiSEqC message */
  2019. + for (i = 0; i < d->msg_len; i++)
  2020. + ds3103_writereg(state, 0xa3 + i, d->msg[i]);
  2021. +
  2022. + data = ds3103_readreg(state, 0xa1);
  2023. + /* clear DiSEqC message length and status,
  2024. + enable DiSEqC message send */
  2025. + data &= ~0xf8;
  2026. + /* set DiSEqC mode, modulation active during 33 pulses,
  2027. + set DiSEqC message length */
  2028. + data |= ((d->msg_len - 1) << 3) | 0x07;
  2029. + ds3103_writereg(state, 0xa1, data);
  2030. +
  2031. + /* wait up to 150ms for DiSEqC transmission to complete */
  2032. + for (i = 0; i < 15; i++) {
  2033. + data = ds3103_readreg(state, 0xa1);
  2034. + if ((data & 0x40) == 0)
  2035. + break;
  2036. + msleep(10);
  2037. + }
  2038. +
  2039. + /* DiSEqC timeout after 150ms */
  2040. + if (i == 15) {
  2041. + data = ds3103_readreg(state, 0xa1);
  2042. + data &= ~0x80;
  2043. + data |= 0x40;
  2044. + ds3103_writereg(state, 0xa1, data);
  2045. +
  2046. + data = ds3103_readreg(state, 0xa2);
  2047. + data &= ~0xc0;
  2048. + data |= 0x80;
  2049. + ds3103_writereg(state, 0xa2, data);
  2050. +
  2051. + return 1;
  2052. + }
  2053. +
  2054. + data = ds3103_readreg(state, 0xa2);
  2055. + data &= ~0xc0;
  2056. + data |= 0x80;
  2057. + ds3103_writereg(state, 0xa2, data);
  2058. +
  2059. + return 0;
  2060. +}
  2061. +
  2062. +/* Send DiSEqC burst */
  2063. +static int ds3103_diseqc_send_burst(struct dvb_frontend *fe,
  2064. + fe_sec_mini_cmd_t burst)
  2065. +{
  2066. + struct ds3103_state *state = fe->demodulator_priv;
  2067. + int i;
  2068. + u8 data;
  2069. +
  2070. + dprintk("%s()\n", __func__);
  2071. +
  2072. + data = ds3103_readreg(state, 0xa2);
  2073. + data &= ~0xc0;
  2074. + data &= ~0x20;
  2075. + ds3103_writereg(state, 0xa2, data);
  2076. +
  2077. + /* DiSEqC burst */
  2078. + if (burst == SEC_MINI_A)
  2079. + /* Unmodulated tone burst */
  2080. + ds3103_writereg(state, 0xa1, 0x02);
  2081. + else if (burst == SEC_MINI_B)
  2082. + /* Modulated tone burst */
  2083. + ds3103_writereg(state, 0xa1, 0x01);
  2084. + else
  2085. + return -EINVAL;
  2086. +
  2087. + msleep(13);
  2088. + for (i = 0; i < 5; i++) {
  2089. + data = ds3103_readreg(state, 0xa1);
  2090. + if ((data & 0x40) == 0)
  2091. + break;
  2092. + msleep(1);
  2093. + }
  2094. +
  2095. + if (i == 5) {
  2096. + data = ds3103_readreg(state, 0xa1);
  2097. + data &= ~0x80;
  2098. + data |= 0x40;
  2099. + ds3103_writereg(state, 0xa1, data);
  2100. +
  2101. + data = ds3103_readreg(state, 0xa2);
  2102. + data &= ~0xc0;
  2103. + data |= 0x80;
  2104. + ds3103_writereg(state, 0xa2, data);
  2105. +
  2106. + return 1;
  2107. + }
  2108. +
  2109. + data = ds3103_readreg(state, 0xa2);
  2110. + data &= ~0xc0;
  2111. + data |= 0x80;
  2112. + ds3103_writereg(state, 0xa2, data);
  2113. +
  2114. + return 0;
  2115. +}
  2116. +
  2117. +static void ds3103_release(struct dvb_frontend *fe)
  2118. +{
  2119. + struct ds3103_state *state = fe->demodulator_priv;
  2120. +
  2121. + if (state->config->set_lock_led)
  2122. + state->config->set_lock_led(fe, 0);
  2123. +
  2124. + dprintk("%s\n", __func__);
  2125. + kfree(state);
  2126. +}
  2127. +
  2128. +static struct dvb_frontend_ops ds3103_ops;
  2129. +
  2130. +struct dvb_frontend *ds3103_attach(const struct ds3103_config *config,
  2131. + struct i2c_adapter *i2c)
  2132. +{
  2133. + struct ds3103_state *state = NULL;
  2134. + int ret;
  2135. + u8 val_01, val_02, val_b2;
  2136. +
  2137. +
  2138. + dprintk("%s\n", __func__);
  2139. +
  2140. + /* allocate memory for the internal state */
  2141. + state = kzalloc(sizeof(struct ds3103_state), GFP_KERNEL);
  2142. + if (state == NULL) {
  2143. + printk(KERN_ERR "Unable to kmalloc\n");
  2144. + goto error2;
  2145. + }
  2146. +
  2147. + state->config = config;
  2148. + state->i2c = i2c;
  2149. + state->prevUCBS2 = 0;
  2150. +
  2151. + /* check if the demod is present */
  2152. + ret = ds3103_readreg(state, 0x00) & 0xfe;
  2153. + if (ret != 0xe0) {
  2154. + printk(KERN_ERR "Invalid probe, probably not a DS3x0x\n");
  2155. + goto error3;
  2156. + }
  2157. +
  2158. + /* check demod chip ID */
  2159. + val_01 = ds3103_readreg(state, 0x01);
  2160. + val_02 = ds3103_readreg(state, 0x02);
  2161. + val_b2 = ds3103_readreg(state, 0xb2);
  2162. + if((val_02 == 0x00) &&
  2163. + (val_01 == 0xD0) && ((val_b2 & 0xC0) == 0xC0)) {
  2164. + printk("\tChip ID = [DS3103]!\n");
  2165. + } else if((val_02 == 0x00) &&
  2166. + (val_01 == 0xD0) && ((val_b2 & 0xC0) == 0x00)) {
  2167. + printk("\tChip ID = [DS3002B]!\n");
  2168. + } else if ((val_02 == 0x00) && (val_01 == 0xC0)) {
  2169. + printk("\tChip ID = [DS300X]! Not supported by this module\n");
  2170. + goto error3;
  2171. + } else {
  2172. + printk("\tChip ID = unknow!\n");
  2173. + goto error3;
  2174. + }
  2175. +
  2176. + printk(KERN_INFO "DS3103 chip version: %d.%d attached.\n", val_02, val_01);
  2177. +
  2178. + memcpy(&state->frontend.ops, &ds3103_ops,
  2179. + sizeof(struct dvb_frontend_ops));
  2180. + state->frontend.demodulator_priv = state;
  2181. + return &state->frontend;
  2182. +
  2183. +error3:
  2184. + kfree(state);
  2185. +error2:
  2186. + return NULL;
  2187. +}
  2188. +EXPORT_SYMBOL(ds3103_attach);
  2189. +
  2190. +static int ds3103_set_carrier_offset(struct dvb_frontend *fe,
  2191. + s32 carrier_offset_khz,
  2192. + u32 target_mclk)
  2193. +{
  2194. + struct ds3103_state *state = fe->demodulator_priv;
  2195. + s32 tmp;
  2196. +
  2197. + tmp = carrier_offset_khz;
  2198. + tmp *= 65536;
  2199. + tmp = (2 * tmp + target_mclk) / (2 * target_mclk);
  2200. +
  2201. + if (tmp < 0)
  2202. + tmp += 65536;
  2203. +
  2204. + ds3103_writereg(state, 0x5f, tmp >> 8);
  2205. + ds3103_writereg(state, 0x5e, tmp & 0xff);
  2206. +
  2207. + return 0;
  2208. +}
  2209. +static int ds3103_set_ts_div(struct ds3103_state *state, u8 tmp1, u8 tmp2)
  2210. +{
  2211. + u8 buf;
  2212. + tmp1 -= 1;
  2213. + tmp2 -= 1;
  2214. +
  2215. + tmp1 &= 0x3f;
  2216. + tmp2 &= 0x3f;
  2217. +
  2218. + buf = ds3103_readreg(state, 0xfe);
  2219. + buf &= 0xf0;
  2220. + buf |= (tmp1 >> 2) & 0x0f;
  2221. + ds3103_writereg(state, 0xfe, buf);
  2222. +
  2223. + buf = (u8)((tmp1 & 0x03) << 6);
  2224. + buf |= tmp2;
  2225. + ds3103_writereg(state, 0xea, buf);
  2226. +
  2227. + return 0;
  2228. +}
  2229. +
  2230. +u32 ds3103_get_mclk(struct ds3103_state *state)
  2231. +{
  2232. + u32 p_mclk_khz = 96000;
  2233. + u8 tmp1, tmp2;
  2234. +
  2235. + tmp1 = ds3103_readreg(state, 0x22);
  2236. + tmp2 = ds3103_readreg(state, 0x24);
  2237. +
  2238. + tmp1 >>= 6;
  2239. + tmp1 &= 0x03;
  2240. + tmp2 >>= 6;
  2241. + tmp2 &= 0x03;
  2242. +
  2243. + if((tmp1 == 0x00) && (tmp2 == 0x01))
  2244. + p_mclk_khz = 144000;
  2245. + else if ((tmp1 == 0x00) && (tmp2 == 0x03))
  2246. + p_mclk_khz = 72000;
  2247. + else if ((tmp1 == 0x01) && (tmp2 == 0x01))
  2248. + p_mclk_khz = 115200;
  2249. + else if ((tmp1 == 0x02) && (tmp2 == 0x01))
  2250. + p_mclk_khz = 96000;
  2251. + else if ((tmp1 == 0x03) && (tmp2 == 0x00))
  2252. + p_mclk_khz = 192000;
  2253. +
  2254. + return p_mclk_khz;
  2255. +}
  2256. +
  2257. +static int ds3103_set_clock_ratio(struct ds3103_state *state, u32 target_mclk)
  2258. +{
  2259. + struct dvb_frontend *fe = &state->frontend;
  2260. + struct dtv_frontend_properties *p = &fe->dtv_property_cache;
  2261. + u8 mod_fac, tmp1, tmp2;
  2262. + u32 input_datarate;
  2263. + u32 mclk_khz = target_mclk;
  2264. + u16 divid_ratio = 0;
  2265. + u32 sym_rate_kss = p->symbol_rate / 1000;
  2266. +
  2267. + if (p->delivery_system == SYS_DVBS2) {
  2268. + switch(p->modulation) {
  2269. + case PSK_8:
  2270. + mod_fac = 3;
  2271. + break;
  2272. + case APSK_16:
  2273. + mod_fac = 4;
  2274. + break;
  2275. + case APSK_32:
  2276. + mod_fac = 5;
  2277. + break;
  2278. + case QPSK:
  2279. + default:
  2280. + mod_fac = 2;
  2281. + break;
  2282. + }
  2283. +
  2284. + switch(p->fec_inner) {
  2285. +/* case FEC_1_4:
  2286. + * input_datarate = sym_rate_kss * mod_fac / 8 / 4;
  2287. + * break;
  2288. + * case FEC_1_3:
  2289. + * input_datarate = sym_rate_kss * mod_fac / 8 / 3;
  2290. + * break;
  2291. + */
  2292. + case FEC_2_5:
  2293. + input_datarate = sym_rate_kss * mod_fac * 2 / 8 / 5;
  2294. + break;
  2295. + case FEC_1_2:
  2296. + input_datarate = sym_rate_kss * mod_fac / 8 / 2;
  2297. + break;
  2298. + case FEC_3_5:
  2299. + input_datarate = sym_rate_kss * mod_fac * 3 / 8 / 5;
  2300. + break;
  2301. + case FEC_2_3:
  2302. + input_datarate = sym_rate_kss * mod_fac * 2 / 8 / 3;
  2303. + break;
  2304. + case FEC_3_4:
  2305. + input_datarate = sym_rate_kss * mod_fac * 3 / 8 / 4;
  2306. + break;
  2307. + case FEC_4_5:
  2308. + input_datarate = sym_rate_kss * mod_fac * 4 / 8 / 5;
  2309. + break;
  2310. + case FEC_5_6:
  2311. + input_datarate = sym_rate_kss * mod_fac * 5 / 8 / 6;
  2312. + break;
  2313. + case FEC_8_9:
  2314. + input_datarate = sym_rate_kss * mod_fac * 8 / 8 / 9;
  2315. + break;
  2316. + case FEC_9_10:
  2317. + input_datarate = sym_rate_kss * mod_fac * 9 / 8 / 10;
  2318. + break;
  2319. + default:
  2320. + input_datarate = sym_rate_kss * mod_fac * 2 / 8 / 3;
  2321. + break;
  2322. + }
  2323. +
  2324. + /* parallel or CI mode for now */
  2325. + if (input_datarate != 0)
  2326. + divid_ratio = mclk_khz / input_datarate;
  2327. + else
  2328. + divid_ratio = 0xff;
  2329. +
  2330. + if (divid_ratio > 128)
  2331. + divid_ratio = 128;
  2332. +
  2333. + if (divid_ratio < 2)
  2334. + divid_ratio = 2;
  2335. +
  2336. + tmp1 = divid_ratio / 2;
  2337. + tmp2 = divid_ratio / 2;
  2338. +
  2339. + if ((divid_ratio % 2) != 0)
  2340. + tmp2 += 1;
  2341. +
  2342. + } else { /* for dvb-s */
  2343. + mod_fac = 2;
  2344. +
  2345. + switch (p->fec_inner) {
  2346. + case FEC_1_2:
  2347. + input_datarate = sym_rate_kss * mod_fac / 2 / 8;
  2348. + break;
  2349. + case FEC_2_3:
  2350. + input_datarate = sym_rate_kss * mod_fac * 2 / 3 / 8;
  2351. + break;
  2352. + case FEC_3_4:
  2353. + input_datarate = sym_rate_kss * mod_fac * 3 / 4 / 8;
  2354. + break;
  2355. + case FEC_5_6:
  2356. + input_datarate = sym_rate_kss * mod_fac * 5 / 6 / 8;
  2357. + break;
  2358. + case FEC_7_8:
  2359. + input_datarate = sym_rate_kss * mod_fac * 7 / 8 / 8;
  2360. + break;
  2361. + default:
  2362. + input_datarate = sym_rate_kss * mod_fac * 3 / 4 / 8;
  2363. + break;
  2364. + }
  2365. +
  2366. + if (input_datarate != 0)
  2367. + divid_ratio = mclk_khz / input_datarate;
  2368. + else
  2369. + divid_ratio = 0xff;
  2370. +
  2371. + if (divid_ratio > 128)
  2372. + divid_ratio = 128;
  2373. +
  2374. + if (divid_ratio < 2)
  2375. + divid_ratio = 2;
  2376. +
  2377. + tmp1 = divid_ratio / 2;
  2378. + tmp2 = divid_ratio / 2;
  2379. +
  2380. + if ((divid_ratio % 2) != 0)
  2381. + tmp2 += 1;
  2382. +
  2383. + }
  2384. +
  2385. + ds3103_set_ts_div(state, tmp1, tmp2);
  2386. +
  2387. + return 0;
  2388. +}
  2389. +
  2390. +static int ds3103_set_frontend(struct dvb_frontend *fe)
  2391. +{
  2392. + struct ds3103_state *state = fe->demodulator_priv;
  2393. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  2394. +
  2395. + int i;
  2396. + fe_status_t status;
  2397. + s32 offset_khz;
  2398. + u32 tuner_freq;
  2399. + u16 value;
  2400. + u32 tmp;
  2401. + u8 tmp1, tmp2;
  2402. + u32 target_mclk = 0;
  2403. +
  2404. + dprintk("%s() frec=%d symb=%d", __func__, c->frequency, c->symbol_rate);
  2405. +
  2406. + if (state->config->set_ts_params)
  2407. + state->config->set_ts_params(fe, 0);
  2408. +
  2409. + if (fe->ops.tuner_ops.set_params)
  2410. + fe->ops.tuner_ops.set_params(fe);
  2411. +
  2412. +
  2413. + ds3103_writereg(state, 0xb2, 0x01);
  2414. + ds3103_writereg(state, 0x00, 0x01);
  2415. +
  2416. + if (fe->ops.tuner_ops.get_frequency)
  2417. + fe->ops.tuner_ops.get_frequency(fe, &tuner_freq);
  2418. +
  2419. + offset_khz = tuner_freq - c->frequency;
  2420. +
  2421. + value = ds3103_readreg(state, 0x08);
  2422. +
  2423. + switch (c->delivery_system) {
  2424. + case SYS_DVBS2:
  2425. + value |= 0x04;
  2426. + ds3103_writereg(state, 0x08, value);
  2427. + for (i = 0; i < sizeof(ds310x_dvbs2_init_tab); i += 2)
  2428. + ds3103_writereg(state,
  2429. + ds310x_dvbs2_init_tab[i],
  2430. + ds310x_dvbs2_init_tab[i + 1]);
  2431. +
  2432. + value = ds3103_readreg(state, 0x4d);
  2433. + value &= ~0x02;
  2434. + ds3103_writereg(state, 0x4d, value);
  2435. + value = ds3103_readreg(state, 0x30);
  2436. + value &= ~0x10;
  2437. + ds3103_writereg(state, 0x30, value);
  2438. + if (c->symbol_rate > 28000000) {
  2439. + target_mclk = 192000;
  2440. + } else if (c->symbol_rate > 18000000) {
  2441. + target_mclk = 144000;
  2442. + } else
  2443. + target_mclk = 96000;
  2444. +
  2445. + if (c->symbol_rate <= 5000000) {
  2446. + ds3103_writereg(state, 0xc0, 0x04);
  2447. + ds3103_writereg(state, 0x8a, 0x09);
  2448. + ds3103_writereg(state, 0x8b, 0x22);
  2449. + ds3103_writereg(state, 0x8c, 0x88);
  2450. + }
  2451. +
  2452. + break;
  2453. + case SYS_DVBS:
  2454. + default:
  2455. + value &= ~0x04;
  2456. + ds3103_writereg(state, 0x08, value);
  2457. + for (i = 0; i < sizeof(ds310x_dvbs_init_tab); i += 2)
  2458. + ds3103_writereg(state,
  2459. + ds310x_dvbs_init_tab[i],
  2460. + ds310x_dvbs_init_tab[i + 1]);
  2461. +
  2462. + target_mclk = 96000;
  2463. +
  2464. + value = ds3103_readreg(state, 0x4d);
  2465. + value &= ~0x02;
  2466. + ds3103_writereg(state, 0x4d, value);
  2467. + value = ds3103_readreg(state, 0x30);
  2468. + value &= ~0x10;
  2469. + ds3103_writereg(state, 0x30, value);
  2470. +
  2471. + break;
  2472. + }
  2473. +
  2474. + ds3103_set_clock_ratio(state, target_mclk);
  2475. +
  2476. + tmp1 = ds3103_readreg(state, 0x22);
  2477. + tmp2 = ds3103_readreg(state, 0x24);
  2478. +
  2479. + switch (target_mclk) {
  2480. + case 192000:
  2481. + tmp1 |= 0xc0;
  2482. + tmp2 &= 0x3f;
  2483. + break;
  2484. +
  2485. + case 144000:
  2486. + tmp1 &= 0x3f;
  2487. + tmp2 &= 0x7f;
  2488. + tmp2 |= 0x40;
  2489. + break;
  2490. +
  2491. + case 96000:
  2492. + default:
  2493. + tmp1 &= 0xbf;
  2494. + tmp1 |= 0x80;
  2495. +
  2496. + tmp2 &= 0x7f;
  2497. + tmp2 |= 0x40;
  2498. + break;
  2499. + }
  2500. +
  2501. + ds3103_writereg(state, 0x22, tmp1);
  2502. + ds3103_writereg(state, 0x24, tmp2);
  2503. +
  2504. + ds3103_writereg(state, 0x33, 0x99);
  2505. +
  2506. + /* enable 27MHz clock output */
  2507. + value = ds3103_readreg(state, 0x29);
  2508. + value &= 0x80;
  2509. + value &= ~0x10;
  2510. + ds3103_writereg(state, 0x29, value);
  2511. +
  2512. + /* enable ac coupling */
  2513. + value = ds3103_readreg(state, 0x25);
  2514. + value |= 0x08;
  2515. + ds3103_writereg(state, 0x25, value);
  2516. +
  2517. +
  2518. + /* enhance symbol rate performance */
  2519. + if ((c->symbol_rate / 1000) <= 3000) {
  2520. + ds3103_writereg(state, 0xc3, 0x08);
  2521. + ds3103_writereg(state, 0xc8, 0x20);
  2522. + ds3103_writereg(state, 0xc4, 0x08);
  2523. + ds3103_writereg(state, 0xc7, 0x00);
  2524. + } else if((c->symbol_rate / 1000) <= 10000) {
  2525. + ds3103_writereg(state, 0xc3, 0x08);
  2526. + ds3103_writereg(state, 0xc8, 0x10);
  2527. + ds3103_writereg(state, 0xc4, 0x08);
  2528. + ds3103_writereg(state, 0xc7, 0x00);
  2529. + } else {
  2530. + ds3103_writereg(state, 0xc3, 0x08);
  2531. + ds3103_writereg(state, 0xc8, 0x06);
  2532. + ds3103_writereg(state, 0xc4, 0x08);
  2533. + ds3103_writereg(state, 0xc7, 0x00);
  2534. + }
  2535. +
  2536. + /* normalized symbol rate rounded to the closest integer */
  2537. + tmp = (((c->symbol_rate / 1000) << 15) + 24000) / 48000;
  2538. +
  2539. + ds3103_writereg(state, 0x61, tmp & 0x00ff);
  2540. + ds3103_writereg(state, 0x62, (tmp & 0xff00) >> 8);
  2541. +
  2542. + /* co-channel interference cancellation disabled */
  2543. + value = ds3103_readreg(state, 0x56);
  2544. + value &= ~0x01;
  2545. + ds3103_writereg(state, 0x56, value);
  2546. + /* equalizer disabled */
  2547. + value = ds3103_readreg(state, 0x76);
  2548. + value &= ~0x80;
  2549. + ds3103_writereg(state, 0x76, value);
  2550. + /* offset */
  2551. + if ((c->symbol_rate / 1000) < 5000)
  2552. + offset_khz += 3000;
  2553. + ds3103_set_carrier_offset(fe, offset_khz, target_mclk);
  2554. +
  2555. + /* ds3000 out of software reset */
  2556. + ds3103_writereg(state, 0x00, 0x00);
  2557. + /* start ds3000 build-in uC */
  2558. + ds3103_writereg(state, 0xb2, 0x00);
  2559. +
  2560. +
  2561. + for (i = 0; i < 30 ; i++) {
  2562. + ds3103_read_status(fe, &status);
  2563. + if (status && FE_HAS_LOCK)
  2564. + break;
  2565. +
  2566. + msleep(10);
  2567. + }
  2568. +
  2569. + return 0;
  2570. +}
  2571. +
  2572. +static int ds3103_tune(struct dvb_frontend *fe,
  2573. + bool re_tune,
  2574. + unsigned int mode_flags,
  2575. + unsigned int *delay,
  2576. + fe_status_t *status)
  2577. +{
  2578. + if (re_tune) {
  2579. + int ret = ds3103_set_frontend(fe);
  2580. + if (ret)
  2581. + return ret;
  2582. + }
  2583. +
  2584. + *delay = HZ / 5;
  2585. +
  2586. + return ds3103_read_status(fe, status);
  2587. +}
  2588. +
  2589. +static enum dvbfe_algo ds3103_get_algo(struct dvb_frontend *fe)
  2590. +{
  2591. + dprintk("%s()\n", __func__);
  2592. + return DVBFE_ALGO_HW;
  2593. +}
  2594. +
  2595. +/*
  2596. + * Initialize or wake up device
  2597. + *
  2598. + * Power config will reset and load initial firmware if required
  2599. + */
  2600. +static int ds3103_initfe(struct dvb_frontend *fe)
  2601. +{
  2602. + struct ds3103_state *state = fe->demodulator_priv;
  2603. + int ret;
  2604. + u8 buf;
  2605. + u8 val_08;
  2606. +
  2607. + dprintk("%s()\n", __func__);
  2608. + /* hard reset */
  2609. + buf = ds3103_readreg(state, 0xb2);
  2610. + if (buf == 0x01) {
  2611. + ds3103_writereg(state, 0x00, 0x00);
  2612. + ds3103_writereg(state, 0xb2, 0x00);
  2613. + }
  2614. +
  2615. +
  2616. + /* global reset */
  2617. + ds3103_writereg(state, 0x07, 0xe0);
  2618. + ds3103_writereg(state, 0x07, 0x00);
  2619. + ds3103_writereg(state, 0x08, 0x01 | ds3103_readreg(state, 0x08));
  2620. + msleep(1);
  2621. +
  2622. + /* Load the firmware if required */
  2623. + ret = ds3103_firmware_ondemand(fe);
  2624. + if (ret != 0) {
  2625. + printk(KERN_ERR "%s: Unable initialize firmware\n", __func__);
  2626. + return ret;
  2627. + }
  2628. + /* ts out mode */
  2629. + val_08 = ds3103_readreg(state, 0x08);
  2630. + buf = ds3103_readreg(state, 0x27);
  2631. + buf &= ~0x01;
  2632. + ds3103_writereg(state, 0x27, buf);
  2633. + /* for dvb-s */
  2634. + buf = val_08 & (~0x04) ;
  2635. + ds3103_writereg(state, 0x08, buf);
  2636. + ds3103_set_ts_div(state, 6, 6);
  2637. +
  2638. + /* for dvb-s2 */
  2639. + buf = val_08 | 0x04 ;
  2640. + ds3103_writereg(state, 0x08, buf);
  2641. + ds3103_set_ts_div(state, 8, 9);
  2642. + buf = ds3103_readreg(state, 0xfd);
  2643. + buf |= 0x01;
  2644. + buf &= ~0x04;
  2645. +
  2646. + buf &= ~0xba;
  2647. + if (state->config->ci_mode)
  2648. + buf |= 0x40;
  2649. + else
  2650. + buf &= ~0x40;
  2651. +
  2652. + ds3103_writereg(state, 0xfd, buf);
  2653. + ds3103_writereg(state, 0x08, val_08);
  2654. + buf = ds3103_readreg(state, 0x27);
  2655. + buf |= 0x11;
  2656. + ds3103_writereg(state, 0x27, buf);
  2657. + buf = ds3103_readreg(state, 0x4d);
  2658. + buf &= ~0x02;
  2659. + ds3103_writereg(state, 0x4d, buf);
  2660. + buf = ds3103_readreg(state, 0x30);
  2661. + buf &= ~0x10;
  2662. + ds3103_writereg(state, 0x30, buf);
  2663. +
  2664. + return 0;
  2665. +}
  2666. +
  2667. +/* Put device to sleep */
  2668. +static int ds3103_sleep(struct dvb_frontend *fe)
  2669. +{
  2670. + struct ds3103_state *state = fe->demodulator_priv;
  2671. +
  2672. + if (state->config->set_lock_led)
  2673. + state->config->set_lock_led(fe, 0);
  2674. +
  2675. + dprintk("%s()\n", __func__);
  2676. + return 0;
  2677. +}
  2678. +
  2679. +static struct dvb_frontend_ops ds3103_ops = {
  2680. + .delsys = { SYS_DVBS, SYS_DVBS2 },
  2681. + .info = {
  2682. + .name = "Montage Technology DS3103/TS2022",
  2683. + .frequency_min = 950000,
  2684. + .frequency_max = 2150000,
  2685. + .frequency_stepsize = 1011, /* kHz for QPSK frontends */
  2686. + .frequency_tolerance = 5000,
  2687. + .symbol_rate_min = 1000000,
  2688. + .symbol_rate_max = 45000000,
  2689. + .caps = FE_CAN_INVERSION_AUTO |
  2690. + FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
  2691. + FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
  2692. + FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
  2693. + FE_CAN_2G_MODULATION |
  2694. + FE_CAN_QPSK | FE_CAN_RECOVER
  2695. + },
  2696. +
  2697. + .release = ds3103_release,
  2698. +
  2699. + .init = ds3103_initfe,
  2700. + .sleep = ds3103_sleep,
  2701. + .read_status = ds3103_read_status,
  2702. + .read_ber = ds3103_read_ber,
  2703. + .i2c_gate_ctrl = ds3103_i2c_gate_ctrl,
  2704. + .read_snr = ds3103_read_snr,
  2705. + .read_ucblocks = ds3103_read_ucblocks,
  2706. + .set_voltage = ds3103_set_voltage,
  2707. + .set_tone = ds3103_set_tone,
  2708. + .diseqc_send_master_cmd = ds3103_send_diseqc_msg,
  2709. + .diseqc_send_burst = ds3103_diseqc_send_burst,
  2710. + .get_frontend_algo = ds3103_get_algo,
  2711. +
  2712. + .set_frontend = ds3103_set_frontend,
  2713. + .tune = ds3103_tune,
  2714. +};
  2715. +
  2716. +module_param(debug, int, 0644);
  2717. +MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
  2718. +
  2719. +MODULE_DESCRIPTION("DVB Frontend module for Montage Technology "
  2720. + "DS3103 hardware");
  2721. +MODULE_AUTHOR("Tomazzo Muzumici");
  2722. +MODULE_LICENSE("GPL");
  2723. +MODULE_FIRMWARE(DS3103_DEFAULT_FIRMWARE);
  2724. diff -Naur a/drivers/media/dvb-frontends/ds3103.h b/drivers/media/dvb-frontends/ds3103.h
  2725. --- a/drivers/media/dvb-frontends/ds3103.h 1969-12-31 16:00:00.000000000 -0800
  2726. +++ b/drivers/media/dvb-frontends/ds3103.h 2015-02-05 14:04:01.000000000 -0800
  2727. @@ -0,0 +1,47 @@
  2728. +/*
  2729. + Montage Technology DS3103 - DVBS/S2 Demodulator driver
  2730. +
  2731. + This program is free software; you can redistribute it and/or modify
  2732. + it under the terms of the GNU General Public License as published by
  2733. + the Free Software Foundation; either version 2 of the License, or
  2734. + (at your option) any later version.
  2735. +
  2736. + This program is distributed in the hope that it will be useful,
  2737. + but WITHOUT ANY WARRANTY; without even the implied warranty of
  2738. + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  2739. + GNU General Public License for more details.
  2740. +
  2741. + You should have received a copy of the GNU General Public License
  2742. + along with this program; if not, write to the Free Software
  2743. + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  2744. +*/
  2745. +
  2746. +#ifndef DS3103_H
  2747. +#define DS3103_H
  2748. +
  2749. +#include <linux/kconfig.h>
  2750. +#include <linux/dvb/frontend.h>
  2751. +
  2752. +struct ds3103_config {
  2753. + /* the demodulator's i2c address */
  2754. + u8 demod_address;
  2755. + u8 ci_mode;
  2756. + /* Set device param to start dma */
  2757. + int (*set_ts_params)(struct dvb_frontend *fe, int is_punctured);
  2758. + /* Hook for Lock LED */
  2759. + void (*set_lock_led)(struct dvb_frontend *fe, int offon);
  2760. +};
  2761. +
  2762. +#if IS_ENABLED(CONFIG_DVB_DS3103)
  2763. +extern struct dvb_frontend *ds3103_attach(const struct ds3103_config *config,
  2764. + struct i2c_adapter *i2c);
  2765. +#else
  2766. +static inline
  2767. +struct dvb_frontend *ds3103_attach(const struct ds3103_config *config,
  2768. + struct i2c_adapter *i2c)
  2769. +{
  2770. + printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
  2771. + return NULL;
  2772. +}
  2773. +#endif /* CONFIG_DVB_DS3103 */
  2774. +#endif /* DS3103_H */
  2775. diff -Naur a/drivers/media/dvb-frontends/Kconfig b/drivers/media/dvb-frontends/Kconfig
  2776. --- a/drivers/media/dvb-frontends/Kconfig 2015-01-29 17:41:03.000000000 -0800
  2777. +++ b/drivers/media/dvb-frontends/Kconfig 2015-02-05 14:04:01.000000000 -0800
  2778. @@ -244,6 +244,20 @@
  2779. help
  2780. A DVB-S/S2 tuner module. Say Y when you want to support this frontend.
  2781.  
  2782. +config DVB_TS2022
  2783. + tristate "Montage Tehnology TS2022 based tuners"
  2784. + depends on DVB_CORE && I2C
  2785. + default m if !MEDIA_SUBDRV_AUTOSELECT
  2786. + help
  2787. + A DVB-S/S2 silicon tuner. Say Y when you want to support this tuner.
  2788. +
  2789. +config DVB_DS3103
  2790. + tristate "Montage Tehnology DS3103 based"
  2791. + depends on DVB_CORE && I2C
  2792. + default m if !MEDIA_SUBDRV_AUTOSELECT
  2793. + help
  2794. + A DVB-S/S2 tuner module. Say Y when you want to support this frontend.
  2795. +
  2796. config DVB_MB86A16
  2797. tristate "Fujitsu MB86A16 based"
  2798. depends on DVB_CORE && I2C
  2799. diff -Naur a/drivers/media/dvb-frontends/Makefile b/drivers/media/dvb-frontends/Makefile
  2800. --- a/drivers/media/dvb-frontends/Makefile 2015-01-29 17:41:03.000000000 -0800
  2801. +++ b/drivers/media/dvb-frontends/Makefile 2015-02-05 16:55:12.000000000 -0800
  2802. @@ -116,3 +116,6 @@
  2803. obj-$(CONFIG_DVB_AF9033) += af9033.o
  2804. obj-$(CONFIG_DVB_AS102_FE) += as102_fe.o
  2805. obj-$(CONFIG_DVB_TC90522) += tc90522.o
  2806. +obj-$(CONFIG_DVB_DS3103) += ds3103.o
  2807. +obj-$(CONFIG_DVB_TS2022) += ts2022.o
  2808. +
  2809. diff -Naur a/drivers/media/dvb-frontends/ts2022.c b/drivers/media/dvb-frontends/ts2022.c
  2810. --- a/drivers/media/dvb-frontends/ts2022.c 1969-12-31 16:00:00.000000000 -0800
  2811. +++ b/drivers/media/dvb-frontends/ts2022.c 2015-02-05 14:04:01.000000000 -0800
  2812. @@ -0,0 +1,452 @@
  2813. + /*
  2814. + Driver for Montage ts2022 DVBS/S2 Silicon tuner
  2815. +
  2816. + Copyright (C) 2012 Tomazzo Muzumici
  2817. +
  2818. + This program is free software; you can redistribute it and/or modify
  2819. + it under the terms of the GNU General Public License as published by
  2820. + the Free Software Foundation; either version 2 of the License, or
  2821. + (at your option) any later version.
  2822. +
  2823. + This program is distributed in the hope that it will be useful,
  2824. + but WITHOUT ANY WARRANTY; without even the implied warranty of
  2825. + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  2826. +
  2827. + GNU General Public License for more details.
  2828. +
  2829. + You should have received a copy of the GNU General Public License
  2830. + along with this program; if not, write to the Free Software
  2831. + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  2832. +
  2833. + */
  2834. +
  2835. +#include "dvb_frontend.h"
  2836. +#include "ts2022.h"
  2837. +
  2838. +static int debug;
  2839. +#define dprintk(args...) \
  2840. + do { \
  2841. + if (debug) \
  2842. + printk(KERN_DEBUG "ts2022: " args); \
  2843. + } while (0)
  2844. +
  2845. +#define TS2022_XTAL_FREQ 27000 /* in kHz */
  2846. +
  2847. +struct ts2022_priv {
  2848. + /* i2c details */
  2849. + int i2c_address;
  2850. + struct i2c_adapter *i2c;
  2851. + u32 frequency;
  2852. +};
  2853. +
  2854. +static int ts2022_release(struct dvb_frontend *fe)
  2855. +{
  2856. + kfree(fe->tuner_priv);
  2857. + fe->tuner_priv = NULL;
  2858. + return 0;
  2859. +}
  2860. +
  2861. +static int ts2022_writereg(struct dvb_frontend *fe, int reg, int data)
  2862. +{
  2863. + struct ts2022_priv *priv = fe->tuner_priv;
  2864. + u8 buf[] = { reg, data };
  2865. + struct i2c_msg msg[] = {
  2866. + {
  2867. + .addr = priv->i2c_address,
  2868. + .flags = 0,
  2869. + .buf = buf,
  2870. + .len = 2
  2871. + }
  2872. + };
  2873. + int err;
  2874. +
  2875. + dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
  2876. +
  2877. + if (fe->ops.i2c_gate_ctrl)
  2878. + fe->ops.i2c_gate_ctrl(fe, 1);
  2879. +
  2880. + err = i2c_transfer(priv->i2c, msg, 1);
  2881. + if (err != 1) {
  2882. + printk("%s: writereg error(err == %i, reg == 0x%02x,"
  2883. + " value == 0x%02x)\n", __func__, err, reg, data);
  2884. + return -EREMOTEIO;
  2885. + }
  2886. +
  2887. + if (fe->ops.i2c_gate_ctrl)
  2888. + fe->ops.i2c_gate_ctrl(fe, 0);
  2889. +
  2890. + return 0;
  2891. +}
  2892. +
  2893. +static int ts2022_readreg(struct dvb_frontend *fe, u8 reg)
  2894. +{
  2895. + struct ts2022_priv *priv = fe->tuner_priv;
  2896. + int ret;
  2897. + u8 b0[] = { reg };
  2898. + u8 b1[] = { 0 };
  2899. + struct i2c_msg msg[] = {
  2900. + {
  2901. + .addr = priv->i2c_address,
  2902. + .flags = 0,
  2903. + .buf = b0,
  2904. + .len = 1
  2905. + }, {
  2906. + .addr = priv->i2c_address,
  2907. + .flags = I2C_M_RD,
  2908. + .buf = b1,
  2909. + .len = 1
  2910. + }
  2911. + };
  2912. +
  2913. + if (fe->ops.i2c_gate_ctrl)
  2914. + fe->ops.i2c_gate_ctrl(fe, 1);
  2915. +
  2916. + ret = i2c_transfer(priv->i2c, msg, 2);
  2917. +
  2918. + if (ret != 2) {
  2919. + printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
  2920. + return ret;
  2921. + }
  2922. +
  2923. + if (fe->ops.i2c_gate_ctrl)
  2924. + fe->ops.i2c_gate_ctrl(fe, 0);
  2925. +
  2926. + dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]);
  2927. +
  2928. + return b1[0];
  2929. +}
  2930. +
  2931. +static int ts2022_sleep(struct dvb_frontend *fe)
  2932. +{
  2933. + struct ts2022_priv *priv = fe->tuner_priv;
  2934. + int ret;
  2935. + u8 buf[] = { 10, 0 };
  2936. + struct i2c_msg msg = {
  2937. + .addr = priv->i2c_address,
  2938. + .flags = 0,
  2939. + .buf = buf,
  2940. + .len = 2
  2941. + };
  2942. +
  2943. + dprintk("%s:\n", __func__);
  2944. +
  2945. + if (fe->ops.i2c_gate_ctrl)
  2946. + fe->ops.i2c_gate_ctrl(fe, 1);
  2947. +
  2948. + ret = i2c_transfer(priv->i2c, &msg, 1);
  2949. + if (ret != 1)
  2950. + dprintk("%s: i2c error\n", __func__);
  2951. +
  2952. + if (fe->ops.i2c_gate_ctrl)
  2953. + fe->ops.i2c_gate_ctrl(fe, 0);
  2954. +
  2955. + return (ret == 1) ? 0 : ret;
  2956. +}
  2957. +
  2958. +static int ts2022_set_params(struct dvb_frontend *fe)
  2959. +{
  2960. + struct ts2022_priv *priv = fe->tuner_priv;
  2961. + struct dtv_frontend_properties *c = &fe->dtv_property_cache;
  2962. + u8 mlpf, mlpf_new, mlpf_max, mlpf_min, nlpf, div4;
  2963. + u16 value, ndiv;
  2964. + u32 f3db;
  2965. +
  2966. + dprintk("%s:\n", __func__);
  2967. +
  2968. + ts2022_writereg(fe, 0x10, 0x0b);
  2969. + ts2022_writereg(fe, 0x11, 0x40);
  2970. + div4 = 0;
  2971. + if (c->frequency < 1103000) {
  2972. + ts2022_writereg(fe, 0x10, 0x1b);
  2973. + div4 = 1;
  2974. + ndiv = (c->frequency * (6 + 8) * 4)/TS2022_XTAL_FREQ ;
  2975. + } else
  2976. + ndiv = (c->frequency * (6 + 8) * 2)/TS2022_XTAL_FREQ ;
  2977. +
  2978. + ndiv = ndiv + ndiv %2 ;
  2979. + if (ndiv < 4095)
  2980. + value = ndiv - 1024;
  2981. + else if (ndiv < 6143 )
  2982. + value = ndiv + 1024;
  2983. + else
  2984. + value = ndiv + 3072;
  2985. +
  2986. + ts2022_writereg(fe, 0x01, (value & 0x3f00) >> 8);
  2987. + ts2022_writereg(fe, 0x02, value & 0x00ff);
  2988. + ts2022_writereg(fe, 0x03, 0x06);
  2989. + ts2022_writereg(fe, 0x51, 0x0f);
  2990. + ts2022_writereg(fe, 0x51, 0x1f);
  2991. + ts2022_writereg(fe, 0x50, 0x10);
  2992. + ts2022_writereg(fe, 0x50, 0x00);
  2993. + msleep(5);
  2994. +
  2995. + value = ts2022_readreg(fe, 0x14);
  2996. + value &=0x7f;
  2997. + if (value < 64 ) {
  2998. + value = ts2022_readreg(fe, 0x10);
  2999. + value |= 0x80;
  3000. + ts2022_writereg(fe, 0x10, value);
  3001. + ts2022_writereg(fe, 0x11, 0x6f);
  3002. +
  3003. + ts2022_writereg(fe, 0x51, 0x0f);
  3004. + ts2022_writereg(fe, 0x51, 0x1f);
  3005. + ts2022_writereg(fe, 0x50, 0x10);
  3006. + ts2022_writereg(fe, 0x50, 0x00);
  3007. + }
  3008. + msleep(5);
  3009. + value = ts2022_readreg(fe, 0x14);
  3010. + value &=0x1f;
  3011. + if (value > 19) {
  3012. + value = ts2022_readreg(fe, 0x10);
  3013. + value &= 0x1d;
  3014. + ts2022_writereg(fe, 0x10, value);
  3015. + }
  3016. + /*set the RF gain*/
  3017. + ts2022_writereg(fe, 0x60, 0x79);
  3018. +
  3019. + ts2022_writereg(fe, 0x51, 0x17);
  3020. + ts2022_writereg(fe, 0x51, 0x1f);
  3021. + ts2022_writereg(fe, 0x50, 0x08);
  3022. + ts2022_writereg(fe, 0x50, 0x00);
  3023. + msleep(5);
  3024. +
  3025. + ts2022_writereg(fe, 0x25, 0x00);
  3026. + ts2022_writereg(fe, 0x27, 0x70);
  3027. + ts2022_writereg(fe, 0x41, 0x09);
  3028. +
  3029. + ts2022_writereg(fe, 0x08, 0x0b);
  3030. + ts2022_writereg(fe, 0x04, 0x2e);
  3031. + ts2022_writereg(fe, 0x51, 0x1b);
  3032. + ts2022_writereg(fe, 0x51, 0x1f);
  3033. + ts2022_writereg(fe, 0x50, 0x04);
  3034. + ts2022_writereg(fe, 0x50, 0x00);
  3035. + msleep(5);
  3036. +
  3037. + f3db = ((c->symbol_rate / 1000) * 135) / 200 + 2000;
  3038. + if ((c->symbol_rate / 1000) < 5000)
  3039. + f3db += 3000;
  3040. + if (f3db < 7000)
  3041. + f3db = 7000;
  3042. + if (f3db > 40000)
  3043. + f3db = 40000;
  3044. +
  3045. + value = ts2022_readreg(fe, 0x26);
  3046. + value &= 0x3f ;
  3047. +
  3048. + ts2022_writereg(fe, 0x41, 0x0d);
  3049. +
  3050. + ts2022_writereg(fe, 0x51, 0x1b);
  3051. + ts2022_writereg(fe, 0x51, 0x1f);
  3052. + ts2022_writereg(fe, 0x50, 0x04);
  3053. + ts2022_writereg(fe, 0x50, 0x00);
  3054. + msleep(5);
  3055. + value = (value + (ts2022_readreg(fe, 0x26) & 0x3f)) / 2;
  3056. + mlpf = 0x2e * 207 / ((value << 1) + 151);
  3057. + mlpf_max = mlpf * 135 / 100;
  3058. + mlpf_min = mlpf * 78 / 100;
  3059. + if (mlpf_max > 63)
  3060. + mlpf_max = 63;
  3061. +
  3062. +
  3063. + value = 3200;
  3064. + nlpf = ((mlpf * f3db * 1000) + (value * TS2022_XTAL_FREQ / 2))
  3065. + / (value * TS2022_XTAL_FREQ);
  3066. +
  3067. + if (nlpf > 23)
  3068. + nlpf = 23;
  3069. + if (nlpf < 1)
  3070. + nlpf = 1;
  3071. +
  3072. + /* rounded to the closest integer */
  3073. + mlpf_new = ((TS2022_XTAL_FREQ * nlpf * value) +
  3074. + (1000 * f3db / 2)) / (1000 * f3db);
  3075. +
  3076. + if (mlpf_new < mlpf_min) {
  3077. + nlpf++;
  3078. + mlpf_new = ((TS2022_XTAL_FREQ * nlpf * value) +
  3079. + (1000 * f3db / 2)) / (1000 * f3db);
  3080. + }
  3081. +
  3082. + if (mlpf_new > mlpf_max)
  3083. + mlpf_new = mlpf_max;
  3084. +
  3085. + ts2022_writereg(fe, 0x04, mlpf_new);
  3086. + ts2022_writereg(fe, 0x06, nlpf);
  3087. + ts2022_writereg(fe, 0x51, 0x1b);
  3088. + ts2022_writereg(fe, 0x51, 0x1f);
  3089. + ts2022_writereg(fe, 0x50, 0x04);
  3090. + ts2022_writereg(fe, 0x50, 0x00);
  3091. + msleep(5);
  3092. +
  3093. + value = ts2022_readreg(fe, 0x26);
  3094. + value &= 0x3f;
  3095. + ts2022_writereg(fe, 0x41, 0x09);
  3096. +
  3097. + ts2022_writereg(fe, 0x51, 0x1b);
  3098. + ts2022_writereg(fe, 0x51, 0x1f);
  3099. + ts2022_writereg(fe, 0x50, 0x04);
  3100. + ts2022_writereg(fe, 0x50, 0x00);
  3101. + msleep(5);
  3102. + value = (value + (ts2022_readreg(fe, 0x26)&0x3f))/2;
  3103. +
  3104. + value |= 0x80;
  3105. + ts2022_writereg(fe, 0x25, value);
  3106. + ts2022_writereg(fe, 0x27, 0x30);
  3107. + ts2022_writereg(fe, 0x08, 0x09);
  3108. + ts2022_writereg(fe, 0x51, 0x1e);
  3109. + ts2022_writereg(fe, 0x51, 0x1f);
  3110. + ts2022_writereg(fe, 0x50, 0x01);
  3111. + ts2022_writereg(fe, 0x50, 0x00);
  3112. +
  3113. + msleep(60);
  3114. +
  3115. + priv->frequency = (u32)(ndiv * TS2022_XTAL_FREQ / (6 + 8) / (div4 + 1) / 2);
  3116. +
  3117. + printk("%s: offset %dkhz\n", __func__, priv->frequency - c->frequency);
  3118. + printk("%s: %dkhz %dkhz\n", __func__, c->frequency, priv->frequency);
  3119. +
  3120. + return 0;
  3121. +}
  3122. +
  3123. +static int ts2022_get_frequency(struct dvb_frontend *fe, u32 *frequency)
  3124. +{
  3125. + struct ts2022_priv *priv = fe->tuner_priv;
  3126. + *frequency = priv->frequency;
  3127. + return 0;
  3128. +}
  3129. +
  3130. +static int ts2022_init(struct dvb_frontend *fe)
  3131. +{
  3132. + ts2022_writereg(fe, 0x62, 0xec);
  3133. + ts2022_writereg(fe, 0x42, 0x6c);
  3134. +
  3135. + ts2022_writereg(fe, 0x7d, 0x9d);
  3136. + ts2022_writereg(fe, 0x7c, 0x9a);
  3137. + ts2022_writereg(fe, 0x7a, 0x76);
  3138. +
  3139. + ts2022_writereg(fe, 0x3b, 0x01);
  3140. + ts2022_writereg(fe, 0x63, 0x88);
  3141. +
  3142. + ts2022_writereg(fe, 0x61, 0x85);
  3143. + ts2022_writereg(fe, 0x22, 0x30);
  3144. + ts2022_writereg(fe, 0x30, 0x40);
  3145. + ts2022_writereg(fe, 0x20, 0x23);
  3146. + ts2022_writereg(fe, 0x24, 0x02);
  3147. + ts2022_writereg(fe, 0x12, 0xa0);
  3148. +
  3149. + return 0;
  3150. +}
  3151. +
  3152. +static int ts2022_read_signal_strength(struct dvb_frontend *fe,
  3153. + u16 *signal_strength)
  3154. +{
  3155. + int sig_reading = 0;
  3156. + u8 rfgain, bbgain, nngain;
  3157. + u8 rfagc;
  3158. + u32 gain = 0;
  3159. + dprintk("%s()\n", __func__);
  3160. +
  3161. + rfgain = ts2022_readreg(fe, 0x3d) & 0x1f;
  3162. + bbgain = ts2022_readreg(fe, 0x21) & 0x1f;
  3163. + rfagc = ts2022_readreg(fe, 0x3f);
  3164. + sig_reading = rfagc * 16 -670;
  3165. + if (sig_reading<0)
  3166. + sig_reading =0;
  3167. + nngain =ts2022_readreg(fe, 0x66);
  3168. + nngain = (nngain >> 3) & 0x07;
  3169. +
  3170. + if (rfgain < 0)
  3171. + rfgain = 0;
  3172. + if (rfgain > 15)
  3173. + rfgain = 15;
  3174. + if (bbgain < 2)
  3175. + bbgain = 2;
  3176. + if (bbgain > 16)
  3177. + bbgain = 16;
  3178. + if (nngain < 0)
  3179. + nngain = 0;
  3180. + if (nngain > 6)
  3181. + nngain = 6;
  3182. +
  3183. + if (sig_reading < 600)
  3184. + sig_reading = 600;
  3185. + if (sig_reading > 1600)
  3186. + sig_reading = 1600;
  3187. +
  3188. + gain = (u16) rfgain * 265 + (u16) bbgain * 338 + (u16) nngain * 285 + sig_reading * 176 / 100 - 3000;
  3189. +
  3190. +
  3191. + *signal_strength = gain*100;
  3192. +
  3193. + dprintk("%s: raw / cooked = 0x%04x / 0x%04x\n", __func__,
  3194. + sig_reading, *signal_strength);
  3195. +
  3196. + return 0;
  3197. +}
  3198. +
  3199. +static struct dvb_tuner_ops ts2022_tuner_ops = {
  3200. + .info = {
  3201. + .name = "TS2022",
  3202. + .frequency_min = 950000,
  3203. + .frequency_max = 2150000
  3204. + },
  3205. + .init = ts2022_init,
  3206. + .release = ts2022_release,
  3207. + .sleep = ts2022_sleep,
  3208. + .set_params = ts2022_set_params,
  3209. + .get_frequency = ts2022_get_frequency,
  3210. + .get_rf_strength = ts2022_read_signal_strength,
  3211. +};
  3212. +
  3213. +struct dvb_frontend *ts2022_attach(struct dvb_frontend *fe, int addr,
  3214. + struct i2c_adapter *i2c)
  3215. +{
  3216. + struct ts2022_priv *priv = NULL;
  3217. + u8 buf;
  3218. +
  3219. + dprintk("%s:\n", __func__);
  3220. +
  3221. + priv = kzalloc(sizeof(struct ts2022_priv), GFP_KERNEL);
  3222. + if (priv == NULL)
  3223. + return NULL;
  3224. +
  3225. + priv->i2c_address = addr;
  3226. + priv->i2c = i2c;
  3227. + fe->tuner_priv = priv;
  3228. +
  3229. + /* Wake Up the tuner */
  3230. + buf = ts2022_readreg(fe, 0x00);
  3231. + buf &= 0x03;
  3232. +
  3233. + if (buf == 0x00) {
  3234. + ts2022_writereg(fe, 0x00, 0x01);
  3235. + msleep(2);
  3236. + }
  3237. +
  3238. + ts2022_writereg(fe, 0x00, 0x03);
  3239. + msleep(2);
  3240. +
  3241. + /* Check the tuner version */
  3242. + buf = ts2022_readreg(fe, 0x00);
  3243. + if ((buf == 0xc3)|| (buf == 0x83))
  3244. + dprintk(KERN_INFO "%s: Find tuner TS2022!\n", __func__);
  3245. + else {
  3246. + dprintk(KERN_ERR "%s: Read tuner reg[0] = %d\n", __func__, buf);
  3247. + kfree(priv);
  3248. + return NULL;
  3249. + }
  3250. +
  3251. + memcpy(&fe->ops.tuner_ops, &ts2022_tuner_ops,
  3252. + sizeof(struct dvb_tuner_ops));
  3253. + fe->ops.read_signal_strength = fe->ops.tuner_ops.get_rf_strength;
  3254. +
  3255. + return fe;
  3256. +}
  3257. +EXPORT_SYMBOL(ts2022_attach);
  3258. +
  3259. +module_param(debug, int, 0644);
  3260. +MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
  3261. +
  3262. +MODULE_DESCRIPTION("DVB ts2022 driver");
  3263. +MODULE_AUTHOR("Tomazzo Muzumici");
  3264. +MODULE_LICENSE("GPL");
  3265. diff -Naur a/drivers/media/dvb-frontends/ts2022.h b/drivers/media/dvb-frontends/ts2022.h
  3266. --- a/drivers/media/dvb-frontends/ts2022.h 1969-12-31 16:00:00.000000000 -0800
  3267. +++ b/drivers/media/dvb-frontends/ts2022.h 2015-02-05 14:04:01.000000000 -0800
  3268. @@ -0,0 +1,50 @@
  3269. + /*
  3270. + Driver for Montage TS2022 DVBS/S2 Silicon tuner
  3271. +
  3272. + Copyright (C) 2012 Tomazzo Muzumici
  3273. +
  3274. + This program is free software; you can redistribute it and/or modify
  3275. + it under the terms of the GNU General Public License as published by
  3276. + the Free Software Foundation; either version 2 of the License, or
  3277. + (at your option) any later version.
  3278. +
  3279. + This program is distributed in the hope that it will be useful,
  3280. + but WITHOUT ANY WARRANTY; without even the implied warranty of
  3281. + MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  3282. +
  3283. + GNU General Public License for more details.
  3284. +
  3285. + You should have received a copy of the GNU General Public License
  3286. + along with this program; if not, write to the Free Software
  3287. + Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  3288. +
  3289. + */
  3290. +
  3291. +#ifndef TS2022_H
  3292. +#define TS2022_H
  3293. +
  3294. +#include <linux/kconfig.h>
  3295. +#include <linux/dvb/frontend.h>
  3296. +
  3297. +/**
  3298. + * Attach a ts2022 tuner to the supplied frontend structure.
  3299. + *
  3300. + * @param fe Frontend to attach to.
  3301. + * @param addr i2c address of the tuner.
  3302. + * @param i2c i2c adapter to use.
  3303. + * @return FE pointer on success, NULL on failure.
  3304. + */
  3305. +#if IS_ENABLED(CONFIG_DVB_TS2022)
  3306. +extern struct dvb_frontend *ts2022_attach(struct dvb_frontend *fe, int addr,
  3307. + struct i2c_adapter *i2c);
  3308. +#else
  3309. +static inline struct dvb_frontend *ts2022_attach(struct dvb_frontend *fe,
  3310. + int addr,
  3311. + struct i2c_adapter *i2c)
  3312. +{
  3313. + printk(KERN_WARNING "%s: driver disabled by Kconfig\n", __func__);
  3314. + return NULL;
  3315. +}
  3316. +#endif /* CONFIG_DVB_TS2022 */
  3317. +
  3318. +#endif /* TS2022_H */
  3319. diff -Naur a/drivers/media/rc/keymaps/Makefile b/drivers/media/rc/keymaps/Makefile
  3320. --- a/drivers/media/rc/keymaps/Makefile 2015-01-29 17:41:03.000000000 -0800
  3321. +++ b/drivers/media/rc/keymaps/Makefile 2015-02-05 14:04:01.000000000 -0800
  3322. @@ -94,6 +94,7 @@
  3323. rc-total-media-in-hand-02.o \
  3324. rc-trekstor.o \
  3325. rc-tt-1500.o \
  3326. + rc-tt-4600.o \
  3327. rc-twinhan1027.o \
  3328. rc-videomate-m1f.o \
  3329. rc-videomate-s350.o \
  3330. diff -Naur a/drivers/media/rc/keymaps/rc-tt-4600.c b/drivers/media/rc/keymaps/rc-tt-4600.c
  3331. --- a/drivers/media/rc/keymaps/rc-tt-4600.c 1969-12-31 16:00:00.000000000 -0800
  3332. +++ b/drivers/media/rc/keymaps/rc-tt-4600.c 2015-02-05 14:04:01.000000000 -0800
  3333. @@ -0,0 +1,79 @@
  3334. +/* rc-tt_4600.h - Keytable for Geniatech based TT4600 Remote Controller
  3335. + * derived from drivers/media/rc/keymaps/rc-su3000.c
  3336. + * Copyright (c) 2013 by Evgeny Plehov <Evgeny Plehov@ukr.net>
  3337. + *
  3338. + * This program is free software; you can redistribute it and/or modify
  3339. + * it under the terms of the GNU General Public License as published by
  3340. + * the Free Software Foundation; either version 2 of the License, or
  3341. + * (at your option) any later version.
  3342. + */
  3343. +
  3344. +#include <media/rc-map.h>
  3345. +#include <linux/module.h>
  3346. +
  3347. +static struct rc_map_table tt_4600[] = {
  3348. + { 0x41, KEY_POWER },
  3349. + { 0x42, KEY_SHUFFLE },
  3350. + { 0x43, KEY_1 },
  3351. + { 0x44, KEY_2 },
  3352. + { 0x45, KEY_3 },
  3353. + { 0x46, KEY_4 },
  3354. + { 0x47, KEY_5 },
  3355. + { 0x48, KEY_6 },
  3356. + { 0x49, KEY_7 },
  3357. + { 0x4a, KEY_8 },
  3358. + { 0x4b, KEY_9 },
  3359. + { 0x4c, KEY_0 },
  3360. + { 0x4d, KEY_UP },
  3361. + { 0x4e, KEY_LEFT },
  3362. + { 0x4f, KEY_OK },
  3363. + { 0x50, KEY_RIGHT },
  3364. + { 0x51, KEY_DOWN },
  3365. + { 0x52, KEY_INFO },
  3366. + { 0x53, KEY_EXIT },
  3367. + { 0x54, KEY_RED },
  3368. + { 0x55, KEY_GREEN },
  3369. + { 0x56, KEY_YELLOW },
  3370. + { 0x57, KEY_BLUE },
  3371. + { 0x58, KEY_MUTE },
  3372. + { 0x59, KEY_TEXT },
  3373. + { 0x5a, KEY_MODE },
  3374. + { 0x61, KEY_OPTION },
  3375. + { 0x62, KEY_EPG },
  3376. + { 0x63, KEY_CHANNELUP },
  3377. + { 0x64, KEY_CHANNELDOWN },
  3378. + { 0x65, KEY_VOLUMEUP },
  3379. + { 0x66, KEY_VOLUMEDOWN },
  3380. + { 0x67, KEY_SETUP },
  3381. + { 0x7a, KEY_RECORD },
  3382. + { 0x7b, KEY_PLAY },
  3383. + { 0x7c, KEY_STOP },
  3384. + { 0x7d, KEY_REWIND },
  3385. + { 0x7e, KEY_PAUSE },
  3386. + { 0x7f, KEY_FORWARD },
  3387. +};
  3388. +
  3389. +static struct rc_map_list tt_4600_map = {
  3390. + .map = {
  3391. + .scan = tt_4600,
  3392. + .size = ARRAY_SIZE(tt_4600),
  3393. + .rc_type = RC_TYPE_UNKNOWN, /* Legacy IR type */
  3394. + .name = RC_MAP_TT_4600,
  3395. + }
  3396. +};
  3397. +
  3398. +static int __init init_rc_map_tt_4600(void)
  3399. +{
  3400. + return rc_map_register(&tt_4600_map);
  3401. +}
  3402. +
  3403. +static void __exit exit_rc_map_tt_4600(void)
  3404. +{
  3405. + rc_map_unregister(&tt_4600_map);
  3406. +}
  3407. +
  3408. +module_init(init_rc_map_tt_4600)
  3409. +module_exit(exit_rc_map_tt_4600)
  3410. +
  3411. +MODULE_LICENSE("GPL");
  3412. +MODULE_AUTHOR("Evgeny Plehov <Evgeny Plehov@ukr.net>");
  3413. diff -Naur a/drivers/media/usb/dvb-usb/dw2102.c b/drivers/media/usb/dvb-usb/dw2102.c
  3414. --- a/drivers/media/usb/dvb-usb/dw2102.c 2015-01-29 17:41:03.000000000 -0800
  3415. +++ b/drivers/media/usb/dvb-usb/dw2102.c 2015-02-05 14:04:01.000000000 -0800
  3416. @@ -23,7 +23,9 @@
  3417. #include "mt312.h"
  3418. #include "zl10039.h"
  3419. #include "ts2020.h"
  3420. +#include "ts2022.h"
  3421. #include "ds3000.h"
  3422. +#include "ds3103.h"
  3423. #include "stv0900.h"
  3424. #include "stv6110.h"
  3425. #include "stb6100.h"
  3426. @@ -87,6 +89,18 @@
  3427. #define USB_PID_GOTVIEW_SAT_HD 0x5456
  3428. #endif
  3429.  
  3430. +#ifndef USB_PID_TEVII_S662
  3431. +#define USB_PID_TEVII_S662 0xd662
  3432. +#endif
  3433. +
  3434. +#ifndef USB_PID_TEVII_S482_1
  3435. +#define USB_PID_TEVII_S482_1 0xd483
  3436. +#endif
  3437. +
  3438. +#ifndef USB_PID_TEVII_S482_2
  3439. +#define USB_PID_TEVII_S482_2 0xd484
  3440. +#endif
  3441. +
  3442. #define DW210X_READ_MSG 0
  3443. #define DW210X_WRITE_MSG 1
  3444.  
  3445. @@ -1117,6 +1131,12 @@
  3446. .gate = TDA18271_GATE_DIGITAL,
  3447. };
  3448.  
  3449. +static struct ds3103_config su3000_ds3103_config = {
  3450. + .demod_address = 0x68,
  3451. + .ci_mode = 0,
  3452. + .set_lock_led = dw210x_led_ctrl,
  3453. +};
  3454. +
  3455. static u8 m88rs2000_inittab[] = {
  3456. DEMOD_WRITE, 0x9a, 0x30,
  3457. DEMOD_WRITE, 0x00, 0x01,
  3458. @@ -1343,6 +1363,7 @@
  3459. if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0)
  3460. err("command 0x0e transfer failed.");
  3461.  
  3462. + /* power on su3000 */
  3463. obuf[0] = 0xe;
  3464. obuf[1] = 0x02;
  3465. obuf[2] = 1;
  3466. @@ -1358,6 +1379,7 @@
  3467. if (dvb_usb_generic_rw(d->dev, obuf, 3, ibuf, 1, 0) < 0)
  3468. err("command 0x0e transfer failed.");
  3469.  
  3470. + msleep(20);
  3471. obuf[0] = 0xe;
  3472. obuf[1] = 0x83;
  3473. obuf[2] = 1;
  3474. @@ -1371,18 +1393,27 @@
  3475. err("command 0x51 transfer failed.");
  3476.  
  3477. d->fe_adap[0].fe = dvb_attach(ds3000_attach, &su3000_ds3000_config,
  3478. - &d->dev->i2c_adap);
  3479. - if (d->fe_adap[0].fe == NULL)
  3480. - return -EIO;
  3481. -
  3482. - if (dvb_attach(ts2020_attach, d->fe_adap[0].fe,
  3483. - &dw2104_ts2020_config,
  3484. - &d->dev->i2c_adap)) {
  3485. + &d->dev->i2c_adap);
  3486. + if (d->fe_adap[0].fe != NULL) {
  3487. + if (dvb_attach(ts2020_attach, d->fe_adap[0].fe,
  3488. + &dw2104_ts2020_config,
  3489. + &d->dev->i2c_adap)) {
  3490. info("Attached DS3000/TS2020!\n");
  3491. return 0;
  3492. + }
  3493. + }
  3494. +
  3495. + d->fe_adap[0].fe = dvb_attach(ds3103_attach, &su3000_ds3103_config,
  3496. + &d->dev->i2c_adap);
  3497. + if (d->fe_adap[0].fe != NULL) {
  3498. + if (dvb_attach(ts2022_attach, d->fe_adap[0].fe, 0x60,
  3499. + &d->dev->i2c_adap)) {
  3500. + info("Attached at addr. 0x60 DS3103/TS2022!\n");
  3501. + return 0;
  3502. + }
  3503. }
  3504.  
  3505. - info("Failed to attach DS3000/TS2020!\n");
  3506. + info("Failed to attach DS3X0X/TS202X!\n");
  3507. return -EIO;
  3508. }
  3509.  
  3510. @@ -1559,8 +1590,17 @@
  3511. TEVII_S421,
  3512. TEVII_S632,
  3513. TERRATEC_CINERGY_S2_R2,
  3514. + TT_S2_4600,
  3515. GOTVIEW_SAT_HD,
  3516. GENIATECH_T220,
  3517. + VP2000,
  3518. + TEVII_S662,
  3519. + TEVII_S482_1,
  3520. + TEVII_S482_2,
  3521. + TERRATEC_S2_BOX,
  3522. + TERRATEC_DUAL_1,
  3523. + TERRATEC_DUAL_2,
  3524. +
  3525. };
  3526.  
  3527. static struct usb_device_id dw2102_table[] = {
  3528. @@ -1582,8 +1622,16 @@
  3529. [TEVII_S421] = {USB_DEVICE(0x9022, USB_PID_TEVII_S421)},
  3530. [TEVII_S632] = {USB_DEVICE(0x9022, USB_PID_TEVII_S632)},
  3531. [TERRATEC_CINERGY_S2_R2] = {USB_DEVICE(USB_VID_TERRATEC, 0x00b0)},
  3532. + [TT_S2_4600] = {USB_DEVICE(0x0b48, 0x3011)},
  3533. [GOTVIEW_SAT_HD] = {USB_DEVICE(0x1FE1, USB_PID_GOTVIEW_SAT_HD)},
  3534. + [VP2000] = {USB_DEVICE(0x9022, 0x2000)},
  3535. + [TEVII_S662] = {USB_DEVICE(0x9022, USB_PID_TEVII_S662)},
  3536. + [TEVII_S482_1] = {USB_DEVICE(0x9022, USB_PID_TEVII_S482_1)},
  3537. + [TEVII_S482_2] = {USB_DEVICE(0x9022, USB_PID_TEVII_S482_2)},
  3538. [GENIATECH_T220] = {USB_DEVICE(0x1f4d, 0xD220)},
  3539. + [TERRATEC_S2_BOX] = {USB_DEVICE(USB_VID_TERRATEC, 0x0105)},
  3540. + [TERRATEC_DUAL_1] = {USB_DEVICE(0x153B,0x1181)},
  3541. + [TERRATEC_DUAL_2] = {USB_DEVICE(0x153B,0x1182)},
  3542. { }
  3543. };
  3544.  
  3545. @@ -2061,6 +2109,57 @@
  3546. }
  3547. };
  3548.  
  3549. +
  3550. +static struct dvb_usb_device_description d2000 = {
  3551. + "VisionPlus VP2000 USB",
  3552. + {&dw2102_table[VP2000], NULL},
  3553. + {NULL},
  3554. +};
  3555. +
  3556. +struct dvb_usb_device_properties *s662;
  3557. +static struct dvb_usb_device_description d662 = {
  3558. + "TeVii S662",
  3559. + {&dw2102_table[TEVII_S662], NULL},
  3560. + {NULL},
  3561. +};
  3562. +
  3563. +static struct dvb_usb_device_description d482_1 = {
  3564. + "TeVii S482.1 USB",
  3565. + {&dw2102_table[TEVII_S482_1], NULL},
  3566. + {NULL},
  3567. +};
  3568. +
  3569. +static struct dvb_usb_device_description d482_2 = {
  3570. + "TeVii S482.2 USB",
  3571. + {&dw2102_table[TEVII_S482_2], NULL},
  3572. + {NULL},
  3573. +};
  3574. +
  3575. +static struct dvb_usb_device_description d662t = {
  3576. + "Terratec Cinergy S2 USB BOX",
  3577. + {&dw2102_table[TERRATEC_S2_BOX], NULL},
  3578. + {NULL},
  3579. +};
  3580. +
  3581. +static struct dvb_usb_device_description d482t_1 = {
  3582. + "Terratec Cinergy S2 Dual 1 USB",
  3583. + {&dw2102_table[TERRATEC_DUAL_1], NULL},
  3584. + {NULL},
  3585. +};
  3586. +
  3587. +static struct dvb_usb_device_description d482t_2 = {
  3588. + "Terratec Cinergy S2 Dual 2 USB",
  3589. + {&dw2102_table[TERRATEC_DUAL_2], NULL},
  3590. + {NULL},
  3591. +};
  3592. +
  3593. +struct dvb_usb_device_properties *tt4600;
  3594. +static struct dvb_usb_device_description d4600 = {
  3595. + "TT Connect S2 4600",
  3596. + {&dw2102_table[TT_S2_4600], NULL},
  3597. + {NULL},
  3598. +};
  3599. +
  3600. static int dw2102_probe(struct usb_interface *intf,
  3601. const struct usb_device_id *id)
  3602. {
  3603. @@ -2111,11 +2210,50 @@
  3604. kfree(p7500);
  3605. return -ENOMEM;
  3606. }
  3607. - s421->num_device_descs = 2;
  3608. + s421->num_device_descs = 3;
  3609. s421->devices[0] = d421;
  3610. s421->devices[1] = d632;
  3611. + s421->devices[2] = d2000;
  3612. s421->adapter->fe[0].frontend_attach = m88rs2000_frontend_attach;
  3613.  
  3614. + s662 = kmemdup(&su3000_properties,
  3615. + sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
  3616. + if (!s662) {
  3617. + kfree(s421);
  3618. + kfree(p1100);
  3619. + kfree(s660);
  3620. + kfree(p7500);
  3621. + return -ENOMEM;
  3622. + }
  3623. + s662->num_device_descs = 6;
  3624. + s662->devices[0] = d662;
  3625. + s662->devices[1] = d482_1;
  3626. + s662->devices[2] = d482_2;
  3627. + s662->devices[3] = d662t;
  3628. + s662->devices[4] = d482t_1;
  3629. + s662->devices[5] = d482t_2;
  3630. + s662->rc.core.rc_codes = RC_MAP_TEVII_NEC;
  3631. + s662->rc.core.rc_query = dw2102_rc_query;
  3632. + s662->rc.core.rc_interval = 250;
  3633. +
  3634. + tt4600 = kmemdup(&su3000_properties,
  3635. + sizeof(struct dvb_usb_device_properties), GFP_KERNEL);
  3636. + if (!tt4600) {
  3637. + kfree(s421);
  3638. + kfree(p1100);
  3639. + kfree(s660);
  3640. + kfree(p7500);
  3641. + kfree(s662);
  3642. + return -ENOMEM;
  3643. + }
  3644. +
  3645. + tt4600->num_device_descs = 1;
  3646. + tt4600->devices[0] = d4600;
  3647. + tt4600->rc.core.rc_codes = RC_MAP_TT_4600;
  3648. + tt4600->rc.core.rc_query = dw2102_rc_query;
  3649. + tt4600->rc.core.rc_interval = 250;
  3650. + tt4600->adapter->fe[0].frontend_attach = su3000_frontend_attach;
  3651. +
  3652. if (0 == dvb_usb_device_init(intf, &dw2102_properties,
  3653. THIS_MODULE, NULL, adapter_nr) ||
  3654. 0 == dvb_usb_device_init(intf, &dw2104_properties,
  3655. @@ -2132,6 +2270,10 @@
  3656. THIS_MODULE, NULL, adapter_nr) ||
  3657. 0 == dvb_usb_device_init(intf, s421,
  3658. THIS_MODULE, NULL, adapter_nr) ||
  3659. + 0 == dvb_usb_device_init(intf, s662,
  3660. + THIS_MODULE, NULL, adapter_nr) ||
  3661. + 0 == dvb_usb_device_init(intf, tt4600,
  3662. + THIS_MODULE, NULL, adapter_nr) ||
  3663. 0 == dvb_usb_device_init(intf, &su3000_properties,
  3664. THIS_MODULE, NULL, adapter_nr) ||
  3665. 0 == dvb_usb_device_init(intf, &t220_properties,
  3666. @@ -2153,7 +2295,10 @@
  3667. MODULE_AUTHOR("Igor M. Liplianin (c) liplianin@me.by");
  3668. MODULE_DESCRIPTION("Driver for DVBWorld DVB-S 2101, 2102, DVB-S2 2104,"
  3669. " DVB-C 3101 USB2.0,"
  3670. - " TeVii S600, S630, S650, S660, S480, S421, S632"
  3671. + " TeVii S600, S630, S650, S660, S480, S421, S632, S662, S482"
  3672. + " Technotrend S2-4600,"
  3673. + " Terratec Cinergy S2 USB BOX,"
  3674. + " Terratec Cinergy S2 PCIe Dual,"
  3675. " Prof 1100, 7500 USB2.0,"
  3676. " Geniatech SU3000, T220 devices");
  3677. MODULE_VERSION("0.1");
  3678. diff -Naur a/drivers/media/usb/dvb-usb/Kconfig b/drivers/media/usb/dvb-usb/Kconfig
  3679. --- a/drivers/media/usb/dvb-usb/Kconfig 2015-01-29 17:41:03.000000000 -0800
  3680. +++ b/drivers/media/usb/dvb-usb/Kconfig 2015-02-05 14:04:01.000000000 -0800
  3681. @@ -275,6 +275,8 @@
  3682. select DVB_ZL10039 if MEDIA_SUBDRV_AUTOSELECT
  3683. select DVB_DS3000 if MEDIA_SUBDRV_AUTOSELECT
  3684. select DVB_TS2020 if MEDIA_SUBDRV_AUTOSELECT
  3685. + select DVB_DS3103 if MEDIA_SUBDRV_AUTOSELECT
  3686. + select DVB_TS2022 if MEDIA_SUBDRV_AUTOSELECT
  3687. select DVB_STB6100 if MEDIA_SUBDRV_AUTOSELECT
  3688. select DVB_STV6110 if MEDIA_SUBDRV_AUTOSELECT
  3689. select DVB_STV0900 if MEDIA_SUBDRV_AUTOSELECT
  3690. diff -Naur a/drivers/mmc/core/sd.c b/drivers/mmc/core/sd.c
  3691. --- a/drivers/mmc/core/sd.c 2015-01-29 17:41:03.000000000 -0800
  3692. +++ b/drivers/mmc/core/sd.c 2015-02-05 14:04:01.000000000 -0800
  3693. @@ -366,6 +366,15 @@
  3694. return -ENOMEM;
  3695. }
  3696.  
  3697. + /*
  3698. + * Some SDHC cards, notably those with a Sandisk SD controller
  3699. + * (also found in Kingston products) need a bit of slack
  3700. + * before successfully handling the SWITCH command. So far,
  3701. + * cards identifying themselves as "SD04G" and "SD08G" are
  3702. + * affected
  3703. + */
  3704. + udelay(100);
  3705. +
  3706. err = mmc_sd_switch(card, 1, 0, 1, status);
  3707. if (err)
  3708. goto out;
  3709. diff -Naur a/drivers/net/ethernet/marvell/mv643xx_eth.c b/drivers/net/ethernet/marvell/mv643xx_eth.c
  3710. --- a/drivers/net/ethernet/marvell/mv643xx_eth.c 2015-01-29 17:41:03.000000000 -0800
  3711. +++ b/drivers/net/ethernet/marvell/mv643xx_eth.c 2015-02-05 14:04:01.000000000 -0800
  3712. @@ -3112,7 +3112,7 @@
  3713. dev->watchdog_timeo = 2 * HZ;
  3714. dev->base_addr = 0;
  3715.  
  3716. - dev->features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_TSO;
  3717. + dev->features = NETIF_F_SG | NETIF_F_IP_CSUM;
  3718. dev->vlan_features = dev->features;
  3719.  
  3720. dev->features |= NETIF_F_RXCSUM;
  3721. diff -Naur a/drivers/net/Kconfig b/drivers/net/Kconfig
  3722. --- a/drivers/net/Kconfig 2015-01-29 17:41:03.000000000 -0800
  3723. +++ b/drivers/net/Kconfig 2015-02-05 14:04:01.000000000 -0800
  3724. @@ -26,6 +26,7 @@
  3725. if NETDEVICES
  3726.  
  3727. config MII
  3728. + default y
  3729. tristate
  3730.  
  3731. config NET_CORE
  3732. diff -Naur a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c
  3733. --- a/drivers/pinctrl/mvebu/pinctrl-kirkwood.c 2015-01-29 17:41:03.000000000 -0800
  3734. +++ b/drivers/pinctrl/mvebu/pinctrl-kirkwood.c 2015-02-05 14:04:01.000000000 -0800
  3735. @@ -120,7 +120,7 @@
  3736. MPP_VAR_FUNCTION(0x5, "sata0", "act", V(0, 1, 1, 1, 1, 0))),
  3737. MPP_MODE(12,
  3738. MPP_VAR_FUNCTION(0x0, "gpo", NULL, V(1, 1, 1, 0, 1, 0)),
  3739. - MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(0, 0, 0, 1, 0, 0)),
  3740. + MPP_VAR_FUNCTION(0x0, "gpio", NULL, V(1, 1, 1, 1, 1, 0)),
  3741. MPP_VAR_FUNCTION(0x1, "sdio", "clk", V(1, 1, 1, 1, 1, 0)),
  3742. MPP_VAR_FUNCTION(0xa, "audio", "spdifo", V(0, 0, 0, 0, 1, 0)),
  3743. MPP_VAR_FUNCTION(0xb, "spi", "mosi", V(0, 0, 0, 0, 1, 0)),
  3744. diff -Naur a/include/linux/ide.h b/include/linux/ide.h
  3745. --- a/include/linux/ide.h 2015-01-29 17:41:03.000000000 -0800
  3746. +++ b/include/linux/ide.h 2015-02-05 14:04:01.000000000 -0800
  3747. @@ -1516,7 +1516,10 @@
  3748.  
  3749. static inline void ide_dump_identify(u8 *id)
  3750. {
  3751. - print_hex_dump(KERN_INFO, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
  3752. +
  3753. + print_hex_dump(KERN_DEBUG, "", DUMP_PREFIX_NONE, 16, 2, id, 512, 0);
  3754. +
  3755. +
  3756. }
  3757.  
  3758. static inline int hwif_to_node(ide_hwif_t *hwif)
  3759. diff -Naur a/include/linux/leds.h b/include/linux/leds.h
  3760. --- a/include/linux/leds.h 2015-01-29 17:41:03.000000000 -0800
  3761. +++ b/include/linux/leds.h 2015-02-05 14:04:01.000000000 -0800
  3762. @@ -1,6 +1,7 @@
  3763. /*
  3764. * Driver model for leds and led triggers
  3765. *
  3766. + * Copyright 2013 bodhi <mibodhi@gmail.com>
  3767. * Copyright (C) 2005 John Lenz <lenz@cs.wisc.edu>
  3768. * Copyright (C) 2005 Richard Purdie <rpurdie@openedhand.com>
  3769. *
  3770. @@ -225,9 +226,9 @@
  3771.  
  3772. /* Trigger specific functions */
  3773. #ifdef CONFIG_LEDS_TRIGGER_IDE_DISK
  3774. -extern void ledtrig_ide_activity(void);
  3775. +extern void ledtrig_ide_activity(int portno);
  3776. #else
  3777. -static inline void ledtrig_ide_activity(void) {}
  3778. +static inline void ledtrig_ide_activity(int portno) {}
  3779. #endif
  3780.  
  3781. #if defined(CONFIG_LEDS_TRIGGER_CAMERA) || defined(CONFIG_LEDS_TRIGGER_CAMERA_MODULE)
  3782. diff -Naur a/include/linux/nsa3xx-hwmon.h b/include/linux/nsa3xx-hwmon.h
  3783. --- a/include/linux/nsa3xx-hwmon.h 1969-12-31 16:00:00.000000000 -0800
  3784. +++ b/include/linux/nsa3xx-hwmon.h 2015-02-05 14:04:01.000000000 -0800
  3785. @@ -0,0 +1,21 @@
  3786. +/*
  3787. + * include/linux/nsa3xx.hwmon.h
  3788. + *
  3789. + * Platform data structure for ZyXEL NSA3xx hwmon driver
  3790. + *
  3791. + * This file is licensed under the terms of the GNU General Public
  3792. + * License version 2. This program is licensed "as is" without any
  3793. + * warranty of any kind, whether express or implied.
  3794. + */
  3795. +
  3796. +#ifndef __LINUX_NSA3XX_HWMON_H
  3797. +#define __LINUX_NSA3XX_HWMON_H
  3798. +
  3799. +struct nsa3xx_hwmon_platform_data {
  3800. + /* GPIO pins */
  3801. + unsigned act_pin;
  3802. + unsigned clk_pin;
  3803. + unsigned data_pin;
  3804. +};
  3805. +
  3806. +#endif /* __LINUX_NSA3XX_HWMON_H */
  3807. diff -Naur a/include/media/rc-map.h b/include/media/rc-map.h
  3808. --- a/include/media/rc-map.h 2015-01-29 17:41:03.000000000 -0800
  3809. +++ b/include/media/rc-map.h 2015-02-05 14:04:01.000000000 -0800
  3810. @@ -204,6 +204,7 @@
  3811. #define RC_MAP_TOTAL_MEDIA_IN_HAND_02 "rc-total-media-in-hand-02"
  3812. #define RC_MAP_TREKSTOR "rc-trekstor"
  3813. #define RC_MAP_TT_1500 "rc-tt-1500"
  3814. +#define RC_MAP_TT_4600 "rc-tt-4600"
  3815. #define RC_MAP_TWINHAN_VP1027_DVBS "rc-twinhan1027"
  3816. #define RC_MAP_VIDEOMATE_K100 "rc-videomate-k100"
  3817. #define RC_MAP_VIDEOMATE_S350 "rc-videomate-s350"
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