View difference between Paste ID: E2UTpvur and FjZ1JaDY

 #define UART_BASE		0x90000000
 
 #define UART_TX_REG					0x0
 #define UART_RX_REG					0x0
 #define UART_INT_ENABLE_REG			0x1
 #define UART_INT_ID_REG				0x2
 #define UART_FIFO_CTRL_REG			0x2
 #define UART_LINE_CTRL_REG			0x3
 #define UART_MODEM_CTRL_REG			0x4
 #define UART_LINE_STATUS_REG		0x5
 
 #define UART_DIV_LSB_REG			0x0
 #define UART_DIV_MSB_REG			0x1
 
 #define UART_LSR_THRE				0x20
 
 boot_init:
 	l.movhi	r0, 0
 	l.movhi	r1, hi(UART_BASE)
 	l.ori	r2, r0, 0x80
 	l.sb	UART_LINE_CTRL_REG(r1), r2
 	l.sb	UART_DIV_MSB_REG(r1), r0
 	l.ori	r2, r0, 0x1B
 	l.sb	UART_DIV_LSB_REG(r1), r2
 	l.ori	r2, r0, 0x83
-	l.sb	UART_TX_REG(r1), r3
+
 	l.jal	uart_putc
 	l.ori	r3, r0, '>'
 	l.jal	uart_putc
 	l.ori	r3, r0, 'H'
 	l.jal	uart_putc
 	l.ori	r3, r0, 'e'
 	l.jal	uart_putc
 	l.ori	r3, r0, 'l'
 	l.jal	uart_putc
 	l.ori	r3, r0, 'l'
 	l.jal	uart_putc
 	l.ori	r3, r0, 'o'
 	l.jal	uart_putc
 	l.ori	r3, r0, '!'
 	l.j		.
 	l.nop
 
 uart_putc:
 	l.lbz	r4, UART_LINE_STATUS_REG(r1)
 	l.andi	r4, r4, UART_LSR_THRE
 	l.sfnei	r4, UART_LSR_THRE
 	l.bf	uart_putc
 	 l.nop
 	l.jr 	r9
 	l.sb	UART_TX_REG(r1), r3