EPM240t100C5N 7 Segment Counter

// Code modified from examples found at:  http://fpga4fun.com/Opto3.html.

module seg7(
    input clk,
    output segA, segB, segC, segD, segE, segF, segG, segDP, seg1
);

// cnt is used as a 24 bit prescaler with a 50MHz global clock in at PIN_12.
// Updates the clock roughly 3 times a second.
reg [23:0] cnt;
always @(posedge clk) cnt <= cnt+24'h1;
wire cntovf = &cnt;

// BCD is a counter that counts from 0 to 9
reg [3:0] BCD;
always @(posedge clk) if(cntovf) BCD <= (BCD==4'h9 ? 4'h0 : BCD+4'h1);

// 9 bit array to hold data for each 7 seg display.
// There are 8 seven segment displays on the EPM240T100C5N.
// Each display has a PNP driver to turn the display on/off.
// The 8 leftmost bits set each segment either on or off.
// The rightmost bit turns the PNP driver on or off.
// Do a bitwise negate (~) on the array since the segments are all active low.
// They turn on when they are connected to ground.

reg [8:0] SevenSeg;
always @(*)
case(BCD)
    4'h0: SevenSeg = ~9'b111111001;
    4'h1: SevenSeg = ~9'b011000001;
    4'h2: SevenSeg = ~9'b110110101;
    4'h3: SevenSeg = ~9'b111100101;
    4'h4: SevenSeg = ~9'b011001101;
    4'h5: SevenSeg = ~9'b101101101;
    4'h6: SevenSeg = ~9'b101111101;
    4'h7: SevenSeg = ~9'b111000001;
    4'h8: SevenSeg = ~9'b111111101;
    4'h9: SevenSeg = ~9'b111101101;
    default: SevenSeg = ~9'b000000001;
endcase

assign {segA, segB, segC, segD, segE, segF, segG, segDP, seg1} = SevenSeg;
endmodule