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- /*
- * ======== Standard MSP430 includes ========
- */
- #include <msp430.h>
- /*
- * ======== Grace related includes ========
- */
- #include <ti/mcu/msp430/Grace.h>
- #include <ti/mcu/msp430/csl/CSL.h>
- long int i;
- #define FDdelay for(i=10000; i<0;i--){}
- #define RDdelay for(i=6000; i<0;i--){}
- //Gear definitions
- #define G1
- #define G2
- #define G3
- #define G4
- #define G5
- #define G6
- #define G7
- #define G8
- #define G9
- #define G10
- #define G11
- #define G12
- //Gstate
- //smallest Gear = 1
- //highest Gear = 12
- int volatile Gstate = 0;
- // FD position definitions
- #define FDlarge 1050 // Largest
- #define FDsmall 1600 // smallest
- #define FDoffset 70 //enter custom value
- #define FDtrim 13
- //FDstate
- // small gear = 1
- // large gear = 2
- int volatile FDstate = 0;
- // RD position definitions
- #define RD1 2060
- #define RD2 1950
- #define RD3 1870
- #define RD4 1800
- #define RD5 1700
- #define RD6 1650
- #define RD7 1550
- #define RD8 1450
- #define RD9 1350
- #define RDoffset 20
- // RDstate
- // largest = 9
- // smallest = 1
- int volatile RDstate = 0;
- /* GearCombinationsPossible
- * FD | RD
- * G1 1 | 1
- * G2 1 | 2
- * G3 1 | 3
- * G4 1 | 4
- * G5 1 | 5
- * G6 2 | 3
- * G7 2 | 4
- * G8 2 | 5
- * G9 2 | 6
- * G10 2 | 7
- * G11 2 | 8
- * G12 2 | 9
- */
- /*
- * ======== main ========
- */
- int main(int argc, char *argv[]) {
- CSL_init(); // Activate Grace-generated configuration
- // Enter LPM with global interrupt enabled
- __bis_SR_register(LPM0_bits + GIE);
- return (0);
- }
- void shift(void);
- {
- if (P1IFG & BIT4) {
- //downshift
- //front downshift button
- // clear the flag
- P1IFG &= ~BIT4;
- switch (Gstate) {
- case 12:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD9 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD9;
- RDstate = 9;
- Gstate = 12;
- break;
- case 11:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD8 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD8;
- RDstate = 8;
- Gstate = 11;
- break;
- case 10:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD7 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD7;
- RDstate = 7;
- Gstate = 10;
- break;
- case 9:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD6 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD6;
- RDstate = 6;
- Gstate = 9;
- break;
- case 8:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD5 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD5;
- RDstate = 5;
- Gstate = 8;
- break;
- case 7:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD4 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD4;
- RDstate = 4;
- Gstate = 7;
- break;
- case 6:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD3 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD3;
- RDstate = 3;
- Gstate = 6;
- break;
- case 5:
- TA0CCR1 = FDsmall + FDoffset + 30;
- FDdelay;
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD5 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD5;
- RDstate = 5;
- Gstate = 5;
- break;
- case 4:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD4 + 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD4;
- RDstate = 4;
- Gstate = 4;
- break;
- case 3:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD3 + RDoffset;
- RDdelay;
- TA1CCR2 = RD3;
- RDstate = 3;
- Gstate = 3;
- break;
- case 2:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD2 + RDoffset;
- RDdelay;
- TA1CCR2 = RD2;
- RDstate = 2;
- Gstate = 2;
- break;
- case 1:
- TA1CCR2 = RD1;
- RDstate = 1;
- TA0CCR1 = FDsmall;
- FDstate = 1;
- Gstate = 1;
- break;
- default:
- TA1CCR2 = RD1;
- RDstate = 1;
- TA0CCR1 = FDsmall;
- FDstate = 1;
- Gstate = 1;
- break;
- }
- }
- } else {
- //upshifting
- // rear downshift button
- // clear the flag
- P1IFG &= ~BIT7;
- switch (Gstate) {
- case 1:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD1 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD1;
- RDstate = 1;
- Gstate = 1;
- break;
- case 2:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD2 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD2;
- RDstate = 2;
- Gstate = 2;
- break;
- case 3:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD3 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD3;
- RDstate = 3;
- Gstate = 3;
- break;
- case 4:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD4 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD4;
- RDstate = 4;
- Gstate = 4;
- break;
- case 5:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD5 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD5;
- RDstate = 5;
- Gstate = 5;
- break;
- case 6:
- TA0CCR1 = FDlarge - FDoffset;
- FDdelay;
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD3 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD3;
- RDstate = 6;
- Gstate = 6;
- break;
- case 7:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD4 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD4;
- RDstate = 4;
- Gstate = 7;
- break;
- case 8:
- TA0CCR1 = FDlarge;
- FDstate = 2;
- TA1CCR2 = RD5 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD5;
- RDstate = 5;
- Gstate = 8;
- break;
- case 9:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD6 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD6;
- RDstate = 6;
- Gstate = 9;
- break;
- case 10:
- TA0CCR1 = FDsmall;
- FDstate = 1;
- TA1CCR2 = RD7 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD7;
- RDstate = 7;
- Gstate = 10;
- break;
- case 11:
- TA0CCR1 = FDsmall;
- FDstate = 2;
- TA1CCR2 = RD8 - 5*RDoffset;
- RDdelay;
- TA1CCR2 = RD8;
- RDstate = 8;
- Gstate = 11;
- break;
- case 12:
- TA1CCR2 = RD9;
- RDstate = 9;
- TA0CCR1 = FDlarge;
- FDstate = 2;
- Gstate = 12;
- break;
- default:
- TA1CCR2 = RD9;
- RDstate = 9;
- TA0CCR1 = FDlarge;
- FDstate = 2;
- Gstate = 12;
- break;
- }
- }
- return (0);
- }
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