Advertisement
trini

DaVinci DMA engine conversion v3 - AM1808 EVM - SPI root

Aug 23rd, 2012
427
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 12.36 KB | None | 0 0
  1. bootm 0xC0600000
  2. ## Booting kernel from Legacy Image at c0600000 ...
  3. Image Name: Linux-3.6.0-rc2-00404-ge5a834f
  4. Image Type: ARM Linux Kernel Image (uncompressed)
  5. Data Size: 2180608 Bytes = 2.1 MiB
  6. Load Address: c0008000
  7. Entry Point: c0008000
  8. Verifying Checksum ... OK
  9. Loading Kernel Image ... OK
  10. OK
  11.  
  12. Starting kernel ...
  13.  
  14. Uncompressing Linux... done, booting the kernel.
  15. Booting Linux on physical CPU 0
  16. Linux version 3.6.0-rc2-00404-ge5a834f (trini@bill-the-cat) (gcc version 4.6.3 (Ubuntu/Linaro 4.6.3-1ubuntu5) ) #2 PREEMPT Wed Aug 22 21:12:53 MST 2012
  17. CPU: ARM926EJ-S [41069265] revision 5 (ARMv5TEJ), cr=00053177
  18. CPU: VIVT data cache, VIVT instruction cache
  19. Machine: DaVinci DA850/OMAP-L138/AM18x EVM
  20. Memory policy: ECC disabled, Data cache writethrough
  21. BUG: mapping for 0xffff0000 at 0xfffe0000 out of vmalloc space
  22. DaVinci da850/omap-l138/am18x variant 0x1
  23. Built 1 zonelists in Zone order, mobility grouping on. Total pages: 32512
  24. Kernel command line: console=ttyS2,115200n8 root=/dev/mtdblock4 rootfstype=jffs2 rw ip=off
  25. PID hash table entries: 512 (order: -1, 2048 bytes)
  26. Dentry cache hash table entries: 16384 (order: 4, 65536 bytes)
  27. Inode-cache hash table entries: 8192 (order: 3, 32768 bytes)
  28. Memory: 128MB = 128MB total
  29. Memory: 125472k/125472k available, 5600k reserved, 0K highmem
  30. Virtual kernel memory layout:
  31. vector : 0xffff0000 - 0xffff1000 ( 4 kB)
  32. fixmap : 0xfff00000 - 0xfffe0000 ( 896 kB)
  33. vmalloc : 0xc8800000 - 0xff000000 ( 872 MB)
  34. lowmem : 0xc0000000 - 0xc8000000 ( 128 MB)
  35. modules : 0xbf000000 - 0xc0000000 ( 16 MB)
  36. .text : 0xc0008000 - 0xc03db000 (3916 kB)
  37. .init : 0xc03db000 - 0xc04003ec ( 149 kB)
  38. .data : 0xc0402000 - 0xc042bc40 ( 168 kB)
  39. .bss : 0xc042bc64 - 0xc0453608 ( 159 kB)
  40. SLUB: Genslabs=13, HWalign=32, Order=0-3, MinObjects=0, CPUs=1, Nodes=1
  41. NR_IRQS:245
  42. sched_clock: 32 bits at 24MHz, resolution 41ns, wraps every 178956ms
  43. Console: colour dummy device 80x30
  44. Calibrating delay loop... 148.88 BogoMIPS (lpj=744448)
  45. pid_max: default: 32768 minimum: 301
  46. Mount-cache hash table entries: 512
  47. CPU: Testing write buffer coherency: ok
  48. Setting up static identity map for 0xc02ef210 - 0xc02ef268
  49. DaVinci: 144 gpio irqs
  50. NET: Registered protocol family 16
  51. DMA: preallocated 256 KiB pool for atomic coherent allocations
  52. MUX: initialized MMCSD0_DAT_0
  53. MUX: Setting register MMCSD0_DAT_0
  54. PINMUX10 (0x00000028) = 0x00000000 -> 0x00000200
  55. MUX: initialized MMCSD0_DAT_1
  56. MUX: Setting register MMCSD0_DAT_1
  57. PINMUX10 (0x00000028) = 0x00000200 -> 0x00002200
  58. MUX: initialized MMCSD0_DAT_2
  59. MUX: Setting register MMCSD0_DAT_2
  60. PINMUX10 (0x00000028) = 0x00002200 -> 0x00022200
  61. MUX: initialized MMCSD0_DAT_3
  62. MUX: Setting register MMCSD0_DAT_3
  63. PINMUX10 (0x00000028) = 0x00022200 -> 0x00222200
  64. MUX: initialized MMCSD0_CLK
  65. MUX: Setting register MMCSD0_CLK
  66. PINMUX10 (0x00000028) = 0x00222200 -> 0x00222202
  67. MUX: initialized MMCSD0_CMD
  68. MUX: Setting register MMCSD0_CMD
  69. PINMUX10 (0x00000028) = 0x00222202 -> 0x00222222
  70. MUX: initialized GPIO4_0
  71. MUX: Setting register GPIO4_0
  72. PINMUX10 (0x00000028) = 0x00222222 -> 0x80222222
  73. MUX: initialized GPIO4_1
  74. MUX: Setting register GPIO4_1
  75. PINMUX10 (0x00000028) = 0x80222222 -> 0x88222222
  76. MUX: initialized MMCSD1_DAT_0
  77. MUX: Setting register MMCSD1_DAT_0
  78. PINMUX18 (0x00000048) = 0x00000000 -> 0x00000200
  79. MUX: initialized MMCSD1_DAT_1
  80. MUX: Setting register MMCSD1_DAT_1
  81. PINMUX19 (0x0000004c) = 0x00000000 -> 0x00020000
  82. MUX: initialized MMCSD1_DAT_2
  83. MUX: Setting register MMCSD1_DAT_2
  84. PINMUX19 (0x0000004c) = 0x00020000 -> 0x00022000
  85. MUX: initialized MMCSD1_DAT_3
  86. MUX: Setting register MMCSD1_DAT_3
  87. PINMUX19 (0x0000004c) = 0x00022000 -> 0x00022200
  88. MUX: initialized MMCSD1_CLK
  89. MUX: Setting register MMCSD1_CLK
  90. PINMUX18 (0x00000048) = 0x00000200 -> 0x00002200
  91. MUX: initialized MMCSD1_CMD
  92. MUX: Setting register MMCSD1_CMD
  93. PINMUX18 (0x00000048) = 0x00002200 -> 0x00022200
  94. MUX: initialized GPIO6_9
  95. MUX: Setting register GPIO6_9
  96. PINMUX13 (0x00000034) = 0x00000000 -> 0x08000000
  97. MUX: initialized GPIO6_10
  98. MUX: Setting register GPIO6_10
  99. PINMUX13 (0x00000034) = 0x08000000 -> 0x08800000
  100. MUX: initialized AHCLKX
  101. MUX: Setting register AHCLKX
  102. PINMUX0 (0x00000000) = 0x44000000 -> 0x44100000
  103. MUX: initialized ACLKX
  104. MUX: Setting register ACLKX
  105. PINMUX0 (0x00000000) = 0x44100000 -> 0x44100010
  106. MUX: initialized AFSX
  107. MUX: Setting register AFSX
  108. PINMUX0 (0x00000000) = 0x44100010 -> 0x44101010
  109. MUX: initialized AHCLKR
  110. MUX: Setting register AHCLKR
  111. PINMUX0 (0x00000000) = 0x44101010 -> 0x44111010
  112. MUX: initialized ACLKR
  113. MUX: Setting register ACLKR
  114. PINMUX0 (0x00000000) = 0x44111010 -> 0x44111011
  115. MUX: initialized AFSR
  116. MUX: Setting register AFSR
  117. PINMUX0 (0x00000000) = 0x44111011 -> 0x44111111
  118. MUX: initialized AMUTE
  119. MUX: Setting register AMUTE
  120. PINMUX0 (0x00000000) = 0x44111111 -> 0x41111111
  121. MUX: initialized AXR_11
  122. MUX: Setting register AXR_11
  123. PINMUX1 (0x00000004) = 0x00000000 -> 0x00010000
  124. MUX: initialized AXR_12
  125. MUX: Setting register AXR_12
  126. PINMUX1 (0x00000004) = 0x00010000 -> 0x00011000
  127. MUX: initialized LCD_D_0
  128. MUX: Setting register LCD_D_0
  129. PINMUX17 (0x00000044) = 0x00000000 -> 0x00000020
  130. MUX: initialized LCD_D_1
  131. MUX: Setting register LCD_D_1
  132. PINMUX17 (0x00000044) = 0x00000020 -> 0x00000022
  133. MUX: initialized LCD_D_2
  134. MUX: Setting register LCD_D_2
  135. PINMUX16 (0x00000040) = 0x00000000 -> 0x20000000
  136. MUX: initialized LCD_D_3
  137. MUX: Setting register LCD_D_3
  138. PINMUX16 (0x00000040) = 0x20000000 -> 0x22000000
  139. MUX: initialized LCD_D_4
  140. MUX: Setting register LCD_D_4
  141. PINMUX16 (0x00000040) = 0x22000000 -> 0x22200000
  142. MUX: initialized LCD_D_5
  143. MUX: Setting register LCD_D_5
  144. PINMUX16 (0x00000040) = 0x22200000 -> 0x22220000
  145. MUX: initialized LCD_D_6
  146. MUX: Setting register LCD_D_6
  147. PINMUX16 (0x00000040) = 0x22220000 -> 0x22222000
  148. MUX: initialized LCD_D_7
  149. MUX: Setting register LCD_D_7
  150. PINMUX16 (0x00000040) = 0x22222000 -> 0x22222200
  151. MUX: initialized LCD_D_8
  152. MUX: Setting register LCD_D_8
  153. PINMUX18 (0x00000048) = 0x00022200 -> 0x00022220
  154. MUX: initialized LCD_D_9
  155. MUX: Setting register LCD_D_9
  156. PINMUX18 (0x00000048) = 0x00022220 -> 0x00022222
  157. MUX: initialized LCD_D_10
  158. MUX: Setting register LCD_D_10
  159. PINMUX17 (0x00000044) = 0x00000022 -> 0x20000022
  160. MUX: initialized LCD_D_11
  161. MUX: Setting register LCD_D_11
  162. PINMUX17 (0x00000044) = 0x20000022 -> 0x22000022
  163. MUX: initialized LCD_D_12
  164. MUX: Setting register LCD_D_12
  165. PINMUX17 (0x00000044) = 0x22000022 -> 0x22200022
  166. MUX: initialized LCD_D_13
  167. MUX: Setting register LCD_D_13
  168. PINMUX17 (0x00000044) = 0x22200022 -> 0x22220022
  169. MUX: initialized LCD_D_14
  170. MUX: Setting register LCD_D_14
  171. PINMUX17 (0x00000044) = 0x22220022 -> 0x22222022
  172. MUX: initialized LCD_D_15
  173. MUX: Setting register LCD_D_15
  174. PINMUX17 (0x00000044) = 0x22222022 -> 0x22222222
  175. MUX: initialized LCD_PCLK
  176. MUX: Setting register LCD_PCLK
  177. PINMUX18 (0x00000048) = 0x00022222 -> 0x02022222
  178. MUX: initialized LCD_HSYNC
  179. MUX: Setting register LCD_HSYNC
  180. PINMUX19 (0x0000004c) = 0x00022200 -> 0x00022202
  181. MUX: initialized LCD_VSYNC
  182. MUX: Setting register LCD_VSYNC
  183. PINMUX19 (0x0000004c) = 0x00022202 -> 0x00022222
  184. MUX: initialized NLCD_AC_ENB_CS
  185. MUX: Setting register NLCD_AC_ENB_CS
  186. PINMUX19 (0x0000004c) = 0x00022222 -> 0x02022222
  187. MUX: initialized GPIO2_8
  188. MUX: Setting register GPIO2_8
  189. PINMUX5 (0x00000014) = 0x00110110 -> 0x80110110
  190. MUX: initialized GPIO2_15
  191. MUX: Setting register GPIO2_15
  192. PINMUX5 (0x00000014) = 0x80110110 -> 0x80110118
  193. MUX: initialized RTC_ALARM
  194. MUX: Setting register RTC_ALARM
  195. PINMUX0 (0x00000000) = 0x41111111 -> 0x21111111
  196. bio: create slab <bio-0> at 0
  197. edma-dma-engine edma-dma-engine.0: TI EDMA DMA engine driver
  198. edma-dma-engine edma-dma-engine.1: TI EDMA DMA engine driver
  199. i2c_davinci i2c_davinci.1: Runtime PM disabled, clock forced on.
  200. Switching to clocksource timer0_1
  201. NET: Registered protocol family 2
  202. TCP established hash table entries: 4096 (order: 3, 32768 bytes)
  203. TCP bind hash table entries: 4096 (order: 2, 16384 bytes)
  204. TCP: Hash tables configured (established 4096 bind 4096)
  205. TCP: reno registered
  206. UDP hash table entries: 256 (order: 0, 4096 bytes)
  207. UDP-Lite hash table entries: 256 (order: 0, 4096 bytes)
  208. NET: Registered protocol family 1
  209. RPC: Registered named UNIX socket transport module.
  210. RPC: Registered udp transport module.
  211. RPC: Registered tcp transport module.
  212. RPC: Registered tcp NFSv4.1 backchannel transport module.
  213. EMAC: MII PHY configured, RMII PHY will not be functional
  214. MUX: initialized GPIO2_6
  215. MUX: Setting register GPIO2_6
  216. PINMUX6 (0x00000018) = 0x00000000 -> 0x00000080
  217. jffs2: version 2.2. (NAND) © 2001-2006 Red Hat, Inc.
  218. msgmni has been set to 245
  219. io scheduler noop registered (default)
  220. start plist test
  221. end plist test
  222. Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled
  223. serial8250.0: ttyS0 at MMIO 0x1c42000 (irq = 25) is a 16550A
  224. serial8250.0: ttyS1 at MMIO 0x1d0c000 (irq = 53) is a 16550A
  225. serial8250.0: ttyS2 at MMIO 0x1d0d000 (irq = 61) is a 16550A
  226. console [ttyS2] enabled
  227. brd: module loaded
  228. spi_davinci spi_davinci.1: Runtime PM disabled, clock forced on.
  229. edma-dma-engine edma-dma-engine.0: allocated channel for 0:18
  230. edma-dma-engine edma-dma-engine.0: allocated channel for 0:19
  231. spi_davinci spi_davinci.1: DMA: supported
  232. spi_davinci spi_davinci.1: DMA: RX channel: 18, TX channel: 19, event queue: 0
  233. spi_davinci spi_davinci.1: master is unqueued, this is deprecated
  234. m25p80 spi1.0: m25p64 (8192 Kbytes)
  235. Creating 6 MTD partitions on "m25p80":
  236. 0x000000000000-0x000000010000 : "UBL"
  237. 0x000000010000-0x000000090000 : "U-Boot"
  238. 0x000000090000-0x0000000a0000 : "U-Boot-Env"
  239. 0x0000000a0000-0x000000320000 : "Kernel"
  240. 0x000000320000-0x000000720000 : "Filesystem"
  241. 0x0000007f0000-0x000000800000 : "MAC-Address"
  242. Read MAC addr from SPI Flash: 00:08:ee:04:be:ef
  243. spi_davinci spi_davinci.1: Controller at 0xfef0e000
  244. dm9000 Ethernet Driver, V1.31
  245. davinci_mdio davinci_mdio.0: Runtime PM disabled, clock forced on.
  246. davinci_mdio davinci_mdio.0: davinci mdio revision 1.5
  247. davinci_mdio davinci_mdio.0: detected phy mask fffffffe
  248. libphy: davinci_mdio.0: probed
  249. davinci_mdio davinci_mdio.0: phy[0]: device davinci_mdio-0:00, driver unknown
  250. i2c /dev entries driver
  251. davinci_mmc davinci_mmc.0: Runtime PM disabled, clock forced on.
  252. edma-dma-engine edma-dma-engine.0: allocated channel for 0:17
  253. edma-dma-engine edma-dma-engine.0: allocated channel for 0:16
  254. davinci_mmc davinci_mmc.0: Using DMA, 4-bit mode
  255. davinci_mmc davinci_mmc.1: Runtime PM disabled, clock forced on.
  256. edma-dma-engine edma-dma-engine.1: allocated channel for 1:29
  257. edma-dma-engine edma-dma-engine.1: allocated channel for 1:28
  258. mmc0: new high speed SD card at address 0002
  259. mmcblk0: mmc0:0002 00000 1.86 GiB
  260. mmcblk0: p1 p2
  261. davinci_mmc davinci_mmc.1: Using DMA, 4-bit mode
  262. TCP: cubic registered
  263. NET: Registered protocol family 17
  264. console [netcon0] enabled
  265. netconsole: network logging started
  266. davinci_emac davinci_emac.1: Runtime PM disabled, clock forced on.
  267. /home/trini/work/ssd/kernel/linux/drivers/rtc/hctosys.c: unable to open rtc device (rtc0)
  268. VFS: Mounted root (jffs2 filesystem) on device 31:4.
  269. Freeing init memory: 148K
  270. INIT: version 2.86 booting
  271. Please wait: booting...
  272. Starting udev
  273. WARNING: -e needs -E or -F
  274. udevd (992): /proc/992/oom_adj is deprecated, please use /proc/992/oom_score_adj instead.
  275. EXT4-fs (mmcblk0p2): mounted filesystem with ordered data mode. Opts: (null)
  276. Remounting root file system...
  277. Caching udev devnodes
  278. Populating dev cache
  279. root: mount: mounting rootfs on / failed: No such file or directory
  280. root: mount: mounting usbfs on /proc/bus/usb failed: No such file or directory
  281. Cannot create link over existing -/etc/resolv.conf-.
  282. hwclock: can't open '/dev/misc/rtc': No such file or directory
  283. Thu Aug 23 03:35:00 UTC 2012
  284. hwclock: can't open '/dev/misc/rtc': No such file or directory
  285. INIT: Entering runlevel: 5
  286. Starting syslogd/klogd: done
  287.  
  288. .-------.
  289. | | .-.
  290. | | |-----.-----.-----.| | .----..-----.-----.
  291. | | | __ | ---'| '--.| .-'| | |
  292. | | | | | |--- || --'| | | ' | | | |
  293. '---'---'--'--'--. |-----''----''--' '-----'-'-'-'
  294. -' |
  295. '---'
  296.  
  297. The Angstrom Distribution am180x-evm ttyS2
  298.  
  299. Angstrom 2010.7-test-20110311 am180x-evm ttyS2
  300.  
  301. am180x-evm login: root
  302. root@am180x-evm:~#
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement