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dtc output RPI

Oct 24th, 2019
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  1. /dts-v1/;
  2.  
  3. / {
  4. compatible = "raspberrypi,3-model-b\0brcm,bcm2837";
  5. serial-number = "000000001d8481d0";
  6. model = "Raspberry Pi 3 Model B Rev 1.2";
  7. memreserve = < 0x3b400000 0x4c00000 >;
  8. interrupt-parent = < 0x01 >;
  9. #address-cells = < 0x01 >;
  10. #size-cells = < 0x01 >;
  11.  
  12. clocks {
  13. compatible = "simple-bus";
  14. #address-cells = < 0x01 >;
  15. #size-cells = < 0x00 >;
  16.  
  17. clock@3 {
  18. compatible = "fixed-clock";
  19. #clock-cells = < 0x00 >;
  20. phandle = < 0x04 >;
  21. reg = < 0x03 >;
  22. clock-output-names = "osc";
  23. clock-frequency = < 0x124f800 >;
  24. };
  25.  
  26. clock@4 {
  27. compatible = "fixed-clock";
  28. #clock-cells = < 0x00 >;
  29. phandle = < 0x17 >;
  30. reg = < 0x04 >;
  31. clock-output-names = "otg";
  32. clock-frequency = < 0x1c9c3800 >;
  33. };
  34. };
  35.  
  36. __overrides__ {
  37. pwr_led_gpio = "\0\0\00gpios:4";
  38. cam0-led-ctrl;
  39. i2c1 = "\0\0\0'status";
  40. i2c_vc = "\0\0\0&status";
  41. sd_overclock = "\0\0\0+brcm,overclock-50:0";
  42. sdio_overclock = "\0\0\0,brcm,overclock-50:0\0\0\0\0-brcm,overclock-50:0";
  43. i2c0_baudrate = "\0\0\0&clock-frequency:0";
  44. sd_pio_limit = "\0\0\0+brcm,pio-limit:0";
  45. act_led_trigger = "\0\0\0/linux,default-trigger";
  46. audio = "\0\0\0(status";
  47. sd_debug = "\0\0\0+brcm,debug";
  48. cam0-pwdn-ctrl;
  49. cache_line_size;
  50. cam0-led;
  51. i2c1_baudrate = "\0\0\0'clock-frequency:0";
  52. spi = "\0\0\0%status";
  53. i2c_arm = "\0\0\0'status";
  54. pwr_led_activelow = "\0\0\00gpios:8";
  55. uart0 = "\0\0\0\"status";
  56. i2c2_iknowwhatimdoing = [ 00 00 00 15 73 74 61 74 75 73 00 ];
  57. i2s = "\0\0\0$status";
  58. i2c0 = "\0\0\0&status";
  59. arm_freq = < 0x1e 0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a 0x30000000 0x1f636c 0x6f636b2d 0x66726571 0x75656e63 0x793a3000 0x20 0x636c6f63 0x6b2d6672 0x65717565 0x6e63793a 0x30000000 0x21636c 0x6f636b2d 0x66726571 0x75656e63 0x793a3000 >;
  60. watchdog = "\0\0\0)status";
  61. i2c_baudrate = "\0\0\0'clock-frequency:0";
  62. i2c_vc_baudrate = "\0\0\0&clock-frequency:0";
  63. axiperf = "\0\0\0.status";
  64. act_led_activelow = "\0\0\0/gpios:8";
  65. i2c2_baudrate = [ 00 00 00 15 63 6c 6f 63 6b 2d 66 72 65 71 75 65 6e 63 79 3a 30 00 ];
  66. sd_force_pio = "\0\0\0+brcm,force-pio?";
  67. pwr_led_trigger = "\0\0\00linux,default-trigger";
  68. cam0-pwdn;
  69. uart1 = "\0\0\0#status";
  70. i2c_arm_baudrate = "\0\0\0'clock-frequency:0";
  71. random = "\0\0\0*status";
  72. act_led_gpio = "\0\0\0/gpios:4";
  73. i2c = "\0\0\0'status";
  74. };
  75.  
  76. arm-pmu {
  77. compatible = "arm,cortex-a7-pmu";
  78. interrupt-parent = < 0x19 >;
  79. interrupts = < 0x09 0x04 >;
  80. };
  81.  
  82. system {
  83. linux,serial = < 0x00 0x1d8481d0 >;
  84. linux,revision = < 0xa02082 >;
  85. };
  86.  
  87. __symbols__ {
  88. uart0_gpio14 = "/soc/gpio@7e200000/uart0_gpio14";
  89. pwm = "/soc/pwm@7e20c000";
  90. gpclk1_gpio5 = "/soc/gpio@7e200000/gpclk1_gpio5";
  91. clk_usb = "/clocks/clock@4";
  92. pixelvalve0 = "/soc/pixelvalve@7e206000";
  93. uart0_ctsrts_gpio30 = "/soc/gpio@7e200000/uart0_ctsrts_gpio30";
  94. uart1_ctsrts_gpio16 = "/soc/gpio@7e200000/uart1_ctsrts_gpio16";
  95. uart0_gpio32 = "/soc/gpio@7e200000/uart0_gpio32";
  96. intc = "/soc/interrupt-controller@7e00b200";
  97. spi2 = "/soc/spi@7e2150c0";
  98. jtag_gpio4 = "/soc/gpio@7e200000/jtag_gpio4";
  99. dsi1 = "/soc/dsi@7e700000";
  100. clocks = "/soc/cprman@7e101000";
  101. i2c1 = "/soc/i2c@7e804000";
  102. i2c_vc = "/soc/i2c@7e205000";
  103. alt0 = "/soc/gpio@7e200000/alt0";
  104. firmwarekms = "/soc/firmwarekms@7e600000";
  105. smi = "/soc/smi@7e600000";
  106. uart1_ctsrts_gpio42 = "/soc/gpio@7e200000/uart1_ctsrts_gpio42";
  107. spi0 = "/soc/spi@7e204000";
  108. thermal = "/soc/thermal@7e212000";
  109. vdd_5v0_reg = "/fixedregulator_5v0";
  110. vchiq = "/soc/mailbox@7e00b840";
  111. sdhost = "/soc/mmc@7e202000";
  112. aux = "/soc/aux@7e215000";
  113. gpio = "/soc/gpio@7e200000";
  114. gpclk0_gpio4 = "/soc/gpio@7e200000/gpclk0_gpio4";
  115. pwm0_gpio12 = "/soc/gpio@7e200000/pwm0_gpio12";
  116. pwm1_gpio19 = "/soc/gpio@7e200000/pwm1_gpio19";
  117. sdhci = "/soc/mmc@7e300000";
  118. pwm0_gpio40 = "/soc/gpio@7e200000/pwm0_gpio40";
  119. gpclk2_gpio43 = "/soc/gpio@7e200000/gpclk2_gpio43";
  120. dpi = "/soc/dpi@7e208000";
  121. vcsm = "/soc/vcsm";
  122. v3d = "/soc/v3d@7ec00000";
  123. audio = "/soc/audio";
  124. vdd_3v3_reg = "/fixedregulator_3v3";
  125. uart1_ctsrts_gpio30 = "/soc/gpio@7e200000/uart1_ctsrts_gpio30";
  126. gpioout = "/soc/gpio@7e200000/gpioout";
  127. dma = "/soc/dma@7e007000";
  128. spidev1 = "/soc/spi@7e204000/spidev@1";
  129. mmcnr = "/soc/mmcnr@7e300000";
  130. spi0_gpio35 = "/soc/gpio@7e200000/spi0_gpio35";
  131. vc4 = "/soc/gpu";
  132. pwm1_gpio45 = "/soc/gpio@7e200000/pwm1_gpio45";
  133. cpu3 = "/cpus/cpu@3";
  134. pcm_gpio28 = "/soc/gpio@7e200000/pcm_gpio28";
  135. dpi_gpio0 = "/soc/gpio@7e200000/dpi_gpio0";
  136. power = "/soc/power";
  137. soc = "/soc";
  138. i2c0_gpio0 = "/soc/gpio@7e200000/i2c0_gpio0";
  139. pcm_gpio18 = "/soc/gpio@7e200000/pcm_gpio18";
  140. leds = "/leds";
  141. csi1 = "/soc/csi@7e801000";
  142. i2s_pins = "/soc/gpio@7e200000/i2s";
  143. firmware = "/soc/firmware";
  144. cpu1 = "/cpus/cpu@1";
  145. mmc = "/soc/mmc@7e300000";
  146. usbphy = "/phy";
  147. pixelvalve1 = "/soc/pixelvalve@7e207000";
  148. spi = "/soc/spi@7e204000";
  149. spi0_pins = "/soc/gpio@7e200000/spi0_pins";
  150. i2c_arm = "/soc/i2c@7e804000";
  151. clk_osc = "/clocks/clock@3";
  152. ethernet = "/soc/usb@7e980000/usb1@1/usbether@1";
  153. rng = "/soc/rng@7e104000";
  154. uart0 = "/soc/serial@7e201000";
  155. pwm1_gpio13 = "/soc/gpio@7e200000/pwm1_gpio13";
  156. i2c1_pins = "/soc/gpio@7e200000/i2c1";
  157. cpu_thermal = "/thermal-zones/cpu-thermal";
  158. fb = "/soc/fb";
  159. pwm1_gpio41 = "/soc/gpio@7e200000/pwm1_gpio41";
  160. txp = "/soc/txp@7e004000";
  161. sdhost_pins = "/soc/gpio@7e200000/sdhost_gpio48";
  162. dpi_18bit_gpio0 = "/soc/gpio@7e200000/dpi_18bit_gpio0";
  163. spi0_gpio7 = "/soc/gpio@7e200000/spi0_gpio7";
  164. i2c2 = "/soc/i2c@7e805000";
  165. uart1_pins = "/soc/gpio@7e200000/uart1_pins";
  166. i2c1_gpio44 = "/soc/gpio@7e200000/i2c1_gpio44";
  167. i2c0_gpio28 = "/soc/gpio@7e200000/i2c0_gpio28";
  168. i2c_slave_gpio18 = "/soc/gpio@7e200000/i2c_slave_gpio18";
  169. i2s = "/soc/i2s@7e203000";
  170. emmc_gpio48 = "/soc/gpio@7e200000/emmc_gpio48";
  171. spi1 = "/soc/spi@7e215080";
  172. virtgpio = "/soc/virtgpio";
  173. usb = "/soc/usb@7e980000";
  174. dsi0 = "/soc/dsi@7e209000";
  175. i2c1_gpio2 = "/soc/gpio@7e200000/i2c1_gpio2";
  176. expgpio = "/soc/firmware/expgpio";
  177. uart0_ctsrts_gpio38 = "/soc/gpio@7e200000/uart0_ctsrts_gpio38";
  178. audio_pins = "/soc/gpio@7e200000/audio_pins";
  179. i2c0 = "/soc/i2c@7e205000";
  180. spi1_gpio16 = "/soc/gpio@7e200000/spi1_gpio16";
  181. i2c0_pins = "/soc/gpio@7e200000/i2c0";
  182. pwr_led = "/leds/pwr";
  183. watchdog = "/soc/watchdog@7e100000";
  184. jtag_gpio22 = "/soc/gpio@7e200000/jtag_gpio22";
  185. spi2_gpio40 = "/soc/gpio@7e200000/spi2_gpio40";
  186. uart0_pins = "/soc/gpio@7e200000/uart0_pins";
  187. vec = "/soc/vec@7e806000";
  188. local_intc = "/soc/local_intc@40000000";
  189. i2c0_gpio44 = "/soc/gpio@7e200000/i2c0_gpio44";
  190. axiperf = "/soc/axiperf";
  191. spi0_cs_pins = "/soc/gpio@7e200000/spi0_cs_pins";
  192. sound = "/soc/sound";
  193. hvs = "/soc/hvs@7e400000";
  194. uart0_ctsrts_gpio16 = "/soc/gpio@7e200000/uart0_ctsrts_gpio16";
  195. act_led = "/leds/act";
  196. gpclk2_gpio6 = "/soc/gpio@7e200000/gpclk2_gpio6";
  197. spidev0 = "/soc/spi@7e204000/spidev@0";
  198. sdhost_gpio48 = "/soc/gpio@7e200000/sdhost_gpio48";
  199. bt_pins = "/soc/gpio@7e200000/bt_pins";
  200. emmc_gpio34 = "/soc/gpio@7e200000/emmc_gpio34";
  201. gpclk1_gpio44 = "/soc/gpio@7e200000/gpclk1_gpio44";
  202. uart1_gpio14 = "/soc/gpio@7e200000/uart1_gpio14";
  203. uart0_gpio36 = "/soc/gpio@7e200000/uart0_gpio36";
  204. sdio_pins = "/soc/gpio@7e200000/sdio_pins";
  205. cpus = "/cpus";
  206. cpu2 = "/cpus/cpu@2";
  207. uart1_gpio32 = "/soc/gpio@7e200000/uart1_gpio32";
  208. hdmi = "/soc/hdmi@7e902000";
  209. pixelvalve2 = "/soc/pixelvalve@7e807000";
  210. pwm0_gpio18 = "/soc/gpio@7e200000/pwm0_gpio18";
  211. gpclk1_gpio42 = "/soc/gpio@7e200000/gpclk1_gpio42";
  212. mailbox = "/soc/mailbox@7e00b880";
  213. uart1_gpio40 = "/soc/gpio@7e200000/uart1_gpio40";
  214. emmc_gpio22 = "/soc/gpio@7e200000/emmc_gpio22";
  215. uart1 = "/soc/serial@7e215040";
  216. csi0 = "/soc/csi@7e800000";
  217. random = "/soc/rng@7e104000";
  218. i2c = "/soc/i2c@7e804000";
  219. cpu0 = "/cpus/cpu@0";
  220. };
  221.  
  222. soc {
  223. compatible = "simple-bus";
  224. ranges = < 0x7e000000 0x3f000000 0x1000000 0x40000000 0x40000000 0x1000 >;
  225. #address-cells = < 0x01 >;
  226. #size-cells = < 0x01 >;
  227. phandle = < 0x33 >;
  228. dma-ranges = < 0xc0000000 0x00 0x3f000000 >;
  229.  
  230. serial@7e201000 {
  231. compatible = "brcm,bcm2835-pl011\0arm,pl011\0arm,primecell";
  232. clocks = < 0x03 0x13 0x03 0x14 >;
  233. clock-names = "uartclk\0apb_pclk";
  234. status = "okay";
  235. interrupts = < 0x02 0x19 >;
  236. phandle = < 0x22 >;
  237. arm,primecell-periphid = < 0x241011 >;
  238. reg = < 0x7e201000 0x200 >;
  239. pinctrl-0 = < 0x08 0x09 >;
  240. cts-event-workaround;
  241. pinctrl-names = "default";
  242. };
  243.  
  244. pixelvalve@7e207000 {
  245. compatible = "brcm,bcm2835-pixelvalve1";
  246. status = "disabled";
  247. interrupts = < 0x02 0x0e >;
  248. phandle = < 0x65 >;
  249. reg = < 0x7e207000 0x100 >;
  250. };
  251.  
  252. cprman@7e101000 {
  253. compatible = "brcm,bcm2835-cprman";
  254. clocks = < 0x04 0x05 0x00 0x05 0x01 0x05 0x02 0x06 0x00 0x06 0x01 0x06 0x02 >;
  255. firmware = < 0x07 >;
  256. #clock-cells = < 0x01 >;
  257. phandle = < 0x03 >;
  258. reg = < 0x7e101000 0x2000 >;
  259. };
  260.  
  261. csi@7e801000 {
  262. power-domains = < 0x11 0x0d >;
  263. compatible = "brcm,bcm2835-unicam";
  264. clocks = < 0x03 0x2e >;
  265. clock-names = "lp";
  266. status = "disabled";
  267. #address-cells = < 0x01 >;
  268. interrupts = < 0x02 0x07 >;
  269. #size-cells = < 0x00 >;
  270. #clock-cells = < 0x01 >;
  271. phandle = < 0x6c >;
  272. reg = < 0x7e801000 0x800 0x7e802004 0x04 >;
  273.  
  274. port {
  275.  
  276. endpoint {
  277. data-lanes = < 0x01 0x02 >;
  278. };
  279. };
  280. };
  281.  
  282. thermal@7e212000 {
  283. compatible = "brcm,bcm2837-thermal";
  284. clocks = < 0x03 0x1b >;
  285. #thermal-sensor-cells = < 0x00 >;
  286. status = "okay";
  287. phandle = < 0x02 >;
  288. reg = < 0x7e212000 0x08 >;
  289. };
  290.  
  291. hvs@7e400000 {
  292. compatible = "brcm,bcm2835-hvs";
  293. status = "disabled";
  294. interrupts = < 0x02 0x01 >;
  295. phandle = < 0x6a >;
  296. reg = < 0x7e400000 0x6000 >;
  297. };
  298.  
  299. gpio@7e200000 {
  300. compatible = "brcm,bcm2835-gpio";
  301. gpio-controller;
  302. #interrupt-cells = < 0x02 >;
  303. interrupts = < 0x02 0x11 0x02 0x12 >;
  304. phandle = < 0x0f >;
  305. reg = < 0x7e200000 0xb4 >;
  306. #gpio-cells = < 0x02 >;
  307. pinctrl-names = "default";
  308. interrupt-controller;
  309.  
  310. uart0_gpio14 {
  311. brcm,pins = < 0x0e 0x0f >;
  312. phandle = < 0x51 >;
  313. brcm,function = < 0x04 >;
  314. };
  315.  
  316. gpclk1_gpio5 {
  317. brcm,pins = < 0x05 >;
  318. phandle = < 0x39 >;
  319. brcm,function = < 0x04 >;
  320. };
  321.  
  322. uart0_ctsrts_gpio30 {
  323. brcm,pins = < 0x1e 0x1f >;
  324. phandle = < 0x53 >;
  325. brcm,pull = < 0x02 0x00 >;
  326. brcm,function = < 0x07 >;
  327. };
  328.  
  329. uart1_ctsrts_gpio16 {
  330. brcm,pins = < 0x10 0x11 >;
  331. phandle = < 0x58 >;
  332. brcm,function = < 0x02 >;
  333. };
  334.  
  335. uart0_gpio32 {
  336. brcm,pins = < 0x20 0x21 >;
  337. phandle = < 0x54 >;
  338. brcm,pull = < 0x00 0x02 >;
  339. brcm,function = < 0x07 >;
  340. };
  341.  
  342. jtag_gpio4 {
  343. brcm,pins = < 0x04 0x05 0x06 0x0c 0x0d >;
  344. phandle = < 0x5e >;
  345. brcm,function = < 0x02 >;
  346. };
  347.  
  348. i2c1 {
  349. brcm,pins = < 0x02 0x03 >;
  350. phandle = < 0x14 >;
  351. brcm,function = < 0x04 >;
  352. };
  353.  
  354. alt0 {
  355. brcm,pins = < 0x04 0x05 0x07 0x08 0x09 0x0a 0x0b >;
  356. phandle = < 0x61 >;
  357. brcm,function = < 0x04 >;
  358. };
  359.  
  360. uart1_ctsrts_gpio42 {
  361. brcm,pins = < 0x2a 0x2b >;
  362. phandle = < 0x5c >;
  363. brcm,function = < 0x02 >;
  364. };
  365.  
  366. gpclk0_gpio4 {
  367. brcm,pins = < 0x04 >;
  368. phandle = < 0x38 >;
  369. brcm,function = < 0x04 >;
  370. };
  371.  
  372. pwm0_gpio12 {
  373. brcm,pins = < 0x0c >;
  374. phandle = < 0x46 >;
  375. brcm,function = < 0x04 >;
  376. };
  377.  
  378. pwm1_gpio19 {
  379. brcm,pins = < 0x13 >;
  380. phandle = < 0x4a >;
  381. brcm,function = < 0x02 >;
  382. };
  383.  
  384. pwm0_gpio40 {
  385. brcm,pins = < 0x28 >;
  386. phandle = < 0x48 >;
  387. brcm,function = < 0x04 >;
  388. };
  389.  
  390. gpclk2_gpio43 {
  391. brcm,pins = < 0x2b >;
  392. phandle = < 0x3d >;
  393. brcm,pull = < 0x00 >;
  394. brcm,function = < 0x04 >;
  395. };
  396.  
  397. uart1_ctsrts_gpio30 {
  398. brcm,pins = < 0x1e 0x1f >;
  399. phandle = < 0x5a >;
  400. brcm,function = < 0x02 >;
  401. };
  402.  
  403. gpioout {
  404. brcm,pins = < 0x06 >;
  405. phandle = < 0x60 >;
  406. brcm,function = < 0x01 >;
  407. };
  408.  
  409. spi0_gpio35 {
  410. brcm,pins = < 0x23 0x24 0x25 0x26 0x27 >;
  411. phandle = < 0x4e >;
  412. brcm,function = < 0x04 >;
  413. };
  414.  
  415. pwm1_gpio45 {
  416. brcm,pins = < 0x2d >;
  417. phandle = < 0x4c >;
  418. brcm,function = < 0x04 >;
  419. };
  420.  
  421. pcm_gpio28 {
  422. brcm,pins = < 0x1c 0x1d 0x1e 0x1f >;
  423. phandle = < 0x45 >;
  424. brcm,function = < 0x06 >;
  425. };
  426.  
  427. dpi_gpio0 {
  428. brcm,pins = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  429. phandle = < 0x35 >;
  430. brcm,function = < 0x06 >;
  431. };
  432.  
  433. i2c0_gpio0 {
  434. brcm,pins = < 0x00 0x01 >;
  435. phandle = < 0x3e >;
  436. brcm,function = < 0x04 >;
  437. };
  438.  
  439. pcm_gpio18 {
  440. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  441. phandle = < 0x44 >;
  442. brcm,function = < 0x04 >;
  443. };
  444.  
  445. spi0_pins {
  446. brcm,pins = < 0x09 0x0a 0x0b >;
  447. phandle = < 0x0d >;
  448. brcm,function = < 0x04 >;
  449. };
  450.  
  451. pwm1_gpio13 {
  452. brcm,pins = < 0x0d >;
  453. phandle = < 0x49 >;
  454. brcm,function = < 0x04 >;
  455. };
  456.  
  457. pwm1_gpio41 {
  458. brcm,pins = < 0x29 >;
  459. phandle = < 0x4b >;
  460. brcm,function = < 0x04 >;
  461. };
  462.  
  463. dpi_18bit_gpio0 {
  464. brcm,pins = < 0x00 0x01 0x02 0x03 0x04 0x05 0x06 0x07 0x08 0x09 0x0a 0x0b 0x0c 0x0d 0x0e 0x0f 0x10 0x11 0x12 0x13 0x14 0x15 >;
  465. phandle = < 0x5f >;
  466. brcm,function = < 0x06 >;
  467. };
  468.  
  469. spi0_gpio7 {
  470. brcm,pins = < 0x07 0x08 0x09 0x0a 0x0b >;
  471. phandle = < 0x4d >;
  472. brcm,function = < 0x04 >;
  473. };
  474.  
  475. uart1_pins {
  476. brcm,pins;
  477. phandle = < 0x13 >;
  478. brcm,pull;
  479. brcm,function;
  480. };
  481.  
  482. i2c1_gpio44 {
  483. brcm,pins = < 0x2c 0x2d >;
  484. phandle = < 0x42 >;
  485. brcm,function = < 0x06 >;
  486. };
  487.  
  488. i2c0_gpio28 {
  489. brcm,pins = < 0x1c 0x1d >;
  490. phandle = < 0x3f >;
  491. brcm,function = < 0x04 >;
  492. };
  493.  
  494. i2c_slave_gpio18 {
  495. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  496. phandle = < 0x5d >;
  497. brcm,function = < 0x07 >;
  498. };
  499.  
  500. i2s {
  501. brcm,pins = < 0x12 0x13 0x14 0x15 >;
  502. phandle = < 0x0c >;
  503. brcm,function = < 0x04 >;
  504. };
  505.  
  506. emmc_gpio48 {
  507. brcm,pins = < 0x30 0x31 0x32 0x33 0x34 0x35 >;
  508. phandle = < 0x1a >;
  509. brcm,function = < 0x07 >;
  510. };
  511.  
  512. i2c1_gpio2 {
  513. brcm,pins = < 0x02 0x03 >;
  514. phandle = < 0x41 >;
  515. brcm,function = < 0x04 >;
  516. };
  517.  
  518. uart0_ctsrts_gpio38 {
  519. brcm,pins = < 0x26 0x27 >;
  520. phandle = < 0x56 >;
  521. brcm,function = < 0x06 >;
  522. };
  523.  
  524. audio_pins {
  525. brcm,pins = < 0x28 0x29 >;
  526. phandle = < 0x1d >;
  527. brcm,function = < 0x04 >;
  528. };
  529.  
  530. i2c0 {
  531. brcm,pins = < 0x00 0x01 >;
  532. phandle = < 0x10 >;
  533. brcm,function = < 0x04 >;
  534. };
  535.  
  536. spi1_gpio16 {
  537. brcm,pins = < 0x10 0x11 0x12 0x13 0x14 0x15 >;
  538. phandle = < 0x4f >;
  539. brcm,function = < 0x03 >;
  540. };
  541.  
  542. jtag_gpio22 {
  543. brcm,pins = < 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  544. phandle = < 0x43 >;
  545. brcm,function = < 0x03 >;
  546. };
  547.  
  548. spi2_gpio40 {
  549. brcm,pins = < 0x28 0x29 0x2a 0x2b 0x2c 0x2d >;
  550. phandle = < 0x50 >;
  551. brcm,function = < 0x03 >;
  552. };
  553.  
  554. uart0_pins {
  555. brcm,pins = < 0x20 0x21 >;
  556. phandle = < 0x08 >;
  557. brcm,pull = < 0x00 0x02 >;
  558. brcm,function = < 0x07 >;
  559. };
  560.  
  561. i2c0_gpio44 {
  562. brcm,pins = < 0x2c 0x2d >;
  563. phandle = < 0x40 >;
  564. brcm,function = < 0x05 >;
  565. };
  566.  
  567. spi0_cs_pins {
  568. brcm,pins = < 0x08 0x07 >;
  569. phandle = < 0x0e >;
  570. brcm,function = < 0x01 >;
  571. };
  572.  
  573. uart0_ctsrts_gpio16 {
  574. brcm,pins = < 0x10 0x11 >;
  575. phandle = < 0x52 >;
  576. brcm,function = < 0x07 >;
  577. };
  578.  
  579. gpclk2_gpio6 {
  580. brcm,pins = < 0x06 >;
  581. phandle = < 0x3c >;
  582. brcm,function = < 0x04 >;
  583. };
  584.  
  585. sdhost_gpio48 {
  586. brcm,pins = < 0x30 0x31 0x32 0x33 0x34 0x35 >;
  587. phandle = < 0x0b >;
  588. brcm,function = < 0x04 >;
  589. };
  590.  
  591. bt_pins {
  592. brcm,pins = < 0x2b >;
  593. phandle = < 0x09 >;
  594. brcm,pull = < 0x00 >;
  595. brcm,function = < 0x04 >;
  596. };
  597.  
  598. emmc_gpio34 {
  599. brcm,pins = < 0x22 0x23 0x24 0x25 0x26 0x27 >;
  600. phandle = < 0x37 >;
  601. brcm,pull = < 0x00 0x02 0x02 0x02 0x02 0x02 >;
  602. brcm,function = < 0x07 >;
  603. };
  604.  
  605. gpclk1_gpio44 {
  606. brcm,pins = < 0x2c >;
  607. phandle = < 0x3b >;
  608. brcm,function = < 0x04 >;
  609. };
  610.  
  611. uart1_gpio14 {
  612. brcm,pins = < 0x0e 0x0f >;
  613. phandle = < 0x57 >;
  614. brcm,function = < 0x02 >;
  615. };
  616.  
  617. uart0_gpio36 {
  618. brcm,pins = < 0x24 0x25 >;
  619. phandle = < 0x55 >;
  620. brcm,function = < 0x06 >;
  621. };
  622.  
  623. sdio_pins {
  624. brcm,pins = < 0x22 0x23 0x24 0x25 0x26 0x27 >;
  625. phandle = < 0x1b >;
  626. brcm,pull = < 0x00 0x02 0x02 0x02 0x02 0x02 >;
  627. brcm,function = < 0x07 >;
  628. };
  629.  
  630. uart1_gpio32 {
  631. brcm,pins = < 0x20 0x21 >;
  632. phandle = < 0x59 >;
  633. brcm,function = < 0x02 >;
  634. };
  635.  
  636. pwm0_gpio18 {
  637. brcm,pins = < 0x12 >;
  638. phandle = < 0x47 >;
  639. brcm,function = < 0x02 >;
  640. };
  641.  
  642. gpclk1_gpio42 {
  643. brcm,pins = < 0x2a >;
  644. phandle = < 0x3a >;
  645. brcm,function = < 0x04 >;
  646. };
  647.  
  648. uart1_gpio40 {
  649. brcm,pins = < 0x28 0x29 >;
  650. phandle = < 0x5b >;
  651. brcm,function = < 0x02 >;
  652. };
  653.  
  654. emmc_gpio22 {
  655. brcm,pins = < 0x16 0x17 0x18 0x19 0x1a 0x1b >;
  656. phandle = < 0x36 >;
  657. brcm,function = < 0x07 >;
  658. };
  659. };
  660.  
  661. pixelvalve@7e807000 {
  662. compatible = "brcm,bcm2835-pixelvalve2";
  663. status = "disabled";
  664. interrupts = < 0x02 0x0a >;
  665. phandle = < 0x6e >;
  666. reg = < 0x7e807000 0x100 >;
  667. };
  668.  
  669. v3d@7ec00000 {
  670. power-domains = < 0x11 0x0a >;
  671. compatible = "brcm,vc4-v3d";
  672. status = "disabled";
  673. interrupts = < 0x01 0x0a >;
  674. phandle = < 0x73 >;
  675. reg = < 0x7ec00000 0x1000 >;
  676. };
  677.  
  678. gpu {
  679. compatible = "brcm,bcm2835-vc4";
  680. status = "disabled";
  681. phandle = < 0x72 >;
  682. };
  683.  
  684. mmc@7e300000 {
  685. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  686. clocks = < 0x03 0x1c >;
  687. status = "disabled";
  688. interrupts = < 0x02 0x1e >;
  689. brcm,overclock-50 = < 0x00 >;
  690. bus-width = < 0x04 >;
  691. dma-names = "rx-tx";
  692. phandle = < 0x2c >;
  693. reg = < 0x7e300000 0x100 >;
  694. pinctrl-0 = < 0x1a >;
  695. dmas = < 0x0a 0x0b >;
  696. pinctrl-names = "default";
  697. };
  698.  
  699. spi@7e204000 {
  700. compatible = "brcm,bcm2835-spi";
  701. clocks = < 0x03 0x14 >;
  702. status = "disabled";
  703. #address-cells = < 0x01 >;
  704. interrupts = < 0x02 0x16 >;
  705. cs-gpios = < 0x0f 0x08 0x01 0x0f 0x07 0x01 >;
  706. #size-cells = < 0x00 >;
  707. dma-names = "tx\0rx";
  708. phandle = < 0x25 >;
  709. reg = < 0x7e204000 0x200 >;
  710. pinctrl-0 = < 0x0d 0x0e >;
  711. dmas = < 0x0a 0x06 0x0a 0x07 >;
  712. pinctrl-names = "default";
  713.  
  714. spidev@1 {
  715. compatible = "spidev";
  716. #address-cells = < 0x01 >;
  717. #size-cells = < 0x00 >;
  718. phandle = < 0x63 >;
  719. reg = < 0x01 >;
  720. spi-max-frequency = < 0x7735940 >;
  721. };
  722.  
  723. spidev@0 {
  724. compatible = "spidev";
  725. #address-cells = < 0x01 >;
  726. #size-cells = < 0x00 >;
  727. phandle = < 0x62 >;
  728. reg = < 0x00 >;
  729. spi-max-frequency = < 0x7735940 >;
  730. };
  731. };
  732.  
  733. i2c@7e804000 {
  734. compatible = "brcm,bcm2835-i2c";
  735. clocks = < 0x03 0x14 >;
  736. status = "disabled";
  737. #address-cells = < 0x01 >;
  738. interrupts = < 0x02 0x15 >;
  739. #size-cells = < 0x00 >;
  740. phandle = < 0x27 >;
  741. reg = < 0x7e804000 0x1000 >;
  742. clock-frequency = < 0x186a0 >;
  743. pinctrl-0 = < 0x14 >;
  744. pinctrl-names = "default";
  745. };
  746.  
  747. vcsm {
  748. compatible = "raspberrypi,bcm2835-vcsm";
  749. firmware = < 0x07 >;
  750. status = "okay";
  751. phandle = < 0x78 >;
  752. };
  753.  
  754. audio {
  755. brcm,pwm-channels = < 0x08 >;
  756. compatible = "brcm,bcm2835-audio";
  757. status = "okay";
  758. phandle = < 0x28 >;
  759. pinctrl-0 = < 0x1d >;
  760. pinctrl-names = "default";
  761. };
  762.  
  763. i2s@7e203000 {
  764. compatible = "brcm,bcm2835-i2s";
  765. clocks = < 0x03 0x1f >;
  766. #sound-dai-cells = < 0x00 >;
  767. status = "disabled";
  768. dma-names = "tx\0rx";
  769. phandle = < 0x24 >;
  770. reg = < 0x7e203000 0x24 >;
  771. pinctrl-0 = < 0x0c >;
  772. dmas = < 0x0a 0x02 0x0a 0x03 >;
  773. pinctrl-names = "default";
  774. };
  775.  
  776. mailbox@7e00b880 {
  777. compatible = "brcm,bcm2835-mbox";
  778. #mbox-cells = < 0x00 >;
  779. interrupts = < 0x00 0x01 >;
  780. phandle = < 0x1c >;
  781. reg = < 0x7e00b880 0x40 >;
  782. };
  783.  
  784. gpiomem {
  785. compatible = "brcm,bcm2835-gpiomem";
  786. reg = < 0x7e200000 0x1000 >;
  787. };
  788.  
  789. vec@7e806000 {
  790. power-domains = < 0x11 0x07 >;
  791. compatible = "brcm,bcm2835-vec";
  792. clocks = < 0x03 0x18 >;
  793. status = "disabled";
  794. interrupts = < 0x02 0x1b >;
  795. phandle = < 0x6d >;
  796. reg = < 0x7e806000 0x1000 >;
  797. };
  798.  
  799. power {
  800. compatible = "raspberrypi,bcm2835-power";
  801. firmware = < 0x07 >;
  802. phandle = < 0x11 >;
  803. #power-domain-cells = < 0x01 >;
  804. };
  805.  
  806. pixelvalve@7e206000 {
  807. compatible = "brcm,bcm2835-pixelvalve0";
  808. status = "disabled";
  809. interrupts = < 0x02 0x0d >;
  810. phandle = < 0x64 >;
  811. reg = < 0x7e206000 0x100 >;
  812. };
  813.  
  814. csi@7e800000 {
  815. power-domains = < 0x11 0x0c >;
  816. compatible = "brcm,bcm2835-unicam";
  817. clocks = < 0x03 0x2d >;
  818. clock-names = "lp";
  819. status = "disabled";
  820. #address-cells = < 0x01 >;
  821. interrupts = < 0x02 0x06 >;
  822. #size-cells = < 0x00 >;
  823. #clock-cells = < 0x01 >;
  824. phandle = < 0x6b >;
  825. reg = < 0x7e800000 0x800 0x7e802000 0x04 >;
  826. };
  827.  
  828. mailbox@7e00b840 {
  829. compatible = "brcm,bcm2836-vchiq\0brcm,bcm2835-vchiq";
  830. interrupts = < 0x00 0x02 >;
  831. phandle = < 0x76 >;
  832. reg = < 0x7e00b840 0x3c >;
  833. };
  834.  
  835. firmware {
  836. compatible = "raspberrypi,bcm2835-firmware\0simple-bus";
  837. #address-cells = < 0x00 >;
  838. mboxes = < 0x1c >;
  839. #size-cells = < 0x00 >;
  840. phandle = < 0x07 >;
  841.  
  842. expgpio {
  843. compatible = "raspberrypi,firmware-gpio";
  844. gpio-controller;
  845. status = "okay";
  846. phandle = < 0x16 >;
  847. #gpio-cells = < 0x02 >;
  848. };
  849. };
  850.  
  851. dsi@7e209000 {
  852. power-domains = < 0x11 0x11 >;
  853. compatible = "brcm,bcm2835-dsi0";
  854. clocks = < 0x03 0x20 0x03 0x2f 0x03 0x31 >;
  855. clock-names = "phy\0escape\0pixel";
  856. #address-cells = < 0x01 >;
  857. interrupts = < 0x02 0x04 >;
  858. #size-cells = < 0x00 >;
  859. #clock-cells = < 0x01 >;
  860. phandle = < 0x05 >;
  861. reg = < 0x7e209000 0x78 >;
  862. clock-output-names = "dsi0_byte\0dsi0_ddr2\0dsi0_ddr";
  863. };
  864.  
  865. mmcnr@7e300000 {
  866. compatible = "brcm,bcm2835-mmc\0brcm,bcm2835-sdhci";
  867. clocks = < 0x03 0x1c >;
  868. status = "okay";
  869. interrupts = < 0x02 0x1e >;
  870. brcm,overclock-50 = < 0x00 >;
  871. bus-width = < 0x04 >;
  872. dma-names = "rx-tx";
  873. phandle = < 0x2d >;
  874. reg = < 0x7e300000 0x100 >;
  875. pinctrl-0 = < 0x1b >;
  876. dmas = < 0x0a 0x0b >;
  877. non-removable;
  878. pinctrl-names = "default";
  879. };
  880.  
  881. fb {
  882. compatible = "brcm,bcm2708-fb";
  883. firmware = < 0x07 >;
  884. status = "okay";
  885. phandle = < 0x77 >;
  886. };
  887.  
  888. local_intc@40000000 {
  889. compatible = "brcm,bcm2836-l1-intc";
  890. #interrupt-cells = < 0x02 >;
  891. interrupt-parent = < 0x19 >;
  892. phandle = < 0x19 >;
  893. reg = < 0x40000000 0x100 >;
  894. interrupt-controller;
  895. };
  896.  
  897. virtgpio {
  898. compatible = "brcm,bcm2835-virtgpio";
  899. gpio-controller;
  900. firmware = < 0x07 >;
  901. status = "okay";
  902. phandle = < 0x31 >;
  903. #gpio-cells = < 0x02 >;
  904. };
  905.  
  906. dpi@7e208000 {
  907. compatible = "brcm,bcm2835-dpi";
  908. clocks = < 0x03 0x14 0x03 0x2c >;
  909. clock-names = "core\0pixel";
  910. status = "disabled";
  911. #address-cells = < 0x01 >;
  912. #size-cells = < 0x00 >;
  913. phandle = < 0x66 >;
  914. reg = < 0x7e208000 0x8c >;
  915. };
  916.  
  917. mmc@7e202000 {
  918. compatible = "brcm,bcm2835-sdhost";
  919. clocks = < 0x03 0x14 >;
  920. brcm,pio-limit = < 0x01 >;
  921. status = "okay";
  922. interrupts = < 0x02 0x18 >;
  923. brcm,overclock-50 = < 0x00 >;
  924. bus-width = < 0x04 >;
  925. dma-names = "rx-tx";
  926. phandle = < 0x2b >;
  927. reg = < 0x7e202000 0x100 >;
  928. pinctrl-0 = < 0x0b >;
  929. dmas = < 0x0a 0x2000000d >;
  930. pinctrl-names = "default";
  931. };
  932.  
  933. hdmi@7e902000 {
  934. power-domains = < 0x11 0x05 >;
  935. compatible = "brcm,bcm2835-hdmi";
  936. clocks = < 0x03 0x10 0x03 0x19 >;
  937. clock-names = "pixel\0hdmi";
  938. ddc = < 0x15 >;
  939. status = "disabled";
  940. interrupts = < 0x02 0x08 0x02 0x09 >;
  941. dma-names = "audio-rx";
  942. phandle = < 0x6f >;
  943. hpd-gpios = < 0x16 0x04 0x01 >;
  944. reg = < 0x7e902000 0x600 0x7e808000 0x100 >;
  945. dmas = < 0x0a 0x11 >;
  946. };
  947.  
  948. pwm@7e20c000 {
  949. compatible = "brcm,bcm2835-pwm";
  950. clocks = < 0x03 0x1e >;
  951. status = "disabled";
  952. assigned-clock-rates = < 0x989680 >;
  953. assigned-clocks = < 0x03 0x1e >;
  954. phandle = < 0x69 >;
  955. reg = < 0x7e20c000 0x28 >;
  956. #pwm-cells = < 0x02 >;
  957. };
  958.  
  959. watchdog@7e100000 {
  960. compatible = "brcm,bcm2835-pm\0brcm,bcm2835-pm-wdt";
  961. clocks = < 0x03 0x15 0x03 0x1d 0x03 0x17 0x03 0x16 >;
  962. #reset-cells = < 0x01 >;
  963. clock-names = "v3d\0peri_image\0h264\0isp";
  964. system-power-controller;
  965. phandle = < 0x29 >;
  966. reg = < 0x7e100000 0x114 0x7e00a000 0x24 >;
  967. #power-domain-cells = < 0x01 >;
  968. };
  969.  
  970. interrupt-controller@7e00b200 {
  971. compatible = "brcm,bcm2836-armctrl-ic";
  972. #interrupt-cells = < 0x02 >;
  973. interrupt-parent = < 0x19 >;
  974. interrupts = < 0x08 0x04 >;
  975. phandle = < 0x01 >;
  976. reg = < 0x7e00b200 0x200 >;
  977. interrupt-controller;
  978. };
  979.  
  980. aux@7e215000 {
  981. compatible = "brcm,bcm2835-aux";
  982. clocks = < 0x03 0x14 >;
  983. #clock-cells = < 0x01 >;
  984. phandle = < 0x12 >;
  985. reg = < 0x7e215000 0x08 >;
  986. };
  987.  
  988. dsi@7e700000 {
  989. power-domains = < 0x11 0x12 >;
  990. compatible = "brcm,bcm2835-dsi1";
  991. clocks = < 0x03 0x23 0x03 0x30 0x03 0x32 >;
  992. clock-names = "phy\0escape\0pixel";
  993. status = "disabled";
  994. #address-cells = < 0x01 >;
  995. interrupts = < 0x02 0x0c >;
  996. #size-cells = < 0x00 >;
  997. #clock-cells = < 0x01 >;
  998. phandle = < 0x06 >;
  999. reg = < 0x7e700000 0x8c >;
  1000. clock-output-names = "dsi1_byte\0dsi1_ddr2\0dsi1_ddr";
  1001. };
  1002.  
  1003. axiperf {
  1004. compatible = "brcm,bcm2835-axiperf";
  1005. firmware = < 0x07 >;
  1006. status = "disabled";
  1007. phandle = < 0x2e >;
  1008. reg = < 0x7e009800 0x100 0x7ee08000 0x100 >;
  1009. };
  1010.  
  1011. sound {
  1012. status = "disabled";
  1013. phandle = < 0x79 >;
  1014. };
  1015.  
  1016. i2c@7e205000 {
  1017. compatible = "brcm,bcm2835-i2c";
  1018. clocks = < 0x03 0x14 >;
  1019. status = "disabled";
  1020. #address-cells = < 0x01 >;
  1021. interrupts = < 0x02 0x15 >;
  1022. #size-cells = < 0x00 >;
  1023. phandle = < 0x26 >;
  1024. reg = < 0x7e205000 0x200 >;
  1025. clock-frequency = < 0x186a0 >;
  1026. pinctrl-0 = < 0x10 >;
  1027. pinctrl-names = "default";
  1028. };
  1029.  
  1030. txp@7e004000 {
  1031. compatible = "brcm,bcm2835-txp";
  1032. status = "disabled";
  1033. interrupts = < 0x01 0x0b >;
  1034. phandle = < 0x34 >;
  1035. reg = < 0x7e004000 0x20 >;
  1036. };
  1037.  
  1038. serial@7e215040 {
  1039. compatible = "brcm,bcm2835-aux-uart";
  1040. clocks = < 0x12 0x00 >;
  1041. status = "disabled";
  1042. interrupts = < 0x01 0x1d >;
  1043. phandle = < 0x23 >;
  1044. reg = < 0x7e215040 0x40 >;
  1045. pinctrl-0 = < 0x13 >;
  1046. pinctrl-names = "default";
  1047. };
  1048.  
  1049. dma@7e007000 {
  1050. #dma-cells = < 0x01 >;
  1051. compatible = "brcm,bcm2835-dma";
  1052. brcm,dma-channel-mask = < 0x7f35 >;
  1053. interrupts = < 0x01 0x10 0x01 0x11 0x01 0x12 0x01 0x13 0x01 0x14 0x01 0x15 0x01 0x16 0x01 0x17 0x01 0x18 0x01 0x19 0x01 0x1a 0x01 0x1b 0x01 0x1b 0x01 0x1b 0x01 0x1b 0x01 0x1c >;
  1054. phandle = < 0x0a >;
  1055. reg = < 0x7e007000 0xf00 >;
  1056. interrupt-names = "dma0\0dma1\0dma2\0dma3\0dma4\0dma5\0dma6\0dma7\0dma8\0dma9\0dma10\0dma11\0dma12\0dma13\0dma14\0dma-shared-all";
  1057. };
  1058.  
  1059. i2c@7e805000 {
  1060. compatible = "brcm,bcm2835-i2c";
  1061. clocks = < 0x03 0x14 >;
  1062. status = "disabled";
  1063. #address-cells = < 0x01 >;
  1064. interrupts = < 0x02 0x15 >;
  1065. #size-cells = < 0x00 >;
  1066. phandle = < 0x15 >;
  1067. reg = < 0x7e805000 0x1000 >;
  1068. clock-frequency = < 0x186a0 >;
  1069. };
  1070.  
  1071. spi@7e215080 {
  1072. compatible = "brcm,bcm2835-aux-spi";
  1073. clocks = < 0x12 0x01 >;
  1074. status = "disabled";
  1075. #address-cells = < 0x01 >;
  1076. interrupts = < 0x01 0x1d >;
  1077. #size-cells = < 0x00 >;
  1078. phandle = < 0x67 >;
  1079. reg = < 0x7e215080 0x40 >;
  1080. };
  1081.  
  1082. firmwarekms@7e600000 {
  1083. compatible = "raspberrypi,rpi-firmware-kms";
  1084. status = "disabled";
  1085. interrupts = < 0x02 0x10 >;
  1086. brcm,firmware = < 0x07 >;
  1087. phandle = < 0x74 >;
  1088. reg = < 0x7e600000 0x100 >;
  1089. };
  1090.  
  1091. rng@7e104000 {
  1092. compatible = "brcm,bcm2835-rng";
  1093. interrupts = < 0x02 0x1d >;
  1094. phandle = < 0x2a >;
  1095. reg = < 0x7e104000 0x10 >;
  1096. };
  1097.  
  1098. usb@7e980000 {
  1099. power-domains = < 0x11 0x06 >;
  1100. compatible = "brcm,bcm2708-usb";
  1101. clocks = < 0x17 >;
  1102. clock-names = "otg";
  1103. phy-names = "usb2-phy";
  1104. #address-cells = < 0x01 >;
  1105. interrupts = < 0x01 0x09 0x02 0x00 >;
  1106. #size-cells = < 0x00 >;
  1107. phandle = < 0x70 >;
  1108. phys = < 0x18 >;
  1109. reg = < 0x7e980000 0x10000 0x7e006000 0x1000 >;
  1110. interrupt-names = "usb\0soft";
  1111.  
  1112. usb1@1 {
  1113. compatible = "usb424,9514";
  1114. #address-cells = < 0x01 >;
  1115. #size-cells = < 0x00 >;
  1116. reg = < 0x01 >;
  1117.  
  1118. usbether@1 {
  1119. compatible = "usb424,ec00";
  1120. local-mac-address = [ b8 27 eb 84 81 d0 ];
  1121. phandle = < 0x71 >;
  1122. reg = < 0x01 >;
  1123. };
  1124. };
  1125. };
  1126.  
  1127. smi@7e600000 {
  1128. compatible = "brcm,bcm2835-smi";
  1129. clocks = < 0x03 0x2a >;
  1130. status = "disabled";
  1131. interrupts = < 0x02 0x10 >;
  1132. assigned-clock-rates = < 0x7735940 >;
  1133. dma-names = "rx-tx";
  1134. assigned-clocks = < 0x03 0x2a >;
  1135. phandle = < 0x75 >;
  1136. reg = < 0x7e600000 0x100 >;
  1137. dmas = < 0x0a 0x04 >;
  1138. };
  1139.  
  1140. spi@7e2150c0 {
  1141. compatible = "brcm,bcm2835-aux-spi";
  1142. clocks = < 0x12 0x02 >;
  1143. status = "disabled";
  1144. #address-cells = < 0x01 >;
  1145. interrupts = < 0x01 0x1d >;
  1146. #size-cells = < 0x00 >;
  1147. phandle = < 0x68 >;
  1148. reg = < 0x7e2150c0 0x40 >;
  1149. };
  1150. };
  1151.  
  1152. leds {
  1153. compatible = "gpio-leds";
  1154. phandle = < 0x7b >;
  1155.  
  1156. act {
  1157. gpios = < 0x31 0x00 0x00 >;
  1158. label = "led0";
  1159. phandle = < 0x2f >;
  1160. default-state = "keep";
  1161. linux,default-trigger = "mmc0";
  1162. };
  1163.  
  1164. pwr {
  1165. gpios = < 0x16 0x07 0x00 >;
  1166. label = "led1";
  1167. phandle = < 0x30 >;
  1168. linux,default-trigger = "input";
  1169. };
  1170. };
  1171.  
  1172. aliases {
  1173. intc = "/soc/interrupt-controller@7e00b200";
  1174. spi2 = "/soc/spi@7e2150c0";
  1175. i2c1 = "/soc/i2c@7e804000";
  1176. i2c_vc = "/soc/i2c@7e205000";
  1177. spi0 = "/soc/spi@7e204000";
  1178. thermal = "/soc/thermal@7e212000";
  1179. sdhost = "/soc/mmc@7e202000";
  1180. aux = "/soc/aux@7e215000";
  1181. gpio = "/soc/gpio@7e200000";
  1182. mmc1 = "/soc/mmcnr@7e300000";
  1183. audio = "/soc/audio";
  1184. dma = "/soc/dma@7e007000";
  1185. ethernet0 = "/soc/usb@7e980000/usb1@1/usbether@1";
  1186. soc = "/soc";
  1187. leds = "/leds";
  1188. mmc = "/soc/mmc@7e300000";
  1189. serial1 = "/soc/serial@7e201000";
  1190. i2c_arm = "/soc/i2c@7e804000";
  1191. uart0 = "/soc/serial@7e201000";
  1192. fb = "/soc/fb";
  1193. i2c2 = "/soc/i2c@7e805000";
  1194. i2s = "/soc/i2s@7e203000";
  1195. spi1 = "/soc/spi@7e215080";
  1196. usb = "/soc/usb@7e980000";
  1197. i2c0 = "/soc/i2c@7e205000";
  1198. watchdog = "/soc/watchdog@7e100000";
  1199. axiperf = "/soc/axiperf";
  1200. mmc0 = "/soc/mmc@7e202000";
  1201. sound = "/soc/sound";
  1202. mailbox = "/soc/mailbox@7e00b880";
  1203. uart1 = "/soc/serial@7e215040";
  1204. random = "/soc/rng@7e104000";
  1205. i2c = "/soc/i2c@7e804000";
  1206. serial0 = "/soc/serial@7e215040";
  1207. };
  1208.  
  1209. chosen {
  1210. bootargs = "coherent_pool=1M 8250.nr_uarts=0 bcm2708_fb.fbwidth=1824 bcm2708_fb.fbheight=984 bcm2708_fb.fbswap=1 vc_mem.mem_base=0x3ec00000 vc_mem.mem_size=0x40000000 console=ttyS0,115200 console=tty1 root=PARTUUID=6c586e13-02 rootfstype=ext4 elevator=deadline fsck.repair=yes rootwait";
  1211. kaslr-seed = < 0xe9d1ca31 0x3898a7c2 >;
  1212. };
  1213.  
  1214. thermal-zones {
  1215.  
  1216. cpu-thermal {
  1217. thermal-sensors = < 0x02 >;
  1218. polling-delay = < 0x3e8 >;
  1219. polling-delay-passive = < 0x00 >;
  1220. coefficients = < 0xfffffde6 0x64960 >;
  1221. phandle = < 0x32 >;
  1222.  
  1223. cooling-maps {
  1224. };
  1225. };
  1226. };
  1227.  
  1228. timer {
  1229. compatible = "arm,armv7-timer";
  1230. always-on;
  1231. interrupt-parent = < 0x19 >;
  1232. interrupts = < 0x00 0x04 0x01 0x04 0x03 0x04 0x02 0x04 >;
  1233. };
  1234.  
  1235. memory {
  1236. device_type = "memory";
  1237. reg = < 0x00 0x3b400000 >;
  1238. };
  1239.  
  1240. phy {
  1241. compatible = "usb-nop-xceiv";
  1242. phandle = < 0x18 >;
  1243. #phy-cells = < 0x00 >;
  1244. };
  1245.  
  1246. fixedregulator_3v3 {
  1247. compatible = "regulator-fixed";
  1248. phandle = < 0x7c >;
  1249. regulator-min-microvolt = < 0x325aa0 >;
  1250. regulator-max-microvolt = < 0x325aa0 >;
  1251. regulator-always-on;
  1252. regulator-name = "3v3";
  1253. };
  1254.  
  1255. cpus {
  1256. enable-method = "brcm,bcm2836-smp";
  1257. #address-cells = < 0x01 >;
  1258. #size-cells = < 0x00 >;
  1259. phandle = < 0x7a >;
  1260.  
  1261. cpu@3 {
  1262. compatible = "arm,cortex-a53";
  1263. cpu-release-addr = < 0x00 0xf0 >;
  1264. device_type = "cpu";
  1265. enable-method = "spin-table";
  1266. phandle = < 0x21 >;
  1267. reg = < 0x03 >;
  1268. clock-frequency = < 0x47868c00 >;
  1269. };
  1270.  
  1271. cpu@1 {
  1272. compatible = "arm,cortex-a53";
  1273. cpu-release-addr = < 0x00 0xe0 >;
  1274. device_type = "cpu";
  1275. enable-method = "spin-table";
  1276. phandle = < 0x1f >;
  1277. reg = < 0x01 >;
  1278. clock-frequency = < 0x47868c00 >;
  1279. };
  1280.  
  1281. cpu@2 {
  1282. compatible = "arm,cortex-a53";
  1283. cpu-release-addr = < 0x00 0xe8 >;
  1284. device_type = "cpu";
  1285. enable-method = "spin-table";
  1286. phandle = < 0x20 >;
  1287. reg = < 0x02 >;
  1288. clock-frequency = < 0x47868c00 >;
  1289. };
  1290.  
  1291. cpu@0 {
  1292. compatible = "arm,cortex-a53";
  1293. cpu-release-addr = < 0x00 0xd8 >;
  1294. device_type = "cpu";
  1295. enable-method = "spin-table";
  1296. phandle = < 0x1e >;
  1297. reg = < 0x00 >;
  1298. clock-frequency = < 0x47868c00 >;
  1299. };
  1300. };
  1301.  
  1302. fixedregulator_5v0 {
  1303. compatible = "regulator-fixed";
  1304. phandle = < 0x7d >;
  1305. regulator-min-microvolt = < 0x4c4b40 >;
  1306. regulator-max-microvolt = < 0x4c4b40 >;
  1307. regulator-always-on;
  1308. regulator-name = "5v0";
  1309. };
  1310.  
  1311. axi {
  1312.  
  1313. vc_mem {
  1314. reg = < 0x3ec00000 0x40000000 0xc0000000 >;
  1315. };
  1316. };
  1317. };
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