raul@raul-vbox:~/or1k/mysoc$ fusesoc --verbose sim mor1kx-generic --elf-load sw/uart/uart.or32
orpsoc_tb.dut.mor1kx0.bus_gen.ibus_bridge: Wishbone bus IF is B3_REGISTERED_FEEDBACK
orpsoc_tb.dut.mor1kx0.bus_gen.dbus_bridge: Wishbone bus IF is B3_REGISTERED_FEEDBACK
Program header 0: addr 0x00000000, size 0x00000190
Program header 1: addr 0x00000200, size 0x00000E1C
Program header 2: addr 0x00001200, size 0x00000CE9
elf-loader: /home/raul/or1k/mysoc/sw/uart/uart.or32 was loaded
Loading        1978 words
                4040 : UART Write 0x2 = 0xxx 0000
                4440 : UART Write 0x1 = 0xxx 0000
                4840 : UART Write 0x3 = 0xxx 0000
                5600 : UART Read 0x3 = 0xX3 0000
                5930 : UART Write 0x3 = 0xxx 0000
                6530 : UART Write 0x1 = 0xxx 0000
                7020 : UART Write 0x0 = 0xxx 0000
                7650 : UART Read 0x3 = 0xX3 0000
                7930 : UART Write 0x3 = 0xX3 0000