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  1. /******************************************************************************
  2. *
  3. * (c) Copyright 2010-2013 Xilinx, Inc. All rights reserved.
  4. *
  5. * This file contains confidential and proprietary information of Xilinx, Inc.
  6. * and is protected under U.S. and international copyright and other
  7. * intellectual property laws.
  8. *
  9. * DISCLAIMER
  10. * This disclaimer is not a license and does not grant any rights to the
  11. * materials distributed herewith. Except as otherwise provided in a valid
  12. * license issued to you by Xilinx, and to the maximum extent permitted by
  13. * applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL
  14. * FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS,
  15. * IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
  16. * MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE;
  17. * and (2) Xilinx shall not be liable (whether in contract or tort, including
  18. * negligence, or under any other theory of liability) for any loss or damage
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  25. *
  26. * CRITICAL APPLICATIONS
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  31. * that could lead to death, personal injury, or severe property or
  32. * environmental damage (individually and collectively, "Critical
  33. * Applications"). Customer assumes the sole risk and liability of any use of
  34. * Xilinx products in Critical Applications, subject only to applicable laws
  35. * and regulations governing limitations on product liability.
  36. *
  37. * THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE
  38. * AT ALL TIMES.
  39. *
  40. ******************************************************************************/
  41. /*****************************************************************************/
  42. /**
  43. *
  44. * @file xaxidma_example_simple_poll.c
  45. *
  46. * This file demonstrates how to use the xaxidma driver on the Xilinx AXI
  47. * DMA core (AXIDMA) to transfer packets in polling mode when the AXI DMA core
  48. * is configured in simple mode.
  49. *
  50. * This code assumes a loopback hardware widget is connected to the AXI DMA
  51. * core for data packet loopback.
  52. *
  53. * To see the debug print, you need a Uart16550 or uartlite in your system,
  54. * and please set "-DDEBUG" in your compiler options. You need to rebuild your
  55. * software executable.
  56. *
  57. * Make sure that MEMORY_BASE is defined properly as per the HW system. The
  58. * h/w system built in Area mode has a maximum DDR memory limit of 64MB. In
  59. * throughput mode, it is 512MB. These limits are need to ensured for
  60. * proper operation of this code.
  61. *
  62. *
  63. * <pre>
  64. * MODIFICATION HISTORY:
  65. *
  66. * Ver Who Date Changes
  67. * ----- ---- -------- -------------------------------------------------------
  68. * 4.00a rkv 02/22/11 New example created for simple DMA, this example is for
  69. * simple DMA
  70. * 5.00a srt 03/06/12 Added Flushing and Invalidation of Caches to fix CRs
  71. * 648103, 648701.
  72. * Added V7 DDR Base Address to fix CR 649405.
  73. * 6.00a srt 03/27/12 Changed API calls to support MCDMA driver.
  74. * 7.00a srt 06/18/12 API calls are reverted back for backward compatibility.
  75. * 7.01a srt 11/02/12 Buffer sizes (Tx and Rx) are modified to meet maximum
  76. * DDR memory limit of the h/w system built with Area mode
  77. * 7.02a srt 03/01/13 Updated DDR base address for IPI designs (CR 703656).
  78. *
  79. * </pre>
  80. *
  81. * ***************************************************************************
  82.  
  83. */
  84. /***************************** Include Files *********************************/
  85. #include "xaxidma.h"
  86. #include "xparameters.h"
  87. #include "xdebug.h"
  88.  
  89.  
  90.  
  91. /******************** Constant Definitions **********************************/
  92.  
  93. /*
  94. * Device hardware build related constants.
  95. */
  96.  
  97. #define DMA_DEV_ID XPAR_AXIDMA_0_DEVICE_ID
  98. #define DDR_BASE_ADDR XPAR_DDR_MEM_BASEADDR
  99.  
  100. #ifndef DDR_BASE_ADDR
  101. #warning CHECK FOR THE VALID DDR ADDRESS IN XPARAMETERS.H, \
  102. DEFAULT SET TO 0x01000000
  103. #define MEM_BASE_ADDR 0x01000000
  104. #else
  105. #define MEM_BASE_ADDR (DDR_BASE_ADDR + 0x1000000)
  106. #endif
  107.  
  108. #define TX_BUFFER_BASE (MEM_BASE_ADDR + 0x00100000)
  109. #define RX_BUFFER_BASE (MEM_BASE_ADDR + 0x00300000)
  110. #define RX_BUFFER_HIGH (MEM_BASE_ADDR + 0x004FFFFF)
  111.  
  112. #define NUMBER_OF_WORDS 32
  113. #define NUMBER_OF_BYTES NUMBER_OF_WORDS * 4
  114.  
  115. #define TEST_START_VALUE 10
  116.  
  117. #define NUMBER_OF_TRANSFERS NUMBER_OF_WORDS / 4
  118.  
  119. /**************************** Type Definitions *******************************/
  120.  
  121.  
  122. /***************** Macros (Inline Functions) Definitions *********************/
  123.  
  124.  
  125. /************************** Function Prototypes ******************************/
  126.  
  127. #if (!defined(DEBUG))
  128. extern void xil_printf(const char *format, ...);
  129. #endif
  130.  
  131. int XAxiDma_SimplePollExample(u16 DeviceId);
  132. static int CheckData(u32 cur_indx);
  133.  
  134. /************************** Variable Definitions *****************************/
  135. /*
  136. * Device instance definitions
  137. */
  138. XAxiDma AxiDma;
  139.  
  140.  
  141. /*****************************************************************************/
  142. /*
  143. * The entry point for this example. It invokes the example function,
  144. * and reports the execution status.
  145. *
  146. * @param None.
  147. *
  148. * @return
  149. * - XST_SUCCESS if example finishes successfully
  150. * - XST_FAILURE if example fails.
  151. *
  152. * @note None.
  153. *
  154. ******************************************************************************/
  155. int main()
  156. {
  157. int Status;
  158.  
  159. xil_printf("\r\n--- Entering main() --- \r\n");
  160.  
  161. /* Run the poll example for simple transfer */
  162. Status = XAxiDma_SimplePollExample(DMA_DEV_ID);
  163.  
  164. if (Status != XST_SUCCESS) {
  165.  
  166. xil_printf("XAxiDma_SimplePollExample: Failed\r\n");
  167. return XST_FAILURE;
  168. }
  169.  
  170. xil_printf("XAxiDma_SimplePollExample: Passed\r\n");
  171.  
  172. xil_printf("--- Exiting main() --- \r\n");
  173.  
  174. return XST_SUCCESS;
  175.  
  176. }
  177.  
  178.  
  179. /*****************************************************************************/
  180. /**
  181. * The example to do the simple transfer through polling. The constant
  182. * NUMBER_OF_TRANSFERS defines how many times a simple transfer is repeated.
  183. *
  184. * @param DeviceId is the Device Id of the XAxiDma instance
  185. *
  186. * @return
  187. * - XST_SUCCESS if example finishes successfully
  188. * - XST_FAILURE if error occurs
  189. *
  190. * @note None
  191. *
  192. *
  193. ******************************************************************************/
  194. int XAxiDma_SimplePollExample(u16 DeviceId)
  195. {
  196. XAxiDma_Config *CfgPtr;
  197. int Status;
  198. u32 Index;
  199. u32 *TxBufferPtr;
  200. u32 *RxBufferPtr;
  201. u32 Value;
  202.  
  203.  
  204. TxBufferPtr = (u32 *)TX_BUFFER_BASE ;
  205. RxBufferPtr = (u32 *)RX_BUFFER_BASE;
  206.  
  207. /* Initialize the XAxiDma device.
  208. */
  209. CfgPtr = XAxiDma_LookupConfig(DeviceId);
  210. if (!CfgPtr) {
  211. xil_printf("No config found for %d\r\n", DeviceId);
  212. return XST_FAILURE;
  213. }
  214. xil_printf("Found config for AXI DMA\n\r");
  215.  
  216. Status = XAxiDma_CfgInitialize(&AxiDma, CfgPtr);
  217. if (Status != XST_SUCCESS) {
  218. xil_printf("Initialization failed %d\r\n", Status);
  219. return XST_FAILURE;
  220. }
  221. xil_printf("Finish initializing configurations for AXI DMA\n\r");
  222.  
  223. if(XAxiDma_HasSg(&AxiDma)){
  224. xil_printf("Device configured as SG mode \r\n");
  225. return XST_FAILURE;
  226. }
  227. xil_printf("AXI DMA is configured as Simple Transfer mode\n\r");
  228.  
  229. /* Disable interrupts, we use polling mode
  230. */
  231. XAxiDma_IntrDisable(&AxiDma, XAXIDMA_IRQ_ALL_MASK,
  232. XAXIDMA_DEVICE_TO_DMA);
  233. XAxiDma_IntrDisable(&AxiDma, XAXIDMA_IRQ_ALL_MASK,
  234. XAXIDMA_DMA_TO_DEVICE);
  235.  
  236. Value = TEST_START_VALUE;
  237.  
  238. for(Index = 0; Index < NUMBER_OF_WORDS-2; Index ++) {
  239. TxBufferPtr[Index] = Value;
  240. Value = Value + 1;
  241. }
  242. /* Flush the SrcBuffer before the DMA transfer, in case the Data Cache
  243. * is enabled
  244. */
  245. Xil_DCacheFlushRange((u32)TxBufferPtr, NUMBER_OF_BYTES);
  246.  
  247. for(Index = 0; Index < NUMBER_OF_TRANSFERS; Index ++) {
  248.  
  249. Status = XAxiDma_SimpleTransfer(&AxiDma,(u32) (RxBufferPtr + Index * 4),
  250. 4 * 4, XAXIDMA_DEVICE_TO_DMA);
  251.  
  252. if (Status != XST_SUCCESS) {
  253. return XST_FAILURE;
  254. }
  255.  
  256.  
  257. Status = XAxiDma_SimpleTransfer(&AxiDma,(u32) (TxBufferPtr + Index * 4),
  258. 4 * 4, XAXIDMA_DMA_TO_DEVICE);
  259.  
  260. if (Status != XST_SUCCESS) {
  261. return XST_FAILURE;
  262. }
  263.  
  264. xil_printf("Waiting for AXI DMA \n\r");
  265.  
  266. while (XAxiDma_Busy(&AxiDma,XAXIDMA_DMA_TO_DEVICE)) {
  267. //wait
  268. }
  269. xil_printf("DMA_TO_DEVICE finishes \n\r");
  270.  
  271. while (XAxiDma_Busy(&AxiDma,XAXIDMA_DEVICE_TO_DMA)) {
  272. //wait
  273. }
  274. xil_printf("DEVICE_TO_DMA finishes \n\r");
  275.  
  276. Status = CheckData(Index);
  277. if (Status != XST_SUCCESS) {
  278. return XST_FAILURE;
  279. }
  280.  
  281. }
  282.  
  283. /* Test finishes successfully
  284. */
  285. return XST_SUCCESS;
  286. }
  287.  
  288.  
  289.  
  290. /*****************************************************************************/
  291. /*
  292. *
  293. * This function checks data buffer after the DMA transfer is finished.
  294. *
  295. * @param None
  296. *
  297. * @return
  298. *
  299. * @note None.
  300. *
  301. ******************************************************************************/
  302. static int CheckData(u32 cur_indx)
  303. {
  304. u32 *RxPacket;
  305. int Index = 0;
  306.  
  307. RxPacket = (u32 *) (RX_BUFFER_BASE + cur_indx * 4 * 4);
  308.  
  309. /* Invalidate the DestBuffer before receiving the data, in case the
  310. * Data Cache is enabled
  311. */
  312. Xil_DCacheInvalidateRange((u32)RxPacket, NUMBER_OF_BYTES);
  313.  
  314. for(Index = 0; Index < 2; Index++) {
  315. xil_printf("Data %d: %x\r\n", Index, (unsigned int)RxPacket[Index]);
  316. }
  317.  
  318. return XST_SUCCESS;
  319. }
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