flashrom 4 MiB

root@coreboot:/home/coreboot# /usr/local/sbin/flashrom -p internal:laptop=force_I_want_a_brick -V -c "MX25L3206E" -VV
flashrom v0.9.6.1-r1668 on Linux 3.2.0-4-amd64 (x86_64)
flashrom is free software, get the source code at http://www.flashrom.org

flashrom was built with libpci 3.1.9, GCC 4.7.2, little endian
Command line (6 args): /usr/local/sbin/flashrom -p internal:laptop=force_I_want_a_brick -V -c MX25L3206E -VV
Calibrating delay loop... OS timer resolution is 1 usecs, 1988M loops per second, 10 myus = 11 us, 100 myus = 101 us, 1000 myus = 1007 us, 10000 myus = 10072 us, 4 myus = 5 us, OK.
Initializing internal programmer
Found candidate at: 00000500-00000510
Found coreboot table at 0x00000500.
Found candidate at: 00000000-00000834
Found coreboot table at 0x00000000.
coreboot table found at 0xbffee000.
coreboot header(24) checksum: 9990 table(2100) checksum: cc7c entries: 17
Vendor ID: Lenovo, part ID: ThinkPad T60 / T60p
DMI string system-manufacturer: "Lenovo"
DMI string system-product-name: "ThinkPad T60 / T60p"
DMI string system-version: "1.0"
DMI string baseboard-manufacturer: ""
DMI string baseboard-product-name: ""
DMI string baseboard-version: ""
DMI string chassis-type: "Desktop"
W836xx enter config mode worked or we were already in config mode. W836xx leave config mode had no effect.
Active config mode, unknown reg 0x20 ID: f4.
Please send the output of "flashrom -V" to
flashrom@flashrom.org with W836xx: your board name: flashrom -V
as the subject to help us finish support for your Super I/O. Thanks.
matching Lenovo against ^ThinkPad T60
matching ThinkPad T60 / T60p against ^ThinkPad T60
Whitelisted laptop detected.
Found chipset "Intel ICH7M" with PCI ID 8086:27b9. Enabling flash write...
0xfff80000/0xffb80000 FWH IDSEL: 0x0
0xfff00000/0xffb00000 FWH IDSEL: 0x0
0xffe80000/0xffa80000 FWH IDSEL: 0x1
0xffe00000/0xffa00000 FWH IDSEL: 0x1
0xffd80000/0xff980000 FWH IDSEL: 0x2
0xffd00000/0xff900000 FWH IDSEL: 0x2
0xffc80000/0xff880000 FWH IDSEL: 0x3
0xffc00000/0xff800000 FWH IDSEL: 0x3
0xff700000/0xff300000 FWH IDSEL: 0x4
0xff600000/0xff200000 FWH IDSEL: 0x5
0xff500000/0xff100000 FWH IDSEL: 0x6
0xff400000/0xff000000 FWH IDSEL: 0x7
0xfff80000/0xffb80000 FWH decode enabled
0xfff00000/0xffb00000 FWH decode enabled
0xffe80000/0xffa80000 FWH decode enabled
0xffe00000/0xffa00000 FWH decode enabled
0xffd80000/0xff980000 FWH decode enabled
0xffd00000/0xff900000 FWH decode enabled
0xffc80000/0xff880000 FWH decode enabled
0xffc00000/0xff800000 FWH decode enabled
0xff700000/0xff300000 FWH decode enabled
0xff600000/0xff200000 FWH decode enabled
0xff500000/0xff100000 FWH decode enabled
0xff400000/0xff000000 FWH decode enabled
Maximum FWH chip size: 0x100000 bytes
BIOS_CNTL = 0x09: BIOS Lock Enable: disabled, BIOS Write Enable: enabled
Root Complex Register Block address = 0xfed1c000
GCS = 0xc10460: BIOS Interface Lock-Down: disabled, Boot BIOS Straps: 0x1 (SPI)
Top Swap : not enabled
SPIBAR = 0xfed1c000 + 0x3020
0x00: 0x0004     (SPIS)
0x02: 0x4004     (SPIC)
0x04: 0x00000000 (SPIA)
0x08: 0x00000000 (SPID0)
0x0c: 0x00000000 (SPID0+4)
0x10: 0x00000000 (SPID1)
0x14: 0x00000000 (SPID1+4)
0x18: 0x00000000 (SPID2)
0x1c: 0x00000000 (SPID2+4)
0x20: 0x00000000 (SPID3)
0x24: 0x00000000 (SPID3+4)
0x28: 0x00000000 (SPID4)
0x2c: 0x00000000 (SPID4+4)
0x30: 0x00000000 (SPID5)
0x34: 0x00000000 (SPID5+4)
0x38: 0x00000000 (SPID6)
0x3c: 0x00000000 (SPID6+4)
0x40: 0x00000000 (SPID7)
0x44: 0x00000000 (SPID7+4)
0x50: 0x00000000 (BBAR)
0x54: 0x0004     (PREOP)
0x56: 0x0000     (OPTYPE)
0x58: 0x00000005 (OPMENU)
0x5c: 0x00000000 (OPMENU+4)
0x60: 0x00000000 (PBR0)
0x64: 0x00000000 (PBR1)
0x68: 0x00000000 (PBR2)
Programming OPCODES...
program_opcodes: preop=5006 optype=463b opmenu=05d80302c79f0190
done
        OP        Type      Pre-OP
op[0]: 0x02, write w/  addr, none
op[1]: 0x03, read  w/  addr, none
op[2]: 0xd8, write w/  addr, none
op[3]: 0x05, read  w/o addr, none
op[4]: 0x90, read  w/  addr, none
op[5]: 0x01, write w/o addr, none
op[6]: 0x9f, read  w/o addr, none
op[7]: 0xc7, write w/o addr, none
Pre-OP 0: 0x06, Pre-OP 1: 0x50
SPI Read Configuration: prefetching enabled, caching enabled, OK.
No board enable found matching coreboot IDs vendor="Lenovo", model="ThinkPad T60 / T60p".
The following protocols are supported: SPI.
Probing for Macronix MX25L3206E, 4096 kB: RDID returned 0xc2 0x20 0x16. probe_spi_rdid_generic: id1 0xc2, id2 0x2016
Found Macronix flash chip "MX25L3206E" (4096 kB, SPI) at physical address 0xffc00000.
Chip status register is 0x00.
Chip status register: Status Register Write Disable (SRWD) is not set
Chip status register: Bit 6 is not set
Chip status register: Block Protect 3 (BP3) is not set
Chip status register: Block Protect 2 (BP2) is not set
Chip status register: Block Protect 1 (BP1) is not set
Chip status register: Block Protect 0 (BP0) is not set
Chip status register: Write Enable Latch (WEL) is not set
Chip status register: Write In Progress (WIP/BUSY) is not set
This chip may contain one-time programmable memory. flashrom cannot read
and may never be able to write it, hence it may not be able to completely
clone the contents of this chip (see man page for details).
No operations were specified.
Restoring MMIO space at 0x7f3c263d9070
Restoring MMIO space at 0x7f3c263d907c
Restoring MMIO space at 0x7f3c263d9078
Restoring MMIO space at 0x7f3c263d9076
Restoring MMIO space at 0x7f3c263d9074
Restoring PCI config space for 00:1f:0 reg 0xdc


4 MiB flash for T60, same flashchip is also used in X60. :-D