class NandReaderSoC(BaseSoC):
    csr_map = {
        "nandconf": 25,
        "nandread": 26,
        "nandread_mem": 27,
        # "nanddmaw": 27,
        # "nanddmar": 28,
        # "liteusb": 29,
    }
    csr_map.update(BaseSoC.csr_map)

#    mem_map = {
#        "nandread_mem": 0x30000000, # (shadow @0xb0000000)
#    }
#    mem_map.update(BaseSoC.mem_map)

    def __init__(self, platform, **kwargs):
        BaseSoC.__init__(self, platform, **kwargs)
        # data = Signal(8)
        platform.add_extension(_io)

        # self.add_memory_region("memory", self.mem_map["nandread_mem"]+0x80000000, 0x2000)
        # lasmi = self.sdram.crossbar.get_master()
        # self.clock_domains.ftdi = ClockDomain()
        # self.submodules.liteusb = FT2232HPHY(FT2232HModel(data))
        self.submodules.nandconf = NandConf(platform.request("io"))
        # self.submodules.nanddmar = NandDmaReader(lasmi, data)
        # self.submodules.nanddmaw = NandDmaWriter(lasmi, data)
        self.submodules.nandread = NandRead(self.nandconf,
                                            platform.request("user_led"))
                                            # self.nanddmar,
                                            # self.nanddmaw,
                                            # data)