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- Open-source, synchronous stuff:
- Rocket RISC-V core 1.4GHz on 45nm SOI
- http://www.cs.berkeley.edu/~yunsup/papers/riscv-esscirc2014.pdf
- Archipelago Open-Source FPGA
- http://www.eecs.berkeley.edu/Pubs/TechRpts/2014/EECS-2014-43.pdf
- Open-source bitstream generation for Xilinx
- http://drop.isi.edu/sites/default/files/users/nsteiner/soni-2013-bitstream-fccm13.pdf
- Qflow: a digital synthesis flow using open-source, EDA tools
- http://opencircuitdesign.com/qflow/
- gEDA for the board and stuff
- https://en.wikipedia.org/wiki/GEDA
- Tekmos for 350nm gate-arrays or cheap MPW's on others
- http://www.tekmos.com/products/asics/process-technologies
- eASIC for 90nm, 45nm, or 28nm S-ASIC with lower NRE and lower volume
- http://www.easic.com/products/90-nm-easic-nextreme/
- Triad Semiconductor for low NRE, mixed signal
- http://www.triadsemi.com/vca-technology/
- Asynchronous stuff below:
- AMULET
- http://apt.cs.manchester.ac.uk/projects/processors/amulet/AMULET3_uP.php
- Note: Been doing asynchronous ARM's for quite a while.
- Octasic asynchronous DSP
- http://www.octasic.com/technology/opus-dsp-architecture
- Cornell's asynchronous FGPA page
- http://vlsi.cornell.edu/fpga.php
- Test of one at 180nm vs Xilinx. Async wins.
- http://vlsi.cornell.edu/~rajit/ps/highperf.pdf
- Caltech presentation on asynchronous design flow, their chips, and detailed comparisons to synchronous ones
- www.async.caltech.edu/general07.ppt
- Caltech's papers on the subject
- http://www.async.caltech.edu/publications.html
- Design of standard-cell libraries for asynchronous circuits with teh ASCEnD flow
- http://www.computer.org/csdl/proceedings/isvlsi/2013/9999/00/06654647.pdf
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