Pastebin launched a little side project called VERYVIRAL.com, check it out ;-) Want more features on Pastebin? Sign Up, it's FREE!
Guest

Untitled

By: thesame on Oct 25th, 2012  |  syntax: None  |  size: 25.30 KB  |  views: 45  |  expires: Never
download  |  raw  |  embed  |  report abuse  |  print
Text below is selected. Please press Ctrl+C to copy to your clipboard. (⌘+C on Mac)
  1.  
  2.  
  3. coreboot-4.0-2841-g655a65c Thu Oct 25 17:04:26 EEST 2012 starting...
  4. Loading image.
  5. CBFS: Looking for 'fallback/coreboot_ram'
  6. CBFS: found.
  7. CBFS: loading stage fallback/coreboot_ram @ 0x100000 (278528 bytes), entry @ 0x100000
  8. Jumping to image.
  9. coreboot-4.0-2841-g655a65c Thu Oct 25 17:04:26 EEST 2012 booting...
  10. clocks_per_usec: 753
  11. Enumerating buses...
  12. Show all devs...Before device enumeration.
  13. Root Device: enabled 1
  14. APIC_CLUSTER: 0: enabled 1
  15. APIC: 00: enabled 1
  16. PCI_DOMAIN: 0000: enabled 1
  17. PCI: 00:00.0: enabled 1
  18. PCI: 00:01.0: enabled 1
  19. PCI: 00:07.0: enabled 1
  20. PNP: 03f0.0: enabled 1
  21. PNP: 03f0.1: enabled 1
  22. PNP: 03f0.2: enabled 1
  23. PNP: 03f0.3: enabled 1
  24. PNP: 03f0.5: enabled 1
  25. PNP: 03f0.6: enabled 1
  26. PNP: 03f0.7: enabled 1
  27. PNP: 03f0.8: enabled 1
  28. PNP: 03f0.a: enabled 1
  29. PCI: 00:07.1: enabled 1
  30. PCI: 00:07.2: enabled 1
  31. PCI: 00:07.3: enabled 1
  32. PCI: 00:13.0: enabled 1
  33. Compare with tree...
  34. Root Device: enabled 1
  35.  APIC_CLUSTER: 0: enabled 1
  36.   APIC: 00: enabled 1
  37.  PCI_DOMAIN: 0000: enabled 1
  38.   PCI: 00:00.0: enabled 1
  39.   PCI: 00:01.0: enabled 1
  40.   PCI: 00:07.0: enabled 1
  41.    PNP: 03f0.0: enabled 1
  42.    PNP: 03f0.1: enabled 1
  43.    PNP: 03f0.2: enabled 1
  44.    PNP: 03f0.3: enabled 1
  45.    PNP: 03f0.5: enabled 1
  46.    PNP: 03f0.6: enabled 1
  47.    PNP: 03f0.7: enabled 1
  48.    PNP: 03f0.8: enabled 1
  49.    PNP: 03f0.a: enabled 1
  50.   PCI: 00:07.1: enabled 1
  51.   PCI: 00:07.2: enabled 1
  52.   PCI: 00:07.3: enabled 1
  53.   PCI: 00:13.0: enabled 1
  54. scan_static_bus for Root Device
  55. APIC_CLUSTER: 0 enabled
  56. PCI_DOMAIN: 0000 enabled
  57. PCI_DOMAIN: 0000 scanning...
  58. PCI: pci_scan_bus for bus 00
  59. PCI: 00:00.0 [8086/7190] ops
  60. PCI: 00:00.0 [8086/7190] enabled
  61. PCI: 00:01.0 [8086/7191] enabled
  62. PCI: 00:07.0 [8086/7110] bus ops
  63. PCI: 00:07.0 [8086/7110] enabled
  64. PCI: 00:07.1 [8086/7111] ops
  65. PCI: 00:07.1 [8086/7111] enabled
  66. PCI: 00:07.2 [8086/7112] ops
  67. PCI: 00:07.2 [8086/7112] enabled
  68. PCI: 00:07.3 [8086/7113] bus ops
  69. pwrmgt_enable: gpo default missing in devicetree.cb!
  70. PCI: 00:07.3 [8086/7113] enabled
  71. PCI: 00:08.0 [10ec/8139] enabled
  72. PCI: Static device PCI: 00:13.0 not found, disabling it.
  73. do_pci_scan_bridge for PCI: 00:01.0
  74. PCI: pci_scan_bus for bus 01
  75. PCI: 01:00.0 [5333/8a13] enabled
  76. PCI: pci_scan_bus returning with max=001
  77. do_pci_scan_bridge returns max 1
  78. scan_static_bus for PCI: 00:07.0
  79. PNP: 03f0.0 enabled
  80. PNP: 03f0.1 enabled
  81. PNP: 03f0.2 enabled
  82. PNP: 03f0.3 enabled
  83. PNP: 03f0.5 enabled
  84. PNP: 03f0.6 enabled
  85. PNP: 03f0.7 enabled
  86. PNP: 03f0.8 enabled
  87. PNP: 03f0.a enabled
  88. scan_static_bus for PCI: 00:07.0 done
  89. scan_static_bus for PCI: 00:07.3
  90. scan_static_bus for PCI: 00:07.3 done
  91. PCI: pci_scan_bus returning with max=001
  92. scan_static_bus for Root Device done
  93. done
  94. found VGA at PCI: 01:00.0
  95. Setting up VGA for PCI: 01:00.0
  96. Setting PCI_BRIDGE_CTL_VGA for bridge PCI: 00:01.0
  97. Setting PCI_BRIDGE_CTL_VGA for bridge PCI_DOMAIN: 0000
  98. Setting PCI_BRIDGE_CTL_VGA for bridge Root Device
  99. Allocating resources...
  100. Reading resources...
  101. Root Device read_resources bus 0 link: 0
  102. APIC_CLUSTER: 0 read_resources bus 0 link: 0
  103. APIC: 00 missing read_resources
  104. APIC_CLUSTER: 0 read_resources bus 0 link: 0 done
  105. PCI_DOMAIN: 0000 read_resources bus 0 link: 0
  106. PCI: 00:01.0 read_resources bus 1 link: 0
  107. PCI: 00:01.0 read_resources bus 1 link: 0 done
  108. PCI: 00:07.0 read_resources bus 0 link: 0
  109. PNP: 03f0.8 missing read_resources
  110. PCI: 00:07.0 read_resources bus 0 link: 0 done
  111. PCI_DOMAIN: 0000 read_resources bus 0 link: 0 done
  112. Root Device read_resources bus 0 link: 0 done
  113. Done reading resources.
  114. Show resources in subtree (Root Device)...After reading.
  115.  Root Device child on link 0 APIC_CLUSTER: 0
  116.   APIC_CLUSTER: 0 child on link 0 APIC: 00
  117.    APIC: 00
  118.   PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  119.   PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffff flags 40040100 index 10000000
  120.   PCI_DOMAIN: 0000 resource base 0 size 0 align 0 gran 0 limit ffffffff flags 40040200 index 10000100
  121.    PCI: 00:00.0
  122.    PCI: 00:00.0 resource base 0 size 10000000 align 28 gran 28 limit ffffffff flags 1200 index 10
  123.    PCI: 00:01.0 child on link 0 PCI: 01:00.0
  124.    PCI: 00:01.0 resource base 0 size 0 align 12 gran 12 limit ffff flags 80102 index 1c
  125.    PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 81202 index 24
  126.    PCI: 00:01.0 resource base 0 size 0 align 20 gran 20 limit ffffffff flags 80202 index 20
  127.     PCI: 01:00.0
  128.     PCI: 01:00.0 resource base 0 size 4000000 align 26 gran 26 limit ffffffff flags 200 index 10
  129.     PCI: 01:00.0 resource base 0 size 10000 align 16 gran 16 limit ffffffff flags 2200 index 30
  130.    PCI: 00:07.0 child on link 0 PNP: 03f0.0
  131.    PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
  132.    PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
  133.     PNP: 03f0.0
  134.     PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
  135.     PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
  136.     PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags c0000800 index 74
  137.     PNP: 03f0.1
  138.     PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
  139.     PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
  140.     PNP: 03f0.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
  141.     PNP: 03f0.2
  142.     PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
  143.     PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
  144.     PNP: 03f0.3
  145.     PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags c0000100 index 60
  146.     PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
  147.     PNP: 03f0.5
  148.     PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 60
  149.     PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags c0000100 index 62
  150.     PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags c0000400 index 70
  151.     PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags c0000400 index 72
  152.     PNP: 03f0.6
  153.     PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
  154.     PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
  155.     PNP: 03f0.7
  156.     PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
  157.     PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
  158.     PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
  159.     PNP: 03f0.8
  160.     PNP: 03f0.a
  161.     PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
  162.    PCI: 00:07.1
  163.    PCI: 00:07.1 resource base 0 size 10 align 4 gran 4 limit ffff flags 100 index 20
  164.    PCI: 00:07.2
  165.    PCI: 00:07.2 resource base 0 size 20 align 5 gran 5 limit ffff flags 100 index 20
  166.    PCI: 00:07.3
  167.    PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
  168.    PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
  169.    PCI: 00:08.0
  170.    PCI: 00:08.0 resource base 0 size 100 align 8 gran 8 limit ffff flags 100 index 10
  171.    PCI: 00:08.0 resource base 0 size 100 align 8 gran 8 limit ffffffff flags 200 index 14
  172.    PCI: 00:13.0
  173. PCI_DOMAIN: 0000 compute_resources_io: base: 0 size: 0 align: 0 gran: 0 limit: ffff
  174. PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff
  175. PCI: 00:01.0 compute_resources_io: base: 0 size: 0 align: 12 gran: 12 limit: ffff done
  176. PCI: 00:08.0 10 *  [0x0 - 0xff] io
  177. PCI: 00:07.2 20 *  [0x400 - 0x41f] io
  178. PCI: 00:07.1 20 *  [0x420 - 0x42f] io
  179. PCI_DOMAIN: 0000 compute_resources_io: base: 430 size: 430 align: 8 gran: 0 limit: ffff done
  180. PCI_DOMAIN: 0000 compute_resources_mem: base: 0 size: 0 align: 0 gran: 0 limit: ffffffff
  181. PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
  182. PCI: 00:01.0 compute_resources_prefmem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff done
  183. PCI: 00:01.0 compute_resources_mem: base: 0 size: 0 align: 20 gran: 20 limit: ffffffff
  184. PCI: 01:00.0 10 *  [0x0 - 0x3ffffff] mem
  185. PCI: 01:00.0 30 *  [0x4000000 - 0x400ffff] mem
  186. PCI: 00:01.0 compute_resources_mem: base: 4010000 size: 4100000 align: 26 gran: 20 limit: ffffffff done
  187. PCI: 00:00.0 10 *  [0x0 - 0xfffffff] prefmem
  188. PCI: 00:01.0 20 *  [0x10000000 - 0x140fffff] mem
  189. PCI: 00:08.0 14 *  [0x14100000 - 0x141000ff] mem
  190. PCI_DOMAIN: 0000 compute_resources_mem: base: 14100100 size: 14100100 align: 28 gran: 0 limit: ffffffff done
  191. avoid_fixed_resources: PCI_DOMAIN: 0000
  192. avoid_fixed_resources:@PCI_DOMAIN: 0000 10000000 limit 0000ffff
  193. avoid_fixed_resources:@PCI_DOMAIN: 0000 10000100 limit ffffffff
  194. constrain_resources: PCI_DOMAIN: 0000
  195. constrain_resources: PCI: 00:00.0
  196. constrain_resources: PCI: 00:01.0
  197. constrain_resources: PCI: 01:00.0
  198. constrain_resources: PCI: 00:07.0
  199. constrain_resources: PNP: 03f0.0
  200. constrain_resources: PNP: 03f0.1
  201. constrain_resources: PNP: 03f0.2
  202. constrain_resources: PNP: 03f0.3
  203. constrain_resources: PNP: 03f0.5
  204. constrain_resources: PNP: 03f0.6
  205. constrain_resources: PNP: 03f0.7
  206. constrain_resources: PNP: 03f0.8
  207. constrain_resources: PNP: 03f0.a
  208. constrain_resources: PCI: 00:07.1
  209. constrain_resources: PCI: 00:07.2
  210. constrain_resources: PCI: 00:07.3
  211. constrain_resources: PCI: 00:08.0
  212. avoid_fixed_resources2: PCI_DOMAIN: 0000@10000000 limit 0000ffff
  213.         lim->base 00001000 lim->limit 0000e3ff
  214. avoid_fixed_resources2: PCI_DOMAIN: 0000@10000100 limit ffffffff
  215.         lim->base 00000000 lim->limit ff7fffff
  216. Setting resources...
  217. PCI_DOMAIN: 0000 allocate_resources_io: base:1000 size:430 align:8 gran:0 limit:e3ff
  218. Assigned: PCI: 00:08.0 10 *  [0x1000 - 0x10ff] io
  219. Assigned: PCI: 00:07.2 20 *  [0x1400 - 0x141f] io
  220. Assigned: PCI: 00:07.1 20 *  [0x1420 - 0x142f] io
  221. PCI_DOMAIN: 0000 allocate_resources_io: next_base: 1430 size: 430 align: 8 gran: 0 done
  222. PCI: 00:01.0 allocate_resources_io: base:e3ff size:0 align:12 gran:12 limit:e3ff
  223. PCI: 00:01.0 allocate_resources_io: next_base: e3ff size: 0 align: 12 gran: 12 done
  224. PCI_DOMAIN: 0000 allocate_resources_mem: base:e0000000 size:14100100 align:28 gran:0 limit:ff7fffff
  225. Assigned: PCI: 00:00.0 10 *  [0xe0000000 - 0xefffffff] prefmem
  226. Assigned: PCI: 00:01.0 20 *  [0xf0000000 - 0xf40fffff] mem
  227. Assigned: PCI: 00:08.0 14 *  [0xf4100000 - 0xf41000ff] mem
  228. PCI_DOMAIN: 0000 allocate_resources_mem: next_base: f4100100 size: 14100100 align: 28 gran: 0 done
  229. PCI: 00:01.0 allocate_resources_prefmem: base:ff7fffff size:0 align:20 gran:20 limit:ff7fffff
  230. PCI: 00:01.0 allocate_resources_prefmem: next_base: ff7fffff size: 0 align: 20 gran: 20 done
  231. PCI: 00:01.0 allocate_resources_mem: base:f0000000 size:4100000 align:26 gran:20 limit:ff7fffff
  232. Assigned: PCI: 01:00.0 10 *  [0xf0000000 - 0xf3ffffff] mem
  233. Assigned: PCI: 01:00.0 30 *  [0xf4000000 - 0xf400ffff] mem
  234. PCI: 00:01.0 allocate_resources_mem: next_base: f4010000 size: 4100000 align: 26 gran: 20 done
  235. Root Device assign_resources, bus 0 link: 0
  236. Setting RAM size to 384 MB
  237. PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
  238. PCI: 00:00.0 10 <- [0x00e0000000 - 0x00efffffff] size 0x10000000 gran 0x1c prefmem
  239. PCI: 00:01.0 1c <- [0x000000e3ff - 0x000000e3fe] size 0x00000000 gran 0x0c bus 01 io
  240. PCI: 00:01.0 24 <- [0x00ff7fffff - 0x00ff7ffffe] size 0x00000000 gran 0x14 bus 01 prefmem
  241. PCI: 00:01.0 20 <- [0x00f0000000 - 0x00f40fffff] size 0x04100000 gran 0x14 bus 01 mem
  242. PCI: 00:01.0 assign_resources, bus 1 link: 0
  243. PCI: 01:00.0 10 <- [0x00f0000000 - 0x00f3ffffff] size 0x04000000 gran 0x1a mem
  244. PCI: 01:00.0 30 <- [0x00f4000000 - 0x00f400ffff] size 0x00010000 gran 0x10 romem
  245. PCI: 00:01.0 assign_resources, bus 1 link: 0
  246. PCI: 00:07.0 assign_resources, bus 0 link: 0
  247. PNP: 03f0.0 60 <- [0x00000003f0 - 0x00000003f7] size 0x00000008 gran 0x03 io
  248. PNP: 03f0.0 70 <- [0x0000000006 - 0x0000000006] size 0x00000001 gran 0x00 irq
  249. PNP: 03f0.0 74 <- [0x0000000002 - 0x0000000002] size 0x00000001 gran 0x00 drq
  250. PNP: 03f0.1 60 <- [0x0000000378 - 0x000000037f] size 0x00000008 gran 0x03 io
  251. PNP: 03f0.1 70 <- [0x0000000007 - 0x0000000007] size 0x00000001 gran 0x00 irq
  252. ERROR: PNP: 03f0.1 74 drq size: 0x0000000001 not assigned
  253. PNP: 03f0.2 60 <- [0x00000003f8 - 0x00000003ff] size 0x00000008 gran 0x03 io
  254. PNP: 03f0.2 70 <- [0x0000000004 - 0x0000000004] size 0x00000001 gran 0x00 irq
  255. PNP: 03f0.3 60 <- [0x00000002f8 - 0x00000002ff] size 0x00000008 gran 0x03 io
  256. PNP: 03f0.3 70 <- [0x0000000003 - 0x0000000003] size 0x00000001 gran 0x00 irq
  257. PNP: 03f0.5 60 <- [0x0000000060 - 0x0000000060] size 0x00000001 gran 0x00 io
  258. PNP: 03f0.5 62 <- [0x0000000064 - 0x0000000064] size 0x00000001 gran 0x00 io
  259. PNP: 03f0.5 70 <- [0x0000000001 - 0x0000000001] size 0x00000001 gran 0x00 irq
  260. PNP: 03f0.5 72 <- [0x000000000c - 0x000000000c] size 0x00000001 gran 0x00 irq
  261. ERROR: PNP: 03f0.6 60 io size: 0x0000000008 not assigned
  262. ERROR: PNP: 03f0.6 70 irq size: 0x0000000001 not assigned
  263. ERROR: PNP: 03f0.7 60 io size: 0x0000000001 not assigned
  264. ERROR: PNP: 03f0.7 62 io size: 0x0000000002 not assigned
  265. ERROR: PNP: 03f0.7 70 irq size: 0x0000000001 not assigned
  266. ERROR: PNP: 03f0.a 70 irq size: 0x0000000001 not assigned
  267. PCI: 00:07.0 assign_resources, bus 0 link: 0
  268. PCI: 00:07.1 20 <- [0x0000001420 - 0x000000142f] size 0x00000010 gran 0x04 io
  269. PCI: 00:07.2 20 <- [0x0000001400 - 0x000000141f] size 0x00000020 gran 0x05 io
  270. PCI: 00:08.0 10 <- [0x0000001000 - 0x00000010ff] size 0x00000100 gran 0x08 io
  271. PCI: 00:08.0 14 <- [0x00f4100000 - 0x00f41000ff] size 0x00000100 gran 0x08 mem
  272. PCI_DOMAIN: 0000 assign_resources, bus 0 link: 0
  273. Root Device assign_resources, bus 0 link: 0
  274. Done setting resources.
  275. Show resources in subtree (Root Device)...After assigning values.
  276.  Root Device child on link 0 APIC_CLUSTER: 0
  277.   APIC_CLUSTER: 0 child on link 0 APIC: 00
  278.    APIC: 00
  279.   PCI_DOMAIN: 0000 child on link 0 PCI: 00:00.0
  280.   PCI_DOMAIN: 0000 resource base 1000 size 430 align 8 gran 0 limit e3ff flags 40040100 index 10000000
  281.   PCI_DOMAIN: 0000 resource base e0000000 size 14100100 align 28 gran 0 limit ff7fffff flags 40040200 index 10000100
  282.   PCI_DOMAIN: 0000 resource base 0 size a0000 align 0 gran 0 limit 0 flags e0004200 index a
  283.   PCI_DOMAIN: 0000 resource base c0000 size 17f40000 align 0 gran 0 limit 0 flags e0004200 index b
  284.    PCI: 00:00.0
  285.    PCI: 00:00.0 resource base e0000000 size 10000000 align 28 gran 28 limit ff7fffff flags 60001200 index 10
  286.    PCI: 00:01.0 child on link 0 PCI: 01:00.0
  287.    PCI: 00:01.0 resource base e3ff size 0 align 12 gran 12 limit e3ff flags 60080102 index 1c
  288.    PCI: 00:01.0 resource base ff7fffff size 0 align 20 gran 20 limit ff7fffff flags 60081202 index 24
  289.    PCI: 00:01.0 resource base f0000000 size 4100000 align 26 gran 20 limit ff7fffff flags 60080202 index 20
  290.     PCI: 01:00.0
  291.     PCI: 01:00.0 resource base f0000000 size 4000000 align 26 gran 26 limit ff7fffff flags 60000200 index 10
  292.     PCI: 01:00.0 resource base f4000000 size 10000 align 16 gran 16 limit ff7fffff flags 60002200 index 30
  293.    PCI: 00:07.0 child on link 0 PNP: 03f0.0
  294.    PCI: 00:07.0 resource base 0 size 1000 align 0 gran 0 limit ffff flags c0000100 index 1
  295.    PCI: 00:07.0 resource base ff800000 size 800000 align 0 gran 0 limit 0 flags d0000200 index 2
  296.     PNP: 03f0.0
  297.     PNP: 03f0.0 resource base 3f0 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
  298.     PNP: 03f0.0 resource base 6 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
  299.     PNP: 03f0.0 resource base 2 size 1 align 0 gran 0 limit 0 flags e0000800 index 74
  300.     PNP: 03f0.1
  301.     PNP: 03f0.1 resource base 378 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
  302.     PNP: 03f0.1 resource base 7 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
  303.     PNP: 03f0.1 resource base 0 size 1 align 0 gran 0 limit 0 flags 800 index 74
  304.     PNP: 03f0.2
  305.     PNP: 03f0.2 resource base 3f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
  306.     PNP: 03f0.2 resource base 4 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
  307.     PNP: 03f0.3
  308.     PNP: 03f0.3 resource base 2f8 size 8 align 3 gran 3 limit 7ff flags e0000100 index 60
  309.     PNP: 03f0.3 resource base 3 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
  310.     PNP: 03f0.5
  311.     PNP: 03f0.5 resource base 60 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 60
  312.     PNP: 03f0.5 resource base 64 size 1 align 0 gran 0 limit ffffffff flags e0000100 index 62
  313.     PNP: 03f0.5 resource base 1 size 1 align 0 gran 0 limit 0 flags e0000400 index 70
  314.     PNP: 03f0.5 resource base c size 1 align 0 gran 0 limit 0 flags e0000400 index 72
  315.     PNP: 03f0.6
  316.     PNP: 03f0.6 resource base 0 size 8 align 3 gran 3 limit 7ff flags 100 index 60
  317.     PNP: 03f0.6 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
  318.     PNP: 03f0.7
  319.     PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit ffffffff flags 100 index 60
  320.     PNP: 03f0.7 resource base 0 size 2 align 1 gran 1 limit 7ff flags 100 index 62
  321.     PNP: 03f0.7 resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
  322.     PNP: 03f0.8
  323.     PNP: 03f0.a
  324.     PNP: 03f0.a resource base 0 size 1 align 0 gran 0 limit 0 flags 400 index 70
  325.    PCI: 00:07.1
  326.    PCI: 00:07.1 resource base 1420 size 10 align 4 gran 4 limit e3ff flags 60000100 index 20
  327.    PCI: 00:07.2
  328.    PCI: 00:07.2 resource base 1400 size 20 align 5 gran 5 limit e3ff flags 60000100 index 20
  329.    PCI: 00:07.3
  330.    PCI: 00:07.3 resource base e400 size 40 align 0 gran 0 limit ffff flags d0000100 index 1
  331.    PCI: 00:07.3 resource base f00 size 10 align 0 gran 0 limit ffff flags d0000100 index 2
  332.    PCI: 00:08.0
  333.    PCI: 00:08.0 resource base 1000 size 100 align 8 gran 8 limit e3ff flags 60000100 index 10
  334.    PCI: 00:08.0 resource base f4100000 size 100 align 8 gran 8 limit ff7fffff flags 60000200 index 14
  335.    PCI: 00:13.0
  336. Done allocating resources.
  337. Enabling resources...
  338. PCI: 00:00.0 cmd <- 06
  339. PCI: 00:01.0 bridge ctrl <- 008b
  340. PCI: 00:01.0 cmd <- 07
  341. PCI: 00:07.0 cmd <- 07
  342. PCI: 00:07.1 cmd <- 01
  343. PCI: 00:07.2 cmd <- 01
  344. PCI: 00:07.3 cmd <- 01
  345. PCI: 00:08.0 cmd <- 03
  346. PCI: 01:00.0 cmd <- 03
  347. done.
  348. Initializing devices...
  349. Root Device init
  350. APIC_CLUSTER: 0 init
  351. Initializing CPU #0
  352. CPU: vendor Intel device 683
  353. CPU: family 06, model 08, stepping 03
  354. Enabling cache
  355. microcode: sig=0x683 pf=0x10 revision=0x0
  356. Microcode has no valid size field!
  357. Microcode has no valid size field!
  358. Microcode has no valid size field!
  359. Microcode has no valid size field!
  360. Microcode has no valid size field!
  361. Microcode has no valid size field!
  362. Microcode has no valid size field!
  363. Microcode has no valid size field!
  364. microcode: updated to revision 0x14 date=2001-02-06
  365. CPU: .
  366.  
  367. Setting fixed MTRRs(0-88) Type: UC
  368. Setting fixed MTRRs(0-16) Type: WB
  369. Setting fixed MTRRs(24-88) Type: WB
  370. DONE fixed MTRRs
  371. call enable_fixed_mtrr()
  372. CPU physical address size: 36 bits
  373. Setting variable MTRR 0, base:    0MB, range:  256MB, type WB
  374. Setting variable MTRR 1, base:  256MB, range:  128MB, type WB
  375. Zero-sized MTRR range @0KB
  376. DONE variable MTRRs
  377. Clear out the extra MTRR's
  378. call enable_var_mtrr()
  379. Leave x86_setup_var_mtrrs
  380.  
  381. MTRR check
  382. Fixed MTRRs   : Enabled
  383. Variable MTRRs: Enabled
  384.  
  385. Disabling local apic...done.
  386. CPU #0 initialized
  387. PCI: 00:00.0 init
  388. Northbridge Init
  389. PCI: 00:07.0 init
  390. RTC Init
  391. PCI: 00:07.1 init
  392. IDE: Primary IDE interface: on
  393. IDE: Secondary IDE interface: on
  394. IDE: Access to legacy IDE ports: on
  395. IDE: Primary IDE interface, drive 0: UDMA/33: on
  396. IDE: Primary IDE interface, drive 1: UDMA/33: on
  397. IDE: Secondary IDE interface, drive 0: UDMA/33: on
  398. IDE: Secondary IDE interface, drive 1: UDMA/33: on
  399. PCI: 00:07.2 init
  400. PCI: 00:08.0 init
  401. CBFS: Looking for 'pci10ec,8139.rom'
  402. CBFS: Could not find file 'pci10ec,8139.rom'.
  403. PCI: 01:00.0 init
  404. CBFS: Looking for 'pci5333,8a13.rom'
  405. CBFS: Could not find file 'pci5333,8a13.rom'.
  406. Option ROM address for PCI: 01:00.0 = f4000000
  407. PCI expansion ROM, signature 0xaa55, INIT size 0x8000, data ptr 0x01bc
  408. PCI ROM image, vendor ID 5333, device ID 8a13,
  409. PCI ROM image, Class Code 030000, Code Type 00
  410. Copying VGA ROM Image from f4000000 to 0xc0000, 0x8000 bytes
  411. Real mode stub @00000600: 867 bytes
  412. Calling Option ROM...
  413. Unknown INT10 function 1201!
  414. int10 call returned error.
  415. 0xb102: return 0x100
  416. int1a call returned error.
  417. 0xb10b: BAD DEVICE bus 0 devfn 0x3
  418. int1a call returned error.
  419. 0xb10b: BAD DEVICE bus 0 devfn 0x3
  420. int1a call returned error.
  421. 0xb10b: BAD DEVICE bus 0 devfn 0x3
  422. int1a call returned error.
  423. int1a call returned error.
  424. 0xb10b: BAD DEVICE bus 0 devfn 0x3
  425. int1a call returned error.
  426. 0xb10b: BAD DEVICE bus 0 devfn 0x3
  427. int1a call returned error.
  428. 0xb10b: BAD DEVICE bus 0 devfn 0x3
  429. int1a call returned error.
  430. ... Option ROM returned.
  431. PNP: 03f0.0 init
  432. PNP: 03f0.1 init
  433. PNP: 03f0.2 init
  434. PNP: 03f0.3 init
  435. PNP: 03f0.5 init
  436. Keyboard init...
  437. PNP: 03f0.6 init
  438. PNP: 03f0.7 init
  439. PNP: 03f0.a init
  440. Devices initialized
  441. Show all devs...After init.
  442. Root Device: enabled 1
  443. APIC_CLUSTER: 0: enabled 1
  444. APIC: 00: enabled 1
  445. PCI_DOMAIN: 0000: enabled 1
  446. PCI: 00:00.0: enabled 1
  447. PCI: 00:01.0: enabled 1
  448. PCI: 00:07.0: enabled 1
  449. PNP: 03f0.0: enabled 1
  450. PNP: 03f0.1: enabled 1
  451. PNP: 03f0.2: enabled 1
  452. PNP: 03f0.3: enabled 1
  453. PNP: 03f0.5: enabled 1
  454. PNP: 03f0.6: enabled 1
  455. PNP: 03f0.7: enabled 1
  456. PNP: 03f0.8: enabled 1
  457. PNP: 03f0.a: enabled 1
  458. PCI: 00:07.1: enabled 1
  459. PCI: 00:07.2: enabled 1
  460. PCI: 00:07.3: enabled 1
  461. PCI: 00:13.0: enabled 0
  462. PCI: 00:08.0: enabled 1
  463. PCI: 01:00.0: enabled 1
  464. CPU: 00: enabled 1
  465. Re-Initializing CBMEM area to 0x17fe0000
  466. Initializing CBMEM area to 0x17fe0000 (131072 bytes)
  467. Adding CBMEM entry as no. 1
  468. Moving GDT to 17fe0200...ok
  469. High Tables Base is 17fe0000.
  470. Copying Interrupt Routing Table to 0x000f0000... done.
  471. Adding CBMEM entry as no. 2
  472. Copying Interrupt Routing Table to 0x17fe0400... done.
  473. PIRQ table: 176 bytes.
  474. Adding CBMEM entry as no. 3
  475. smbios_write_tables: 17fe1400
  476. Root Device (Abit BE6-II V2.0 Mainboard)
  477. APIC_CLUSTER: 0 (Intel 82443BX (440BX) Northbridge)
  478. APIC: 00 (Slot 1 CPU)
  479. PCI_DOMAIN: 0000 (Intel 82443BX (440BX) Northbridge)
  480. PCI: 00:00.0 (Intel 82443BX (440BX) Northbridge)
  481. PCI: 00:01.0 (Intel 82443BX (440BX) Northbridge)
  482. PCI: 00:07.0 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
  483. PNP: 03f0.0 (Winbond W83977TF Super I/O)
  484. PNP: 03f0.1 (Winbond W83977TF Super I/O)
  485. PNP: 03f0.2 (Winbond W83977TF Super I/O)
  486. PNP: 03f0.3 (Winbond W83977TF Super I/O)
  487. PNP: 03f0.5 (Winbond W83977TF Super I/O)
  488. PNP: 03f0.6 (Winbond W83977TF Super I/O)
  489. PNP: 03f0.7 (Winbond W83977TF Super I/O)
  490. PNP: 03f0.8 (Winbond W83977TF Super I/O)
  491. PNP: 03f0.a (Winbond W83977TF Super I/O)
  492. PCI: 00:07.1 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
  493. PCI: 00:07.2 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
  494. PCI: 00:07.3 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
  495. PCI: 00:13.0 (Intel 82371FB/SB/MX/AB/EB/MB Southbridge)
  496. PCI: 00:08.0 ()
  497. PCI: 01:00.0 ()
  498. CPU: 00 ()
  499. SMBIOS tables: 279 bytes.
  500. Adding CBMEM entry as no. 4
  501. Writing high table forward entry at 0x00000500
  502. Wrote coreboot table at: 00000500, 0x10 bytes, checksum cbe0
  503. New low_table_end: 0x00000528
  504. Now going to write high coreboot table at 0x17fe1c00
  505. rom_table_end = 0x17fe1c00
  506. Adjust low_table_end from 0x00000528 to 0x00001000
  507. Adjust rom_table_end from 0x17fe1c00 to 0x17ff0000
  508. Adding high table area
  509. coreboot memory table:
  510.  0. 0000000000000000-0000000000000fff: CONFIGURATION TABLES
  511.  1. 0000000000001000-000000000009ffff: RAM
  512.  2. 00000000000c0000-0000000017fdffff: RAM
  513.  3. 0000000017fe0000-0000000017ffffff: CONFIGURATION TABLES
  514.  4. 00000000ff800000-00000000ffffffff: RESERVED
  515. Wrote coreboot table at: 17fe1c00, 0x1c8 bytes, checksum 1eda
  516. coreboot table: 480 bytes.
  517. Multiboot Information structure has been written.
  518.  0. FREE SPACE 17fe9c00 00016400
  519.  1. GDT        17fe0200 00000200
  520.  2. IRQ TABLE  17fe0400 00001000
  521.  3. SMBIOS     17fe1400 00000800
  522.  4. COREBOOT   17fe1c00 00008000
  523. CBFS: Looking for 'fallback/payload'
  524. CBFS: found.
  525. Got a payload
  526. CPU0: stack from 00138000 to 00140000:Lowest stack address 0013fab8
  527. Loading segment from rom address 0xfffdd9f8
  528.   parameter section (skipped)
  529. Loading segment from rom address 0xfffdda14
  530.   data (compression=0)
  531.   New segment dstaddr 0x0 memsize 0x24 srcaddr 0xfffddabe filesize 0x24
  532.   (cleaned up) New segment addr 0x0 size 0x24 offset 0xfffddabe filesize 0x24
  533. Loading segment from rom address 0xfffdda30
  534.   code (compression=1)
  535.   New segment dstaddr 0x100000 memsize 0x394d0 srcaddr 0xfffddae2 filesize 0x4a1f
  536.   (cleaned up) New segment addr 0x100000 size 0x394d0 offset 0xfffddae2 filesize 0x4a1f
  537. Loading segment from rom address 0xfffdda4c
  538.   Entry Point 0x00000000
  539. Payload is overwriting coreboot tables.
  540. Loading Segment: addr: 0x0000000000000000 memsz: 0x0000000000000024 filesz: 0x0000000000000024
  541. lb: [0x0000000000100000, 0x0000000000144000)
  542. Post relocation: addr: 0x0000000000000000 memsz: 0x0000000000000024 filesz: 0x0000000000000024
  543. it's not compressed!
  544. [ 0x00000000, 00000024, 0x00000024) <- fffddabe
  545. dest 00000000, end 00000024, bouncebuffer 17f58000
  546. Loading Segment: addr: 0x0000000000100000 memsz: 0x00000000000394d0 filesz: 0x0000000000004a1f
  547. lb: [0x0000000000100000, 0x0000000000144000)
  548. segment: [0x0000000000100000, 0x0000000000104a1f, 0x00000000001394d0)
  549.  bounce: [0x0000000017f58000, 0x0000000017f5ca1f, 0x0000000017f914d0)
  550. Post relocation: addr: 0x0000000017f58000 memsz: 0x00000000000394d0 filesz: 0x0000000000004a1f
  551. using LZMA
  552. [ 0x17f58000, 17f64900, 0x17f914d0) <- fffddae2
  553. Clearing Segment: addr: 0x0000000017f64900 memsz: 0x000000000002cbd0
  554. dest 17f58000, end 17f914d0, bouncebuffer 17f58000
  555. Loaded segments
  556. Jumping to boot code at 100000
  557. entry    = 0x00100000
  558. lb_start = 0x00100000
  559. lb_size  = 0x00044000
  560. adjust   = 0x17e9c000
  561. buffer   = 0x17f58000
  562.      elf_boot_notes = 0x00132bf8
  563. adjusted_boot_notes = 0x17fcebf8