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simulated pif boot on neomyth

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May 5th, 2011
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  1. // Simulated PIF ROM bootcode adapted from DaedalusX64 emulator
  2. void simulate_pif_boot(u32 cic_chip)
  3. {
  4. u32 ix;
  5. vu32 *src, *dst;
  6. u32 country = ((*(vu32 *)0xB000003C) >> 8) & 0xFF;
  7. vu64 *gGPR = (vu64 *)0xA0300000;
  8.  
  9. /* Clear XBUS/Flush/Freeze */
  10. ((vu32 *)0xA4100000)[3] = 0x15;
  11.  
  12. // clear some OS globals for cleaner boot
  13. *(vu32*)0xA000030C = 0; // cold boot
  14. memset((void*)0xA000031C, 0, 64); // clear app nmi buffer
  15.  
  16. // copy the memsize for different boot loaders
  17. if ((cic_chip == CIC_6105) && (gBootCic != CIC_6105))
  18. *(vu32 *)0xA00003F0 = *(vu32 *)0xA0000318;
  19. else if ((cic_chip != CIC_6105) && (gBootCic == CIC_6105))
  20. *(vu32 *)0xA0000318 = *(vu32 *)0xA00003F0;
  21.  
  22. // Copy low 0x1000 bytes to DMEM
  23. src = (vu32 *)0xB0000000;
  24. dst = (vu32 *)0xA4000000;
  25. for (ix=0; ix<(0x1000>>2); ix++)
  26. dst[ix] = src[ix];
  27.  
  28. // Need to copy crap to IMEM for CIC-6105 boot.
  29. dst = (vu32 *)0xA4001000;
  30.  
  31. // register values due to pif boot for CiC chip and country code, and IMEM crap
  32.  
  33. gGPR[0]=0x0000000000000000LL;
  34. gGPR[6]=0xFFFFFFFFA4001F0CLL;
  35. gGPR[7]=0xFFFFFFFFA4001F08LL;
  36. gGPR[8]=0x00000000000000C0LL;
  37. gGPR[9]=0x0000000000000000LL;
  38. gGPR[10]=0x0000000000000040LL;
  39. gGPR[11]=0xFFFFFFFFA4000040LL;
  40. gGPR[16]=0x0000000000000000LL;
  41. gGPR[17]=0x0000000000000000LL;
  42. gGPR[18]=0x0000000000000000LL;
  43. gGPR[19]=0x0000000000000000LL;
  44. gGPR[21]=0x0000000000000000LL;
  45. gGPR[26]=0x0000000000000000LL;
  46. gGPR[27]=0x0000000000000000LL;
  47. gGPR[28]=0x0000000000000000LL;
  48. gGPR[29]=0xFFFFFFFFA4001FF0LL;
  49. gGPR[30]=0x0000000000000000LL;
  50.  
  51. switch (country) {
  52. case 0x44: //Germany
  53. case 0x46: //french
  54. case 0x49: //Italian
  55. case 0x50: //Europe
  56. case 0x53: //Spanish
  57. case 0x55: //Australia
  58. case 0x58: // ????
  59. case 0x59: // X (PAL)
  60. switch (cic_chip) {
  61. case CIC_6102:
  62. gGPR[5]=0xFFFFFFFFC0F1D859LL;
  63. gGPR[14]=0x000000002DE108EALL;
  64. gGPR[24]=0x0000000000000000LL;
  65. break;
  66. case CIC_6103:
  67. gGPR[5]=0xFFFFFFFFD4646273LL;
  68. gGPR[14]=0x000000001AF99984LL;
  69. gGPR[24]=0x0000000000000000LL;
  70. break;
  71. case CIC_6105:
  72. dst[0x04>>2] = 0xBDA807FC;
  73. gGPR[5]=0xFFFFFFFFDECAAAD1LL;
  74. gGPR[14]=0x000000000CF85C13LL;
  75. gGPR[24]=0x0000000000000002LL;
  76. break;
  77. case CIC_6106:
  78. gGPR[5]=0xFFFFFFFFB04DC903LL;
  79. gGPR[14]=0x000000001AF99984LL;
  80. gGPR[24]=0x0000000000000002LL;
  81. break;
  82. }
  83.  
  84. gGPR[20]=0x0000000000000000LL;
  85. gGPR[23]=0x0000000000000006LL;
  86. gGPR[31]=0xFFFFFFFFA4001554LL;
  87. break;
  88. case 0x37: // 7 (Beta)
  89. case 0x41: // ????
  90. case 0x45: //USA
  91. case 0x4A: //Japan
  92. default:
  93. switch (cic_chip) {
  94. case CIC_6102:
  95. gGPR[5]=0xFFFFFFFFC95973D5LL;
  96. gGPR[14]=0x000000002449A366LL;
  97. break;
  98. case CIC_6103:
  99. gGPR[5]=0xFFFFFFFF95315A28LL;
  100. gGPR[14]=0x000000005BACA1DFLL;
  101. break;
  102. case CIC_6105:
  103. dst[0x04>>2] = 0x8DA807FC;
  104. gGPR[5]=0x000000005493FB9ALL;
  105. gGPR[14]=0xFFFFFFFFC2C20384LL;
  106. break;
  107. case CIC_6106:
  108. gGPR[5]=0xFFFFFFFFE067221FLL;
  109. gGPR[14]=0x000000005CD2B70FLL;
  110. break;
  111. }
  112. gGPR[20]=0x0000000000000001LL;
  113. gGPR[23]=0x0000000000000000LL;
  114. gGPR[24]=0x0000000000000003LL;
  115. gGPR[31]=0xFFFFFFFFA4001550LL;
  116. }
  117.  
  118. switch (cic_chip) {
  119. case CIC_6101:
  120. gGPR[22]=0x000000000000003FLL;
  121. break;
  122. case CIC_6102:
  123. gGPR[1]=0x0000000000000001LL;
  124. gGPR[2]=0x000000000EBDA536LL;
  125. gGPR[3]=0x000000000EBDA536LL;
  126. gGPR[4]=0x000000000000A536LL;
  127. gGPR[12]=0xFFFFFFFFED10D0B3LL;
  128. gGPR[13]=0x000000001402A4CCLL;
  129. gGPR[15]=0x000000003103E121LL;
  130. gGPR[22]=0x000000000000003FLL;
  131. gGPR[25]=0xFFFFFFFF9DEBB54FLL;
  132. break;
  133. case CIC_6103:
  134. gGPR[1]=0x0000000000000001LL;
  135. gGPR[2]=0x0000000049A5EE96LL;
  136. gGPR[3]=0x0000000049A5EE96LL;
  137. gGPR[4]=0x000000000000EE96LL;
  138. gGPR[12]=0xFFFFFFFFCE9DFBF7LL;
  139. gGPR[13]=0xFFFFFFFFCE9DFBF7LL;
  140. gGPR[15]=0x0000000018B63D28LL;
  141. gGPR[22]=0x0000000000000078LL;
  142. gGPR[25]=0xFFFFFFFF825B21C9LL;
  143. break;
  144. case CIC_6105:
  145. dst[0x00>>2] = 0x3C0DBFC0;
  146. dst[0x08>>2] = 0x25AD07C0;
  147. dst[0x0C>>2] = 0x31080080;
  148. dst[0x10>>2] = 0x5500FFFC;
  149. dst[0x14>>2] = 0x3C0DBFC0;
  150. dst[0x18>>2] = 0x8DA80024;
  151. dst[0x1C>>2] = 0x3C0BB000;
  152. gGPR[1]=0x0000000000000000LL;
  153. gGPR[2]=0xFFFFFFFFF58B0FBFLL;
  154. gGPR[3]=0xFFFFFFFFF58B0FBFLL;
  155. gGPR[4]=0x0000000000000FBFLL;
  156. gGPR[12]=0xFFFFFFFF9651F81ELL;
  157. gGPR[13]=0x000000002D42AAC5LL;
  158. gGPR[15]=0x0000000056584D60LL;
  159. gGPR[22]=0x0000000000000091LL;
  160. gGPR[25]=0xFFFFFFFFCDCE565FLL;
  161. break;
  162. case CIC_6106:
  163. gGPR[1]=0x0000000000000000LL;
  164. gGPR[2]=0xFFFFFFFFA95930A4LL;
  165. gGPR[3]=0xFFFFFFFFA95930A4LL;
  166. gGPR[4]=0x00000000000030A4LL;
  167. gGPR[12]=0xFFFFFFFFBCB59510LL;
  168. gGPR[13]=0xFFFFFFFFBCB59510LL;
  169. gGPR[15]=0x000000007A3C07F4LL;
  170. gGPR[22]=0x0000000000000085LL;
  171. gGPR[25]=0x00000000465E3F72LL;
  172. break;
  173. }
  174.  
  175.  
  176. // set HW registers - PI_BSD_DOM1 regs, etc
  177.  
  178.  
  179. // now set MIPS registers - set CP0, and then GPRs, then jump thru gpr11 (which is 0xA400040)
  180. asm(".set noat\n\t"
  181. ".set noreorder\n\t"
  182. "li $8,0x34000000\n\t"
  183. "mtc0 $8,$12\n\t"
  184. "nop\n\t"
  185. "li $9,0x0006E463\n\t"
  186. "mtc0 $9,$16\n\t"
  187. "nop\n\t"
  188. "li $8,0x00005000\n\t"
  189. "mtc0 $8,$9\n\t"
  190. "nop\n\t"
  191. "li $9,0x0000005C\n\t"
  192. "mtc0 $9,$13\n\t"
  193. "nop\n\t"
  194. "li $8,0x007FFFF0\n\t"
  195. "mtc0 $8,$4\n\t"
  196. "nop\n\t"
  197. "li $9,0xFFFFFFFF\n\t"
  198. "mtc0 $9,$14\n\t"
  199. "nop\n\t"
  200. "mtc0 $9,$8\n\t"
  201. "nop\n\t"
  202. "mtc0 $9,$30\n\t"
  203. "nop\n\t"
  204. "lui $31,0xA030\n\t"
  205. "ld $1,0x08($31)\n\t"
  206. "ld $2,0x10($31)\n\t"
  207. "ld $3,0x18($31)\n\t"
  208. "ld $4,0x20($31)\n\t"
  209. "ld $5,0x28($31)\n\t"
  210. "ld $6,0x30($31)\n\t"
  211. "ld $7,0x38($31)\n\t"
  212. "ld $8,0x40($31)\n\t"
  213. "ld $9,0x48($31)\n\t"
  214. "ld $10,0x50($31)\n\t"
  215. "ld $11,0x58($31)\n\t"
  216. "ld $12,0x60($31)\n\t"
  217. "ld $13,0x68($31)\n\t"
  218. "ld $14,0x70($31)\n\t"
  219. "ld $15,0x78($31)\n\t"
  220. "ld $16,0x80($31)\n\t"
  221. "ld $17,0x88($31)\n\t"
  222. "ld $18,0x90($31)\n\t"
  223. "ld $19,0x98($31)\n\t"
  224. "ld $20,0xA0($31)\n\t"
  225. "ld $21,0xA8($31)\n\t"
  226. "ld $22,0xB0($31)\n\t"
  227. "ld $23,0xB8($31)\n\t"
  228. "ld $24,0xC0($31)\n\t"
  229. "ld $25,0xC8($31)\n\t"
  230. "ld $26,0xD0($31)\n\t"
  231. "ld $27,0xD8($31)\n\t"
  232. "ld $28,0xE0($31)\n\t"
  233. "ld $29,0xE8($31)\n\t"
  234. "ld $30,0xF0($31)\n\t"
  235. "ld $31,0xF8($31)\n\t"
  236. "jr $11\n\t"
  237. "nop"
  238. ::: "$8" );
  239. }
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