asd

LW:
            begin
                ESTADO = LW2;
                ALUsrcA = 2'b10;
                ALUsrcB = 3'b100;
                ALUOp = 3'b001;
                RegB = 1'b0;
                RegA = 1'b0;
                RegALUout = 1'b1;
            end

LW2:
        begin
            ESTADO = LW3;
            IorD = 3'b101;
            RegMem = 1'b1;
        end
LW3:
        begin
            ESTADO = LW4;
            RegMem = 1'b0;
        end
LW4:
        begin
            ESTADO = START;
            MemtoReg = 4'b0010;
            RegDst = 3'b000;
            RegWrite = 1'b1;
        end