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LAIR82

7i80.txt

Sep 3rd, 2015
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  1. Configuration Name: HOSTMOT2
  2.  
  3. General configuration information:
  4.  
  5. BoardName : MESA7I80
  6. FPGA Size: 16 KGates
  7. FPGA Pins: 256
  8. Number of IO Ports: 3
  9. Width of one I/O port: 24
  10. Clock Low frequency: 100.0000 MHz
  11. Clock High frequency: 200.0000 MHz
  12. IDROM Type: 3
  13. Instance Stride 0: 4
  14. Instance Stride 1: 64
  15. Register Stride 0: 256
  16. Register Stride 1: 256
  17.  
  18. Modules in configuration:
  19.  
  20. Module: WatchDog
  21. There are 1 of WatchDog in configuration
  22. Version: 0
  23. Registers: 3
  24. BaseAddress: 0C00
  25. ClockFrequency: 100.000 MHz
  26. Register Stride: 256 bytes
  27. Instance Stride: 4 bytes
  28.  
  29. Module: IOPort
  30. There are 3 of IOPort in configuration
  31. Version: 0
  32. Registers: 5
  33. BaseAddress: 1000
  34. ClockFrequency: 100.000 MHz
  35. Register Stride: 256 bytes
  36. Instance Stride: 4 bytes
  37.  
  38. Module: ResolverMod
  39. There are 1 of ResolverMod in configuration
  40. Version: 0
  41. Registers: 5
  42. BaseAddress: 3A00
  43. ClockFrequency: 100.000 MHz
  44. Register Stride: 256 bytes
  45. Instance Stride: 4 bytes
  46.  
  47. Module: MuxedQCount
  48. There are 6 of MuxedQCount in configuration
  49. Version: 3
  50. Registers: 5
  51. BaseAddress: 3500
  52. ClockFrequency: 100.000 MHz
  53. Register Stride: 256 bytes
  54. Instance Stride: 4 bytes
  55.  
  56. Module: MuxedQCountSel
  57. There are 1 of MuxedQCountSel in configuration
  58. Version: 0
  59. Registers: 0
  60. BaseAddress: 0000
  61. ClockFrequency: 100.000 MHz
  62. Register Stride: 256 bytes
  63. Instance Stride: 4 bytes
  64.  
  65. Module: SSerial
  66. There are 1 of SSerial in configuration
  67. Version: 0
  68. Registers: 6
  69. BaseAddress: 5A00
  70. ClockFrequency: 100.000 MHz
  71. Register Stride: 256 bytes
  72. Instance Stride: 64 bytes
  73.  
  74. Module: LED
  75. There are 1 of LED in configuration
  76. Version: 0
  77. Registers: 1
  78. BaseAddress: 0200
  79. ClockFrequency: 100.000 MHz
  80. Register Stride: 256 bytes
  81. Instance Stride: 4 bytes
  82.  
  83. Configuration pin-out:
  84.  
  85. IO Connections for P1
  86. Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
  87.  
  88. 1 0 IOPort PWM 0 /Enable (Out)
  89. 3 1 IOPort ResolverMod 0 PwrEn (Out)
  90. 5 2 IOPort ResolverMod 0 SPIDI0 (In)
  91. 7 3 IOPort ResolverMod 0 SPIDI1 (In)
  92. 9 4 IOPort ResolverMod 0 ADChan2 (Out)
  93. 11 5 IOPort ResolverMod 0 ADChan1 (Out)
  94. 13 6 IOPort ResolverMod 0 ADChan0 (Out)
  95. 15 7 IOPort ResolverMod 0 SPIClk (Out)
  96. 17 8 IOPort ResolverMod 0 SPICS (Out)
  97. 19 9 IOPort ResolverMod 0 PDMM (Out)
  98. 21 10 IOPort ResolverMod 0 PDMP (Out)
  99. 23 11 IOPort PWM 0 PWM (Out)
  100. 25 12 IOPort PWM 0 Dir (Out)
  101. 27 13 IOPort PWM 1 PWM (Out)
  102. 29 14 IOPort PWM 1 Dir (Out)
  103. 31 15 IOPort PWM 2 PWM (Out)
  104. 33 16 IOPort PWM 2 Dir (Out)
  105. 35 17 IOPort PWM 3 PWM (Out)
  106. 37 18 IOPort PWM 3 Dir (Out)
  107. 39 19 IOPort PWM 4 PWM (Out)
  108. 41 20 IOPort PWM 4 Dir (Out)
  109. 43 21 IOPort PWM 5 PWM (Out)
  110. 45 22 IOPort PWM 5 Dir (Out)
  111. 47 23 IOPort PWM 0 /Enable (Out)
  112.  
  113. IO Connections for P2
  114. Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
  115.  
  116. 1 24 IOPort None
  117. 3 25 IOPort None
  118. 5 26 IOPort None
  119. 7 27 IOPort None
  120. 9 28 IOPort None
  121. 11 29 IOPort None
  122. 13 30 IOPort None
  123. 15 31 IOPort None
  124. 17 32 IOPort None
  125. 19 33 IOPort None
  126. 21 34 IOPort None
  127. 23 35 IOPort None
  128. 25 36 IOPort None
  129. 27 37 IOPort None
  130. 29 38 IOPort None
  131. 31 39 IOPort None
  132. 33 40 IOPort None
  133. 35 41 IOPort None
  134. 37 42 IOPort None
  135. 39 43 IOPort None
  136. 41 44 IOPort None
  137. 43 45 IOPort None
  138. 45 46 IOPort None
  139. 47 47 IOPort None
  140.  
  141. IO Connections for P3
  142. Pin# I/O Pri. func Sec. func Chan Pin func Pin Dir
  143.  
  144. 1 48 IOPort SSerial 0 TXEn4 (Out)
  145. 3 49 IOPort MuxedQCount 0 MuxQ-A (In)
  146. 5 50 IOPort MuxedQCount 0 MuxQ-B (In)
  147. 7 51 IOPort MuxedQCount 0 MuxQ-IDX (In)
  148. 9 52 IOPort MuxedQCount 1 MuxQ-A (In)
  149. 11 53 IOPort MuxedQCount 1 MuxQ-B (In)
  150. 13 54 IOPort MuxedQCount 1 MuxQ-IDX (In)
  151. 15 55 IOPort MuxedQCount 2 MuxQ-A (In)
  152. 17 56 IOPort MuxedQCount 2 MuxQ-B (In)
  153. 19 57 IOPort MuxedQCount 2 MuxQ-IDX (In)
  154. 21 58 IOPort MuxedQCountSel 0 MuxSel0 (Out)
  155. 23 59 IOPort SSerial 0 TXData6 (Out)
  156. 25 60 IOPort SSerial 0 RXData6 (In)
  157. 27 61 IOPort SSerial 0 TXData5 (Out)
  158. 29 62 IOPort SSerial 0 RXData5 (In)
  159. 31 63 IOPort SSerial 0 TXData4 (Out)
  160. 33 64 IOPort SSerial 0 RXData4 (In)
  161. 35 65 IOPort SSerial 0 TXData3 (Out)
  162. 37 66 IOPort SSerial 0 RXData3 (In)
  163. 39 67 IOPort SSerial 0 TXData2 (Out)
  164. 41 68 IOPort SSerial 0 RXData2 (In)
  165. 43 69 IOPort SSerial 0 TXData1 (Out)
  166. 45 70 IOPort SSerial 0 RXData1 (In)
  167. 47 71 IOPort SSerial 0 TXEn1 (Out)
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