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openOCD verbose output with vanilla configs

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  1. Open On-Chip Debugger 0.10.0-dev-00273-g394abef (2016-11-24-15:12)
  2. Licensed under GNU GPL v2
  3. For bug reports, read
  4. http://openocd.org/doc/doxygen/bugs.html
  5. User : 13 1 command.c:546 command_print(): debug_level: 3
  6. Debug: 14 1 options.c:98 add_default_dirs(): bindir=/src/staging/linux64/bin
  7. Debug: 15 1 options.c:99 add_default_dirs(): pkgdatadir=/src/staging/linux64/share/openocd
  8. Debug: 16 1 options.c:100 add_default_dirs(): run_prefix=
  9. Debug: 17 1 configuration.c:44 add_script_search_dir(): adding /src/staging/linux64/share/openocd/site
  10. Debug: 18 1 configuration.c:44 add_script_search_dir(): adding /src/staging/linux64/share/openocd/scripts
  11. Debug: 19 1 configuration.c:84 find_file(): found stm32f0_blinky.cfg
  12. Debug: 20 1 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/interface/stlink-v2.cfg
  13. Debug: 21 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface hla
  14. Debug: 22 1 command.c:145 script_debug(): command - interface ocd_interface hla
  15. Debug: 24 1 command.c:366 register_command_handler(): registering 'ocd_hla_device_desc'...
  16. Debug: 25 1 command.c:366 register_command_handler(): registering 'ocd_hla_serial'...
  17. Debug: 26 1 command.c:366 register_command_handler(): registering 'ocd_hla_layout'...
  18. Debug: 27 1 command.c:366 register_command_handler(): registering 'ocd_hla_vid_pid'...
  19. Debug: 28 1 command.c:366 register_command_handler(): registering 'ocd_hla_command'...
  20. Debug: 29 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink
  21. Debug: 30 1 command.c:145 script_debug(): command - hla_layout ocd_hla_layout stlink
  22. Debug: 32 1 hla_interface.c:241 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
  23. Debug: 33 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc ST-LINK/V2
  24. Debug: 34 1 command.c:145 script_debug(): command - hla_device_desc ocd_hla_device_desc ST-LINK/V2
  25. Debug: 36 1 hla_interface.c:215 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
  26. Debug: 37 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_vid_pid 0x0483 0x3748
  27. Debug: 38 1 command.c:145 script_debug(): command - hla_vid_pid ocd_hla_vid_pid 0x0483 0x3748
  28. Debug: 40 1 hla_interface.c:269 hl_interface_handle_vid_pid_command(): hl_interface_handle_vid_pid_command
  29. Debug: 41 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select hla_swd
  30. Debug: 42 1 command.c:145 script_debug(): command - ocd_transport ocd_transport select hla_swd
  31. Debug: 43 1 hla_transport.c:193 hl_transport_select(): hl_transport_select
  32. Debug: 44 1 command.c:366 register_command_handler(): registering 'ocd_hla'...
  33. Debug: 45 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  34. Debug: 46 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  35. Debug: 47 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  36. Debug: 48 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  37. Debug: 49 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  38. Debug: 50 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  39. Debug: 51 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  40. Debug: 52 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  41. Debug: 53 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  42. Debug: 54 2 command.c:366 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
  43. Debug: 55 2 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/target/stm32f0x_stlink.cfg
  44. Debug: 56 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_echo WARNING: target/stm32f0x_stlink.cfg is deprecated, please switch to target/stm32f0x.cfg
  45. Debug: 57 2 command.c:145 script_debug(): command - echo ocd_echo WARNING: target/stm32f0x_stlink.cfg is deprecated, please switch to target/stm32f0x.cfg
  46. User : 59 2 command.c:764 jim_echo(): WARNING: target/stm32f0x_stlink.cfg is deprecated, please switch to target/stm32f0x.cfg
  47. Debug: 60 2 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/target/stm32f0x.cfg
  48. Debug: 61 2 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/target/swj-dp.tcl
  49. Debug: 62 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  50. Debug: 63 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  51. Debug: 64 2 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/mem_helper.tcl
  52. Debug: 65 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mrw address
  53. Debug: 66 2 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mrw address
  54. Debug: 68 2 command.c:1100 help_add_command(): added 'mrw' help text
  55. Debug: 69 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mrw Returns value of word in memory.
  56. Debug: 70 2 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mrw Returns value of word in memory.
  57. Debug: 72 2 command.c:1113 help_add_command(): added 'mrw' help text
  58. Debug: 73 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mmw address setbits clearbits
  59. Debug: 74 2 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mmw address setbits clearbits
  60. Debug: 76 2 command.c:1100 help_add_command(): added 'mmw' help text
  61. Debug: 77 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
  62. Debug: 78 2 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
  63. Debug: 80 2 command.c:1113 help_add_command(): added 'mmw' help text
  64. Debug: 81 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  65. Debug: 82 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  66. Debug: 83 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  67. Debug: 84 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  68. Debug: 85 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  69. Debug: 86 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  70. Debug: 87 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla newtap stm32f0x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x0bb11477
  71. Debug: 88 2 command.c:145 script_debug(): command - ocd_hla ocd_hla newtap stm32f0x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x0bb11477
  72. Debug: 89 2 hla_tcl.c:118 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm32f0x, Tap: cpu, Dotted: stm32f0x.cpu, 8 params
  73. Debug: 90 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irlen
  74. Debug: 91 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -ircapture
  75. Debug: 92 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irmask
  76. Debug: 93 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -expected-id
  77. Debug: 94 2 core.c:1306 jtag_tap_init(): Created Tap: stm32f0x.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
  78. Debug: 95 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create stm32f0x.cpu cortex_m -endian little -chain-position stm32f0x.cpu
  79. Debug: 96 2 command.c:145 script_debug(): command - ocd_target ocd_target create stm32f0x.cpu cortex_m -endian little -chain-position stm32f0x.cpu
  80. Info : 97 2 target.c:5223 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
  81. Debug: 98 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  82. Debug: 99 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  83. Debug: 100 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  84. Debug: 101 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  85. Debug: 102 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  86. Debug: 103 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  87. Debug: 104 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  88. Debug: 105 2 command.c:366 register_command_handler(): registering 'ocd_tpiu'...
  89. Debug: 106 2 command.c:366 register_command_handler(): registering 'ocd_itm'...
  90. Debug: 107 2 command.c:366 register_command_handler(): registering 'ocd_itm'...
  91. Debug: 108 2 hla_target.c:353 adapter_target_create(): adapter_target_create
  92. Debug: 109 2 hla_target.c:324 adapter_init_arch_info(): adapter_init_arch_info
  93. Debug: 110 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  94. Debug: 111 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  95. Debug: 112 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  96. Debug: 113 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  97. Debug: 114 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  98. Debug: 115 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  99. Debug: 116 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  100. Debug: 117 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  101. Debug: 118 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  102. Debug: 119 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  103. Debug: 120 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  104. Debug: 121 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  105. Debug: 122 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  106. Debug: 123 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  107. Debug: 124 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  108. Debug: 125 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  109. Debug: 126 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  110. Debug: 127 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  111. Debug: 128 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  112. Debug: 129 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  113. Debug: 130 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  114. Debug: 131 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  115. Debug: 132 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  116. Debug: 133 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  117. Debug: 134 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  118. Debug: 135 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  119. Debug: 136 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  120. Debug: 137 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  121. Debug: 138 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  122. Debug: 139 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  123. Debug: 140 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  124. Debug: 141 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
  125. Debug: 142 2 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
  126. Debug: 143 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  127. Debug: 144 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  128. Debug: 145 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  129. Debug: 146 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash bank stm32f0x.flash stm32f1x 0x08000000 0 0 0 stm32f0x.cpu
  130. Debug: 147 2 command.c:145 script_debug(): command - ocd_flash ocd_flash bank stm32f0x.flash stm32f1x 0x08000000 0 0 0 stm32f0x.cpu
  131. Debug: 149 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  132. Debug: 150 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  133. Debug: 151 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  134. Debug: 152 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  135. Debug: 153 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  136. Debug: 154 2 tcl.c:1031 handle_flash_bank_command(): 'stm32f1x' driver usage field missing
  137. Debug: 155 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
  138. Debug: 156 2 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1000
  139. Debug: 158 2 core.c:1633 jtag_config_khz(): handle jtag khz
  140. Debug: 159 2 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  141. Debug: 160 2 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  142. User : 161 2 command.c:546 command_print(): adapter speed: 1000 kHz
  143. Debug: 162 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_delay 100
  144. Debug: 163 2 command.c:145 script_debug(): command - adapter_nsrst_delay ocd_adapter_nsrst_delay 100
  145. User : 165 2 command.c:546 command_print(): adapter_nsrst_delay: 100
  146. Debug: 166 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_nogate
  147. Debug: 167 2 command.c:145 script_debug(): command - reset_config ocd_reset_config srst_nogate
  148. User : 169 2 command.c:546 command_print(): none separate
  149. Debug: 170 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  150. Debug: 171 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  151. Debug: 172 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event examine-end stm32f0x_default_examine_end
  152. Debug: 173 2 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event examine-end stm32f0x_default_examine_end
  153. Debug: 174 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event reset-start stm32f0x_default_reset_start
  154. Debug: 175 2 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event reset-start stm32f0x_default_reset_start
  155. Debug: 176 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event reset-init stm32f0x_default_reset_init
  156. Debug: 177 2 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event reset-init stm32f0x_default_reset_init
  157. Debug: 178 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only srst_nogate
  158. Debug: 179 2 command.c:145 script_debug(): command - reset_config ocd_reset_config srst_only srst_nogate
  159. User : 181 2 command.c:546 command_print(): srst_only separate srst_nogate srst_open_drain connect_deassert_srst
  160. Debug: 182 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_gdb_port 3333
  161. Debug: 183 3 command.c:145 script_debug(): command - gdb_port ocd_gdb_port 3333
  162. Debug: 185 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
  163. Debug: 186 3 command.c:145 script_debug(): command - init ocd_init
  164. Debug: 188 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
  165. Debug: 189 3 command.c:145 script_debug(): command - ocd_target ocd_target init
  166. Debug: 191 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
  167. Debug: 192 3 command.c:145 script_debug(): command - ocd_target ocd_target names
  168. Debug: 193 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu cget -event gdb-flash-erase-start
  169. Debug: 194 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu cget -event gdb-flash-erase-start
  170. Debug: 195 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event gdb-flash-erase-start reset init
  171. Debug: 196 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event gdb-flash-erase-start reset init
  172. Debug: 197 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu cget -event gdb-flash-write-end
  173. Debug: 198 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu cget -event gdb-flash-write-end
  174. Debug: 199 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event gdb-flash-write-end reset halt
  175. Debug: 200 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event gdb-flash-write-end reset halt
  176. Debug: 201 3 target.c:1308 handle_target_init_command(): Initializing targets...
  177. Debug: 202 3 hla_target.c:343 adapter_init_target(): adapter_init_target
  178. Debug: 203 3 command.c:366 register_command_handler(): registering 'ocd_target_request'...
  179. Debug: 204 3 command.c:366 register_command_handler(): registering 'ocd_trace'...
  180. Debug: 205 3 command.c:366 register_command_handler(): registering 'ocd_trace'...
  181. Debug: 206 3 command.c:366 register_command_handler(): registering 'ocd_fast_load_image'...
  182. Debug: 207 3 command.c:366 register_command_handler(): registering 'ocd_fast_load'...
  183. Debug: 208 3 command.c:366 register_command_handler(): registering 'ocd_profile'...
  184. Debug: 209 3 command.c:366 register_command_handler(): registering 'ocd_virt2phys'...
  185. Debug: 210 3 command.c:366 register_command_handler(): registering 'ocd_reg'...
  186. Debug: 211 3 command.c:366 register_command_handler(): registering 'ocd_poll'...
  187. Debug: 212 3 command.c:366 register_command_handler(): registering 'ocd_wait_halt'...
  188. Debug: 213 3 command.c:366 register_command_handler(): registering 'ocd_halt'...
  189. Debug: 214 3 command.c:366 register_command_handler(): registering 'ocd_resume'...
  190. Debug: 215 3 command.c:366 register_command_handler(): registering 'ocd_reset'...
  191. Debug: 216 3 command.c:366 register_command_handler(): registering 'ocd_soft_reset_halt'...
  192. Debug: 217 3 command.c:366 register_command_handler(): registering 'ocd_step'...
  193. Debug: 218 3 command.c:366 register_command_handler(): registering 'ocd_mdw'...
  194. Debug: 219 3 command.c:366 register_command_handler(): registering 'ocd_mdh'...
  195. Debug: 220 3 command.c:366 register_command_handler(): registering 'ocd_mdb'...
  196. Debug: 221 3 command.c:366 register_command_handler(): registering 'ocd_mww'...
  197. Debug: 222 3 command.c:366 register_command_handler(): registering 'ocd_mwh'...
  198. Debug: 223 3 command.c:366 register_command_handler(): registering 'ocd_mwb'...
  199. Debug: 224 3 command.c:366 register_command_handler(): registering 'ocd_bp'...
  200. Debug: 225 3 command.c:366 register_command_handler(): registering 'ocd_rbp'...
  201. Debug: 226 3 command.c:366 register_command_handler(): registering 'ocd_wp'...
  202. Debug: 227 3 command.c:366 register_command_handler(): registering 'ocd_rwp'...
  203. Debug: 228 3 command.c:366 register_command_handler(): registering 'ocd_load_image'...
  204. Debug: 229 3 command.c:366 register_command_handler(): registering 'ocd_dump_image'...
  205. Debug: 230 3 command.c:366 register_command_handler(): registering 'ocd_verify_image'...
  206. Debug: 231 3 command.c:366 register_command_handler(): registering 'ocd_test_image'...
  207. Debug: 232 3 command.c:366 register_command_handler(): registering 'ocd_reset_nag'...
  208. Debug: 233 3 command.c:366 register_command_handler(): registering 'ocd_ps'...
  209. Debug: 234 3 command.c:366 register_command_handler(): registering 'ocd_test_mem_access'...
  210. Debug: 235 3 hla_interface.c:111 hl_interface_init(): hl_interface_init
  211. Debug: 236 3 hla_layout.c:85 hl_layout_init(): hl_layout_init
  212. Debug: 237 3 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  213. Debug: 238 3 core.c:1603 adapter_khz_to_speed(): have interface set up
  214. Info : 239 3 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  215. Debug: 240 3 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  216. Debug: 241 3 core.c:1603 adapter_khz_to_speed(): have interface set up
  217. Info : 242 3 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  218. Info : 243 3 core.c:1388 adapter_init(): clock speed 950 kHz
  219. Debug: 244 3 openocd.c:137 handle_init_command(): Debug Adapter init complete
  220. Debug: 245 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
  221. Debug: 246 3 command.c:145 script_debug(): command - ocd_transport ocd_transport init
  222. Debug: 248 3 transport.c:240 handle_transport_init(): handle_transport_init
  223. Debug: 249 3 hla_transport.c:154 hl_transport_init(): hl_transport_init
  224. Debug: 250 3 hla_transport.c:171 hl_transport_init(): current transport hla_swd
  225. Debug: 251 3 hla_interface.c:44 hl_interface_open(): hl_interface_open
  226. Debug: 252 3 hla_layout.c:42 hl_layout_open(): hl_layout_open
  227. Debug: 253 3 stlink_usb.c:1698 stlink_usb_open(): stlink_usb_open
  228. Debug: 254 3 stlink_usb.c:1716 stlink_usb_open(): transport: 1 vid: 0x0483 pid: 0x3748 serial:
  229. Info : 255 6 stlink_usb.c:619 stlink_usb_version(): STLINK v2 JTAG v27 API v2 SWIM v6 VID 0x0483 PID 0x3748
  230. Info : 256 6 stlink_usb.c:1834 stlink_usb_open(): using stlink api v2
  231. Debug: 257 6 stlink_usb.c:818 stlink_usb_init_mode(): MODE: 0x02
  232. Info : 258 7 stlink_usb.c:651 stlink_usb_check_voltage(): Target voltage: 3.575968
  233. Debug: 259 7 stlink_usb.c:873 stlink_usb_init_mode(): MODE: 0x01
  234. Debug: 260 7 stlink_usb.c:899 stlink_usb_init_mode(): MODE: 0x02
  235. Debug: 261 7 stlink_usb.c:1849 stlink_usb_open(): Supported clock speeds are:
  236. Debug: 262 7 stlink_usb.c:1852 stlink_usb_open(): 4000 kHz
  237. Debug: 263 7 stlink_usb.c:1852 stlink_usb_open(): 1800 kHz
  238. Debug: 264 7 stlink_usb.c:1852 stlink_usb_open(): 1200 kHz
  239. Debug: 265 7 stlink_usb.c:1852 stlink_usb_open(): 950 kHz
  240. Debug: 266 7 stlink_usb.c:1852 stlink_usb_open(): 480 kHz
  241. Debug: 267 7 stlink_usb.c:1852 stlink_usb_open(): 240 kHz
  242. Debug: 268 7 stlink_usb.c:1852 stlink_usb_open(): 125 kHz
  243. Debug: 269 7 stlink_usb.c:1852 stlink_usb_open(): 100 kHz
  244. Debug: 270 7 stlink_usb.c:1852 stlink_usb_open(): 50 kHz
  245. Debug: 271 7 stlink_usb.c:1852 stlink_usb_open(): 25 kHz
  246. Debug: 272 7 stlink_usb.c:1852 stlink_usb_open(): 15 kHz
  247. Debug: 273 7 stlink_usb.c:1852 stlink_usb_open(): 5 kHz
  248. Debug: 274 8 stlink_usb.c:1872 stlink_usb_open(): Using TAR autoincrement: 1024
  249. Debug: 275 8 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  250. Debug: 276 8 core.c:731 jtag_add_reset(): SRST line released
  251. Debug: 277 8 core.c:755 jtag_add_reset(): TRST line released
  252. Debug: 278 8 core.c:329 jtag_call_event_callbacks(): jtag event: TAP reset
  253. Debug: 279 8 hla_interface.c:69 hl_interface_init_target(): hl_interface_init_target
  254. Debug: 280 8 stlink_usb.c:924 stlink_usb_idcode(): IDCODE: 0x0BB11477
  255. Debug: 281 8 openocd.c:150 handle_init_command(): Examining targets...
  256. Debug: 282 8 target.c:1501 target_call_event_callbacks(): target event 21 (examine-start)
  257. Debug: 283 8 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
  258. Debug: 284 9 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x410cc200
  259. Debug: 285 9 cortex_m.c:1933 cortex_m_examine(): Cortex-M0 r0p0 processor detected
  260. Debug: 286 9 cortex_m.c:1941 cortex_m_examine(): cpuid: 0x410cc200
  261. Debug: 287 9 target.c:2314 target_write_u32(): address: 0xe000edfc, value: 0x01000000
  262. Debug: 288 9 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
  263. Debug: 289 9 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1
  264. Debug: 290 9 target.c:2226 target_read_u32(): address: 0xe0002000, value: 0x00000040
  265. Debug: 291 9 target.c:2314 target_write_u32(): address: 0xe0002008, value: 0x00000000
  266. Debug: 292 9 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1
  267. Debug: 293 10 target.c:2314 target_write_u32(): address: 0xe000200c, value: 0x00000000
  268. Debug: 294 10 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1
  269. Debug: 295 10 target.c:2314 target_write_u32(): address: 0xe0002010, value: 0x00000000
  270. Debug: 296 10 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1
  271. Debug: 297 11 target.c:2314 target_write_u32(): address: 0xe0002014, value: 0x00000000
  272. Debug: 298 11 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1
  273. Debug: 299 11 cortex_m.c:2032 cortex_m_examine(): FPB fpcr 0x40, numcode 4, numlit 0
  274. Debug: 300 11 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1
  275. Debug: 301 11 target.c:2226 target_read_u32(): address: 0xe0001000, value: 0x20000000
  276. Debug: 302 11 target.c:2314 target_write_u32(): address: 0xe0001028, value: 0x00000000
  277. Debug: 303 11 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1
  278. Debug: 304 12 target.c:2314 target_write_u32(): address: 0xe0001038, value: 0x00000000
  279. Debug: 305 12 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1
  280. Debug: 306 12 cortex_m.c:1847 cortex_m_dwt_setup(): DWT dwtcr 0x20000000, comp 2, watch/trigger
  281. Info : 307 12 cortex_m.c:2042 cortex_m_examine(): stm32f0x.cpu: hardware has 4 breakpoints, 2 watchpoints
  282. Debug: 308 12 target.c:1501 target_call_event_callbacks(): target event 22 (examine-end)
  283. Debug: 309 12 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 22 (examine-end) action: stm32f0x_default_examine_end
  284. Debug: 310 12 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015804 4 1
  285. Debug: 311 13 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015804 6
  286. Debug: 312 13 command.c:145 script_debug(): command - mww ocd_mww 0x40015804 6
  287. Debug: 314 13 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015804 4 1
  288. Debug: 315 13 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015808 4 1
  289. Debug: 316 14 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015808 6144
  290. Debug: 317 14 command.c:145 script_debug(): command - mww ocd_mww 0x40015808 6144
  291. Debug: 319 14 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015808 4 1
  292. Debug: 320 15 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
  293. Debug: 321 15 command.c:145 script_debug(): command - ocd_flash ocd_flash init
  294. Debug: 323 15 tcl.c:1097 handle_flash_init_command(): Initializing flash devices...
  295. Debug: 324 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  296. Debug: 325 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  297. Debug: 326 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  298. Debug: 327 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  299. Debug: 328 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  300. Debug: 329 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  301. Debug: 330 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  302. Debug: 331 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  303. Debug: 332 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  304. Debug: 333 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  305. Debug: 334 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  306. Debug: 335 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  307. Debug: 336 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  308. Debug: 337 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  309. Debug: 338 15 command.c:366 register_command_handler(): registering 'ocd_flash'...
  310. Debug: 339 15 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
  311. Debug: 340 15 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
  312. Debug: 342 15 mflash.c:1379 handle_mflash_init_command(): Initializing mflash devices...
  313. Debug: 343 15 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
  314. Debug: 344 15 command.c:145 script_debug(): command - ocd_nand ocd_nand init
  315. Debug: 346 16 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
  316. Debug: 347 16 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
  317. Debug: 348 16 command.c:145 script_debug(): command - ocd_pld ocd_pld init
  318. Debug: 350 16 pld.c:207 handle_pld_init_command(): Initializing PLDs...
  319. Info : 351 198 server.c:91 add_connection(): accepting 'gdb' connection on tcp/3333
  320. Debug: 352 198 breakpoints.c:359 breakpoint_clear_target_internal(): Delete all breakpoints for target: stm32f0x.cpu
  321. Debug: 353 198 breakpoints.c:499 watchpoint_clear_target(): Delete all watchpoints for target: stm32f0x.cpu
  322. Debug: 354 198 target.c:1501 target_call_event_callbacks(): target event 23 (gdb-attach)
  323. Debug: 355 198 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
  324. Debug: 356 198 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x410cc200
  325. Debug: 357 198 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015800 4 1
  326. Debug: 358 199 target.c:2226 target_read_u32(): address: 0x40015800, value: 0x10006444
  327. Info : 359 199 stm32f1x.c:866 stm32x_probe(): device id = 0x10006444
  328. Debug: 360 199 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
  329. Debug: 361 199 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x410cc200
  330. Debug: 362 199 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x1ffff7cc 2 1
  331. Debug: 363 200 target.c:2250 target_read_u16(): address: 0x1ffff7cc, value: 0x0020
  332. Info : 364 200 stm32f1x.c:1008 stm32x_probe(): flash size = 32kbytes
  333. Debug: 365 200 gdb_server.c:994 gdb_new_connection(): New GDB Connection: 1, Target stm32f0x.cpu, state: running
  334. Debug: 366 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'qSupported:multiprocess+;swbreak+;hwbreak+;qRelocInsn+'
  335. Debug: 367 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'QStartNoAckMode'
  336. Debug: 368 200 gdb_server.c:632 gdb_get_packet_inner(): Received first acknowledgment after entering noack mode. Ignoring it.
  337. Debug: 369 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'Hg0'
  338. Debug: 370 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'qXfer:features:read:target.xml:0,fff'
  339. Debug: 371 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'qTStatus'
  340. Debug: 372 200 gdb_server.c:2673 gdb_input_inner(): received packet: '?'
  341. User : 373 200 gdb_server.c:153 gdb_last_signal(): undefined debug reason 7 - target needs reset
  342. Debug: 374 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'qfThreadInfo'
  343. Debug: 375 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'Hc-1'
  344. Debug: 376 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'qC'
  345. Debug: 377 200 gdb_server.c:2673 gdb_input_inner(): received packet: 'qAttached'
  346. Debug: 378 201 gdb_server.c:2673 gdb_input_inner(): received packet: 'qOffsets'
  347. Debug: 379 201 gdb_server.c:2673 gdb_input_inner(): received packet: 'g'
  348. Debug: 380 201 gdb_server.c:2673 gdb_input_inner(): received packet: 'qfThreadInfo'
  349. Debug: 381 201 gdb_server.c:2673 gdb_input_inner(): received packet: 'qXfer:memory-map:read::0,fff'
  350. Debug: 382 201 gdb_server.c:2673 gdb_input_inner(): received packet: 'm0,4'
  351. Debug: 383 201 gdb_server.c:1384 gdb_read_memory_packet(): addr: 0x00000000, len: 0x00000004
  352. Debug: 384 201 target.c:2078 target_read_buffer(): reading buffer of 4 byte at 0x00000000
  353. Debug: 385 201 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x00000000 4 1
  354. Debug: 386 201 gdb_server.c:2673 gdb_input_inner(): received packet: 'qSymbol::'
  355. Debug: 387 208 gdb_server.c:2673 gdb_input_inner(): received packet: 'qRcmd,72657365742068616c74'
  356. Debug: 388 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset halt
  357. Debug: 389 209 command.c:145 script_debug(): command - reset ocd_reset halt
  358. Debug: 391 209 target.c:1519 target_call_reset_callbacks(): target reset 2 (halt)
  359. Debug: 392 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
  360. Debug: 393 209 command.c:145 script_debug(): command - ocd_target ocd_target names
  361. Debug: 394 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-start
  362. Debug: 395 209 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-start
  363. Debug: 396 209 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 7 (reset-start) action: stm32f0x_default_reset_start
  364. Debug: 397 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
  365. Debug: 398 209 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1000
  366. Debug: 400 209 core.c:1633 jtag_config_khz(): handle jtag khz
  367. Debug: 401 209 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  368. Debug: 402 209 core.c:1603 adapter_khz_to_speed(): have interface set up
  369. Info : 403 209 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  370. Debug: 404 209 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  371. Debug: 405 209 core.c:1603 adapter_khz_to_speed(): have interface set up
  372. Info : 406 209 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  373. User : 407 209 command.c:546 command_print(): adapter speed: 950 kHz
  374. Debug: 408 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  375. Debug: 409 209 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  376. Debug: 410 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  377. Debug: 411 209 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  378. Debug: 412 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event examine-start
  379. Debug: 413 209 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event examine-start
  380. Debug: 414 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_examine
  381. Debug: 415 209 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_examine
  382. Debug: 416 209 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event examine-end
  383. Debug: 417 209 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event examine-end
  384. Debug: 418 209 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 22 (examine-end) action: stm32f0x_default_examine_end
  385. Debug: 419 209 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015804 4 1
  386. Debug: 420 210 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015804 6
  387. Debug: 421 210 command.c:145 script_debug(): command - mww ocd_mww 0x40015804 6
  388. Debug: 423 210 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015804 4 1
  389. Debug: 424 210 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015808 4 1
  390. Debug: 425 211 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015808 6144
  391. Debug: 426 211 command.c:145 script_debug(): command - mww ocd_mww 0x40015808 6144
  392. Debug: 428 211 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015808 4 1
  393. Debug: 429 211 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-assert-pre
  394. Debug: 430 211 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-assert-pre
  395. Debug: 431 211 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  396. Debug: 432 211 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  397. Debug: 433 211 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_reset assert 1
  398. Debug: 434 211 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_reset assert 1
  399. Debug: 435 211 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  400. Debug: 436 211 hla_target.c:485 adapter_assert_reset(): adapter_assert_reset
  401. Debug: 437 211 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  402. Debug: 438 211 core.c:727 jtag_add_reset(): SRST line asserted
  403. Debug: 439 213 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-assert-post
  404. Debug: 440 213 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-assert-post
  405. Debug: 441 213 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-deassert-pre
  406. Debug: 442 213 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-deassert-pre
  407. Debug: 443 213 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  408. Debug: 444 213 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  409. Debug: 445 213 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_reset deassert 1
  410. Debug: 446 213 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_reset deassert 1
  411. Debug: 447 213 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  412. Debug: 448 213 hla_target.c:548 adapter_deassert_reset(): adapter_deassert_reset
  413. Debug: 449 213 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  414. Debug: 450 213 core.c:731 jtag_add_reset(): SRST line released
  415. Debug: 451 213 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-deassert-post
  416. Debug: 452 213 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-deassert-post
  417. Debug: 453 213 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  418. Debug: 454 213 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  419. Debug: 455 213 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_waitstate halted 1000
  420. Debug: 456 213 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_waitstate halted 1000
  421. Debug: 457 213 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
  422. Debug: 458 214 target.c:2226 target_read_u32(): address: 0xe000edf8, value: 0x08000238
  423. Debug: 459 214 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  424. Debug: 460 214 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0 value 0xffffffff
  425. Debug: 461 214 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  426. Debug: 462 214 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1 value 0xffffffff
  427. Debug: 463 215 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  428. Debug: 464 215 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2 value 0xffffffff
  429. Debug: 465 215 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  430. Debug: 466 215 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3 value 0xffffffff
  431. Debug: 467 215 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  432. Debug: 468 216 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4 value 0xffffffff
  433. Debug: 469 216 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  434. Debug: 470 216 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5 value 0xffffffff
  435. Debug: 471 216 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  436. Debug: 472 217 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6 value 0xffffffff
  437. Debug: 473 217 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  438. Debug: 474 217 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7 value 0xffffffff
  439. Debug: 475 217 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  440. Debug: 476 217 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8 value 0xffffffff
  441. Debug: 477 217 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  442. Debug: 478 218 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9 value 0xffffffff
  443. Debug: 479 218 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  444. Debug: 480 218 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10 value 0xffffffff
  445. Debug: 481 218 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  446. Debug: 482 219 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11 value 0xffffffff
  447. Debug: 483 219 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  448. Debug: 484 219 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12 value 0xffffffff
  449. Debug: 485 219 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  450. Debug: 486 219 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13 value 0x20001000
  451. Debug: 487 219 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  452. Debug: 488 220 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14 value 0xffffffff
  453. Debug: 489 220 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  454. Debug: 490 220 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15 value 0x8000238
  455. Debug: 491 220 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  456. Debug: 492 221 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16 value 0xc1000000
  457. Debug: 493 221 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  458. Debug: 494 221 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17 value 0x20001000
  459. Debug: 495 221 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  460. Debug: 496 222 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18 value 0xfffffffc
  461. Debug: 497 222 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  462. Debug: 498 222 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
  463. Debug: 499 222 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  464. Debug: 500 222 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
  465. Debug: 501 222 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  466. Debug: 502 223 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
  467. Debug: 503 223 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  468. Debug: 504 223 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
  469. Debug: 505 224 hla_target.c:433 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x08000238, target->state: halted
  470. Debug: 506 224 target.c:1501 target_call_event_callbacks(): target event 0 (gdb-halt)
  471. Debug: 507 224 target.c:1501 target_call_event_callbacks(): target event 1 (halted)
  472. User : 508 224 target.c:1936 target_arch_state(): stm32f0x.cpu: target state: halted
  473. User : 509 224 armv7m.c:553 armv7m_arch_state(): target halted due to debug-request, current mode: Thread
  474. xPSR: 0xc1000000 pc: 0x08000238 msp: 0x20001000
  475. Debug: 510 224 target.c:1501 target_call_event_callbacks(): target event 6 (gdb-end)
  476. Debug: 511 224 hla_target.c:472 adapter_poll(): halted: PC: 0x08000238
  477. Debug: 512 224 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu curstate
  478. Debug: 513 224 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu curstate
  479. Debug: 514 224 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-end
  480. Debug: 515 224 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-end
  481. Debug: 516 225 gdb_server.c:2673 gdb_input_inner(): received packet: 'vFlashErase:08000000,00001000'
  482. Debug: 517 225 target.c:1501 target_call_event_callbacks(): target event 25 (gdb-flash-erase-start)
  483. Debug: 518 225 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 25 (gdb-flash-erase-start) action: reset init
  484. Debug: 519 225 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset init
  485. Debug: 520 225 command.c:145 script_debug(): command - reset ocd_reset init
  486. Debug: 522 226 target.c:1519 target_call_reset_callbacks(): target reset 3 (init)
  487. Debug: 523 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
  488. Debug: 524 226 command.c:145 script_debug(): command - ocd_target ocd_target names
  489. Debug: 525 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-start
  490. Debug: 526 226 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-start
  491. Debug: 527 226 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 7 (reset-start) action: stm32f0x_default_reset_start
  492. Debug: 528 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
  493. Debug: 529 226 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1000
  494. Debug: 531 226 core.c:1633 jtag_config_khz(): handle jtag khz
  495. Debug: 532 226 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  496. Debug: 533 226 core.c:1603 adapter_khz_to_speed(): have interface set up
  497. Info : 534 226 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  498. Debug: 535 226 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  499. Debug: 536 226 core.c:1603 adapter_khz_to_speed(): have interface set up
  500. Info : 537 226 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  501. User : 538 226 command.c:546 command_print(): adapter speed: 950 kHz
  502. Debug: 539 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  503. Debug: 540 226 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  504. Debug: 541 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  505. Debug: 542 226 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  506. Debug: 543 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event examine-start
  507. Debug: 544 226 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event examine-start
  508. Debug: 545 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_examine
  509. Debug: 546 226 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_examine
  510. Debug: 547 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event examine-end
  511. Debug: 548 226 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event examine-end
  512. Debug: 549 226 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 22 (examine-end) action: stm32f0x_default_examine_end
  513. Debug: 550 226 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015804 4 1
  514. Debug: 551 226 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015804 6
  515. Debug: 552 226 command.c:145 script_debug(): command - mww ocd_mww 0x40015804 6
  516. Debug: 554 226 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015804 4 1
  517. Debug: 555 227 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015808 4 1
  518. Debug: 556 227 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015808 6144
  519. Debug: 557 227 command.c:145 script_debug(): command - mww ocd_mww 0x40015808 6144
  520. Debug: 559 227 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015808 4 1
  521. Debug: 560 228 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-assert-pre
  522. Debug: 561 228 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-assert-pre
  523. Debug: 562 228 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  524. Debug: 563 228 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  525. Debug: 564 228 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_reset assert 1
  526. Debug: 565 228 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_reset assert 1
  527. Debug: 566 228 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  528. Debug: 567 228 hla_target.c:485 adapter_assert_reset(): adapter_assert_reset
  529. Debug: 568 228 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  530. Debug: 569 228 core.c:727 jtag_add_reset(): SRST line asserted
  531. Debug: 570 229 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-assert-post
  532. Debug: 571 230 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-assert-post
  533. Debug: 572 230 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-deassert-pre
  534. Debug: 573 230 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-deassert-pre
  535. Debug: 574 230 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  536. Debug: 575 230 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  537. Debug: 576 230 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_reset deassert 1
  538. Debug: 577 230 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_reset deassert 1
  539. Debug: 578 230 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  540. Debug: 579 230 hla_target.c:548 adapter_deassert_reset(): adapter_deassert_reset
  541. Debug: 580 230 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  542. Debug: 581 230 core.c:731 jtag_add_reset(): SRST line released
  543. Debug: 582 230 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-deassert-post
  544. Debug: 583 230 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-deassert-post
  545. Debug: 584 230 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  546. Debug: 585 230 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  547. Debug: 586 230 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_waitstate halted 1000
  548. Debug: 587 230 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_waitstate halted 1000
  549. Debug: 588 230 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
  550. Debug: 589 231 target.c:2226 target_read_u32(): address: 0xe000edf8, value: 0x08000238
  551. Debug: 590 231 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  552. Debug: 591 231 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0 value 0xffffffff
  553. Debug: 592 231 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  554. Debug: 593 231 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1 value 0xffffffff
  555. Debug: 594 231 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  556. Debug: 595 232 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2 value 0xffffffff
  557. Debug: 596 232 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  558. Debug: 597 232 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3 value 0xffffffff
  559. Debug: 598 232 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  560. Debug: 599 239 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4 value 0xffffffff
  561. Debug: 600 239 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  562. Debug: 601 240 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5 value 0xffffffff
  563. Debug: 602 240 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  564. Debug: 603 240 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6 value 0xffffffff
  565. Debug: 604 240 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  566. Debug: 605 240 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7 value 0xffffffff
  567. Debug: 606 240 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  568. Debug: 607 241 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8 value 0xffffffff
  569. Debug: 608 241 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  570. Debug: 609 241 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9 value 0xffffffff
  571. Debug: 610 241 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  572. Debug: 611 242 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10 value 0xffffffff
  573. Debug: 612 242 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  574. Debug: 613 242 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11 value 0xffffffff
  575. Debug: 614 242 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  576. Debug: 615 242 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12 value 0xffffffff
  577. Debug: 616 242 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  578. Debug: 617 243 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13 value 0x20001000
  579. Debug: 618 243 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  580. Debug: 619 243 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14 value 0xffffffff
  581. Debug: 620 243 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  582. Debug: 621 244 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15 value 0x8000238
  583. Debug: 622 244 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  584. Debug: 623 244 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16 value 0xc1000000
  585. Debug: 624 244 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  586. Debug: 625 244 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17 value 0x20001000
  587. Debug: 626 244 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  588. Debug: 627 245 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18 value 0xfffffffc
  589. Debug: 628 245 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  590. Debug: 629 245 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
  591. Debug: 630 245 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  592. Debug: 631 246 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
  593. Debug: 632 246 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  594. Debug: 633 246 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
  595. Debug: 634 246 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  596. Debug: 635 246 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
  597. Debug: 636 247 hla_target.c:433 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x08000238, target->state: halted
  598. Debug: 637 247 target.c:1501 target_call_event_callbacks(): target event 0 (gdb-halt)
  599. Debug: 638 247 target.c:1501 target_call_event_callbacks(): target event 1 (halted)
  600. User : 639 247 target.c:1936 target_arch_state(): stm32f0x.cpu: target state: halted
  601. User : 640 247 armv7m.c:553 armv7m_arch_state(): target halted due to debug-request, current mode: Thread
  602. xPSR: 0xc1000000 pc: 0x08000238 msp: 0x20001000
  603. Debug: 641 247 target.c:1501 target_call_event_callbacks(): target event 6 (gdb-end)
  604. Debug: 642 247 hla_target.c:472 adapter_poll(): halted: PC: 0x08000238
  605. Debug: 643 247 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu curstate
  606. Debug: 644 247 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu curstate
  607. Debug: 645 247 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  608. Debug: 646 247 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  609. Debug: 647 247 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_waitstate halted 5000
  610. Debug: 648 247 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_waitstate halted 5000
  611. Debug: 649 247 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-init
  612. Debug: 650 247 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-init
  613. Debug: 651 247 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 17 (reset-init) action: stm32f0x_default_reset_init
  614. Debug: 652 247 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40021004 0x00100000
  615. Debug: 653 247 command.c:145 script_debug(): command - mww ocd_mww 0x40021004 0x00100000
  616. Debug: 655 247 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40021004 4 1
  617. Debug: 656 248 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40021000 4 1
  618. Debug: 657 248 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40021000 16800387
  619. Debug: 658 248 command.c:145 script_debug(): command - mww ocd_mww 0x40021000 16800387
  620. Debug: 660 248 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40021000 4 1
  621. Debug: 661 250 stlink_usb.c:473 stlink_usb_error_check(): SWD_DP_ERROR
  622. Debug: 662 250 command.c:628 run_command(): Command failed with error code -4
  623. User : 663 250 command.c:546 command_print(): in procedure 'reset'
  624. in procedure 'ocd_bouncer'
  625. in procedure 'ocd_process_reset'
  626. in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 248
  627. in procedure 'stm32f0x.cpu' called at file "embedded:startup.tcl", line 370
  628. in procedure 'ocd_bouncer'
  629.  
  630. Debug: 664 250 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-end
  631. Debug: 665 250 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-end
  632. Debug: 666 251 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  633. Error: 667 251 stm32f1x.c:426 stm32x_erase(): Target not halted
  634. Error: 668 251 core.c:47 flash_driver_erase(): failed erasing sectors 0 to 3
  635. Debug: 669 251 target.c:1501 target_call_event_callbacks(): target event 26 (gdb-flash-erase-end)
  636. Error: 670 251 gdb_server.c:2481 gdb_v_packet(): flash_erase returned -304
  637. Debug: 671 257 gdb_server.c:2673 gdb_input_inner(): received packet: 'qfThreadInfo'
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