module bin_cnt
(
    input logic clk, resetn,
    int start,
    output logic [3:0] count
);

int it;
logic cond;

    always @ (posedge clk or negedge resetn)
    begin

        if (!resetn)
            begin
                count <= 0;
                it = 0;
                cond = 1;
            end
        else
            if(cond)
            if (count==(start-it))
                begin
                    if((start-it)<=(it+1))
                        begin
                            cond = 0;
                            count <= count - 1;
                        end
                    else
                    count <= it
                    it <= it + 1;
                end
            else
                count <= count + 1;
    end

endmodule