CMPT250 ALU

use IEEE;
use IEEE.std_logic_1164_all;
use IEEE.std_logic_arith.all;

entity alu is
	port(rs: in std_logic_vector(15 downto 0);  rt: in std_logic_vector(15 downto 0); c0 in std_logic; sel: in std_logic_vector(2 downto 0);
		res: out std_logic_vector(15 downto 0); lt: out boolean; eq: out boolean);
end alu;

architecture behav of alu is

begin
	variable RES: std_logic_vector(15 downto 0);
	variable Diff: std_logic_vector(15 downto 0);
	process is

		case sel is
			when "000" =>
				RES := c0;
			when "001" =>
				RES := rs + c0;
			when "010" =>
				RES := res = rs - 1;
			when "011" =>
				RES := res + rt + c0;
			when "100" =>
				RES := rs + (not rt) + c0;
			when "101" =>
				RES := (rs and rt)
			when "110" =>
				RES := (not rs) + c0;
			when "111"
				RES := rt + c0;

		end case;
		eq <= (rs = rt);
		--lt <= (rs < rt);
		Diff := rs- rt
		lt <= Diff(15);
		res <= RES;

	begin
	wait on sel;
	end process




end alu;