void enable_sram_execution()
{
    uint32_t attr_val = 0;
    // disable MPU first
    NVIC_MPU_CTRL_R = 0;

    // region 0
    NVIC_MPU_NUMBER_R = 0;

    // SRAM Base = 0x2000.0000
    NVIC_MPU_BASE_R = 0x20000000;
    // SRAM Size = 0x8000
    #define EXECUTABLE_REGION (0x0 << 28) // executable, i.e. XN = 0
    #define ACCESS_PERMISSION (0x03 << 24) // R/W for both privileged and unprivileged
    #define TEXSCB (0x8 << 16) // normal (TEX = b001, S = 0, C = 0, B = 0)
    #define SRD (0x0 << 8) // no sub-region disabled
    #define SIZE (0xE << 1) // size of 32K (2^15)
    #define ENABLED (0x01 << 0)


    attr_val = (EXECUTABLE_REGION | ACCESS_PERMISSION | TEXSCB | SRD | SIZE | ENABLED);

    NVIC_MPU_ATTR_R = attr_val;
    NVIC_MPU_CTRL_R = 0x7; // enable PRIVDEFENA and enable the region
}