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  1. void SPI1_BusInit(void)
  2. {
  3. GPIO_InitTypeDef GPIO_InitStructure;
  4. SPI_InitTypeDef SPI_InitStructure;
  5. DMA_InitTypeDef DMA_InitStructure;
  6. NVIC_InitTypeDef NVIC_InitStructure;
  7.  
  8. SPI1_BLOCK=SPI_BLOCK_FREE;
  9.  
  10. RCC_AHBPeriphClockCmd(RCC_AHBPeriph_DMA1, ENABLE);
  11. RCC_APB2PeriphClockCmd(RCC_APB2Periph_SPI1, ENABLE);
  12. RCC_APB2PeriphClockCmd(RCC_APB2Periph_GPIOA | RCC_APB2Periph_AFIO, ENABLE);
  13.  
  14. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_5 | GPIO_Pin_7;
  15. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_AF_PP;
  16. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  17. GPIO_Init(GPIOA, &GPIO_InitStructure);
  18.  
  19. GPIO_InitStructure.GPIO_Pin = GPIO_Pin_6;
  20. GPIO_InitStructure.GPIO_Mode = GPIO_Mode_IN_FLOATING;
  21. GPIO_InitStructure.GPIO_Speed = GPIO_Speed_50MHz;
  22. GPIO_Init(GPIOA, &GPIO_InitStructure);
  23.  
  24.  
  25.  
  26.  
  27. SPI_InitStructure.SPI_BaudRatePrescaler = SPI_BaudRatePrescaler_2;
  28. SPI_InitStructure.SPI_CPHA = SPI_CPHA_1Edge;
  29. SPI_InitStructure.SPI_CPOL = SPI_CPOL_Low;
  30. SPI_InitStructure.SPI_DataSize = SPI_DataSize_8b;
  31. SPI_InitStructure.SPI_Direction = SPI_Direction_2Lines_FullDuplex;
  32. SPI_InitStructure.SPI_FirstBit = SPI_FirstBit_MSB;
  33. SPI_InitStructure.SPI_Mode = SPI_Mode_Master;
  34. SPI_InitStructure.SPI_NSS = SPI_NSS_Soft;
  35. SPI_Init(SPI1, &SPI_InitStructure);
  36.  
  37. SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Tx, ENABLE);
  38. SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx, ENABLE);
  39.  
  40. SPI_Cmd(SPI1, ENABLE);
  41.  
  42.  
  43. // DMA Channel 2 - SPI RX
  44. DMA_InitStructure.DMA_BufferSize = 0;
  45. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralSRC;
  46. DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  47. DMA_InitStructure.DMA_MemoryBaseAddr = 0x00;
  48. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  49. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  50. DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  51. DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI1->DR;
  52. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  53. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  54. DMA_InitStructure.DMA_Priority = DMA_Priority_High;
  55. DMA_Init(DMA1_Channel2, &DMA_InitStructure);
  56.  
  57. DMA_ITConfig(DMA1_Channel2, DMA_IT_TC, ENABLE);
  58.  
  59. // DMA Channel 3 - SPI TX
  60. DMA_InitStructure.DMA_BufferSize = 0;
  61. DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralDST;
  62. DMA_InitStructure.DMA_M2M = DMA_M2M_Disable;
  63. DMA_InitStructure.DMA_MemoryBaseAddr = 0x00;
  64. DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_Byte;
  65. DMA_InitStructure.DMA_MemoryInc = DMA_MemoryInc_Enable;
  66. DMA_InitStructure.DMA_Mode = DMA_Mode_Normal;
  67. DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&SPI1->DR;
  68. DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_Byte;
  69. DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
  70. DMA_InitStructure.DMA_Priority = DMA_Priority_High;
  71. DMA_Init(DMA1_Channel3, &DMA_InitStructure);
  72.  
  73. NVIC_InitStructure.NVIC_IRQChannel = DMA1_Channel2_IRQn;
  74. NVIC_InitStructure.NVIC_IRQChannelPreemptionPriority = 0x0F;
  75. NVIC_InitStructure.NVIC_IRQChannelSubPriority = 0x00;
  76. NVIC_InitStructure.NVIC_IRQChannelCmd = ENABLE;
  77. NVIC_Init(&NVIC_InitStructure);
  78.  
  79. }
  80.  
  81. uint8_t SPI1_send(uint8_t n_bytes, uint8_t periph, uint32_t txdata_address, uint32_t rxdata_address)
  82. {
  83. /* Just a temporary debugging array to visualize the data given to the function */
  84. uint8_t* tmp;
  85.  
  86. tmp=txdata_address;
  87.  
  88. /* Set DMA RX and TX Buffers */
  89. DMA1_Channel2->CMAR = (uint32_t)rxdata_address;
  90. DMA1_Channel3->CMAR = (uint32_t)txdata_address;
  91.  
  92. DMA_SetCurrDataCounter(DMA1_Channel3, n_bytes);
  93. DMA_SetCurrDataCounter(DMA1_Channel2, n_bytes);
  94.  
  95. /* Set or Reset CHIP Select depending on hardware
  96. */
  97. switch( periph )
  98. {
  99. case SPI_POTILED1_WRITE_DATA:
  100. /* Set Chip Select of LED Controller low */
  101. GPIO_WriteBit(POTILED1_CS_GPIO_PORT, POTILED1_CS_PIN, Bit_RESET);
  102. break;
  103. case SPI_POTILED2_WRITE_DATA:
  104. /* Set Chip Select of LED Controller low */
  105. GPIO_WriteBit(POTILED2_CS_GPIO_PORT, POTILED2_CS_PIN, Bit_RESET);
  106. break;
  107. case SPI_POTILED3_WRITE_DATA:
  108. /* Set Chip Select of LED Controller low */
  109. GPIO_WriteBit(POTILED3_CS_GPIO_PORT, POTILED3_CS_PIN, Bit_RESET);
  110. break;
  111. case SPI_POTILED4_WRITE_DATA:
  112. /* Set Chip Select of LED Controller low */
  113. GPIO_WriteBit(POTILED4_CS_GPIO_PORT, POTILED4_CS_PIN, Bit_RESET);
  114. break;
  115. case SPI_CHANNELLED_WRITE_DATA:
  116. /* Set Chip Select of LED Controller low */
  117. GPIO_WriteBit(CHANNELLED_CS_GPIO_PORT, CHANNELLED_CS_PIN, Bit_RESET);
  118. break;
  119. case SPI_SIEBENSEGMENT_WRITE_DATA:
  120. /* Set Chip Select of 7 segment Controller low */
  121. GPIO_WriteBit(SIEBENSEGMENT_CS_GPIO_PORT, SIEBENSEGMENT_CS_PIN, Bit_RESET);
  122. break;
  123.  
  124. /* In case of a failure
  125. * Reset everything to its default state
  126. */
  127. default:
  128. GPIO_WriteBit(POTILED1_CS_GPIO_PORT, POTILED1_CS_PIN, Bit_RESET);
  129. GPIO_WriteBit(POTILED2_CS_GPIO_PORT, POTILED2_CS_PIN, Bit_RESET);
  130. GPIO_WriteBit(POTILED3_CS_GPIO_PORT, POTILED3_CS_PIN, Bit_RESET);
  131. GPIO_WriteBit(POTILED4_CS_GPIO_PORT, POTILED4_CS_PIN, Bit_RESET);
  132. GPIO_WriteBit(CHANNELLED_CS_GPIO_PORT, CHANNELLED_CS_PIN, Bit_RESET);
  133. GPIO_WriteBit(CHANNELLED_CS_GPIO_PORT, CHANNELLED_OE_PIN, Bit_SET);
  134. GPIO_WriteBit(SIEBENSEGMENT_CS_GPIO_PORT, SIEBENSEGMENT_CS_PIN, Bit_RESET);
  135. SPI1_BLOCK=SPI_BLOCK_FREE;
  136. return 1;
  137. break;
  138. }
  139. DMA_ITConfig(DMA1_Channel2, DMA_IT_TC, ENABLE);
  140.  
  141. DMA_Cmd(DMA1_Channel2, ENABLE);
  142. DMA_Cmd(DMA1_Channel3, ENABLE);
  143.  
  144. return 0;
  145. }
  146.  
  147. void spi_handleDMA1Ch2Interrupt(void)
  148. {
  149. /* Test on DMA1 Channel2 Transfer Complete interrupt */
  150. if(DMA_GetITStatus(DMA1_IT_TC2))
  151. {
  152. /* Clear DMA1 Channel1 Half Transfer, Transfer Complete and Global interrupt pending bits */
  153. DMA_ClearITPendingBit(DMA1_IT_GL2);
  154.  
  155. /* The next line waits for rx please enable only in case of rx */
  156. while (DMA_GetFlagStatus(DMA1_FLAG_TC3) == RESET) {}
  157.  
  158. /* wait for tx to complete - page 692 */
  159. while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_TXE) == RESET) {}
  160. while (SPI_I2S_GetFlagStatus(SPI1, SPI_I2S_FLAG_BSY) == SET) {}
  161.  
  162. /* Clear the global flag */
  163. DMA_ClearFlag(DMA1_FLAG_GL3);
  164.  
  165. /* Disable DMA */
  166. DMA_ITConfig(DMA1_Channel2, DMA_IT_TC, DISABLE);
  167.  
  168. /* Is it important to disable the SPI DMA hardware ?? */
  169. /* SPI_I2S_DMACmd(SPI1, SPI_I2S_DMAReq_Rx | SPI_I2S_DMAReq_Tx, DISABLE); */
  170. DMA_Cmd(DMA1_Channel2, DISABLE);
  171. DMA_Cmd(DMA1_Channel3, DISABLE);
  172.  
  173. /* wait until DMA is actually off */
  174. while (DMA1_Channel2->CCR & DMA_CCR2_EN);
  175. while (DMA1_Channel3->CCR & DMA_CCR3_EN);
  176.  
  177. /* Clear the Interrupt flag */
  178. DMA_ClearFlag(DMA1_FLAG_TC2);
  179.  
  180. /* Release or cycle Chip Select of currently addressed hardware */
  181. switch( SPI1_BLOCK )
  182. {
  183. case SPI_POTILED1_WRITE_DATA:
  184. /* Toggle chip select of LED Controler shortly */
  185. GPIO_WriteBit(POTILED1_CS_GPIO_PORT, POTILED1_CS_PIN, Bit_SET);
  186. __ASM volatile ("nop");
  187. __ASM volatile ("nop");
  188. GPIO_WriteBit(POTILED1_CS_GPIO_PORT, POTILED1_CS_PIN, Bit_RESET);
  189. break;
  190. case SPI_POTILED2_WRITE_DATA:
  191. /* Toggle chip select of LED Controler shortly */
  192. GPIO_WriteBit(POTILED2_CS_GPIO_PORT, POTILED2_CS_PIN, Bit_SET);
  193. __ASM volatile ("nop");
  194. __ASM volatile ("nop");
  195. GPIO_WriteBit(POTILED2_CS_GPIO_PORT, POTILED2_CS_PIN, Bit_RESET);
  196. break;
  197. case SPI_POTILED3_WRITE_DATA:
  198. /* Toggle chip select of LED Controler shortly */
  199. GPIO_WriteBit(POTILED3_CS_GPIO_PORT, POTILED3_CS_PIN, Bit_SET);
  200. __ASM volatile ("nop");
  201. __ASM volatile ("nop");
  202. GPIO_WriteBit(POTILED3_CS_GPIO_PORT, POTILED3_CS_PIN, Bit_RESET);
  203. break;
  204. case SPI_POTILED4_WRITE_DATA:
  205. /* Toggle chip select of LED Controler shortly */
  206. GPIO_WriteBit(POTILED4_CS_GPIO_PORT, POTILED4_CS_PIN, Bit_SET);
  207. __ASM volatile ("nop");
  208. __ASM volatile ("nop");
  209. GPIO_WriteBit(POTILED4_CS_GPIO_PORT, POTILED4_CS_PIN, Bit_RESET);
  210. break;
  211. case SPI_CHANNELLED_WRITE_DATA:
  212. /* Toggle chip select of LED Controler shortly */
  213. GPIO_WriteBit(CHANNELLED_CS_GPIO_PORT, CHANNELLED_CS_PIN, Bit_SET);
  214. __ASM volatile ("nop");
  215. __ASM volatile ("nop");
  216. GPIO_WriteBit(CHANNELLED_CS_GPIO_PORT, CHANNELLED_CS_PIN, Bit_RESET);
  217.  
  218. break;
  219. case SPI_SIEBENSEGMENT_WRITE_DATA:
  220. /* Set Chip Select of LED Controller high */
  221. GPIO_WriteBit(SIEBENSEGMENT_CS_GPIO_PORT, SIEBENSEGMENT_CS_PIN, Bit_SET);
  222. break;
  223.  
  224. /*
  225. * In case of a failure
  226. * Reset everything to its default state
  227. */
  228. default:
  229. GPIO_WriteBit(POTILED1_CS_GPIO_PORT, POTILED1_CS_PIN, Bit_RESET);
  230. GPIO_WriteBit(POTILED2_CS_GPIO_PORT, POTILED2_CS_PIN, Bit_RESET);
  231. GPIO_WriteBit(POTILED3_CS_GPIO_PORT, POTILED3_CS_PIN, Bit_RESET);
  232. GPIO_WriteBit(POTILED4_CS_GPIO_PORT, POTILED4_CS_PIN, Bit_RESET);
  233. GPIO_WriteBit(CHANNELLED_CS_GPIO_PORT, CHANNELLED_CS_PIN, Bit_RESET);
  234. GPIO_WriteBit(CHANNELLED_CS_GPIO_PORT, CHANNELLED_OE_PIN, Bit_RESET);
  235. GPIO_WriteBit(SIEBENSEGMENT_CS_GPIO_PORT, SIEBENSEGMENT_CS_PIN, Bit_SET);
  236. SPI1_BLOCK=SPI_BLOCK_FREE;
  237. break;
  238. }
  239.  
  240. SPI1_BLOCK=SPI_BLOCK_FREE;
  241. }
  242. else
  243. {
  244. /* Should not get here */
  245. SPI1_BLOCK=SPI_BLOCK_FAILURE;
  246. }
  247.  
  248. }
  249.  
  250. //left_poti und right_poti sind lookup tables.
  251. void poti_send_led_data(uint8_t number, uint8_t leftvalue, uint8_t rightvalue)
  252. {
  253. uint8_t i, j;
  254. while(SPI1_BLOCK != SPI_BLOCK_FREE)
  255. {
  256. i=SPI1_BLOCK;
  257. }
  258. j=17;
  259. for(i=0; i<18; i++)
  260. {
  261. poti_data[i]=left_poti[leftvalue][i];
  262.  
  263. }
  264.  
  265. for(i=0; i<18; i++)
  266. {
  267. poti_data[i+18]=right_poti[rightvalue][i];
  268.  
  269. }
  270.  
  271. switch(number)
  272. {
  273. case 1:
  274. SPI1_BLOCK = SPI_POTILED1_WRITE_DATA;
  275. SPI1_send(36,SPI_POTILED1_WRITE_DATA, poti_data, rx_data);
  276. break;
  277. case 2:
  278. SPI1_BLOCK = SPI_POTILED2_WRITE_DATA;
  279. SPI1_send(36,SPI_POTILED2_WRITE_DATA, poti_data, rx_data);
  280. break;
  281. case 3:
  282. SPI1_BLOCK = SPI_POTILED3_WRITE_DATA;
  283. SPI1_send(36,SPI_POTILED3_WRITE_DATA, poti_data, rx_data);
  284. break;
  285. case 4:
  286. SPI1_BLOCK = SPI_POTILED4_WRITE_DATA;
  287. SPI1_send(36,SPI_POTILED4_WRITE_DATA, poti_data, rx_data);
  288. break;
  289.  
  290. default:
  291. break;
  292. }
  293. }
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