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stats.py output

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Feb 28th, 2017
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  1. Found test directory divmul
  2. Found test directory cast
  3. Found test directory negcnt
  4.  
  5. Total faults: 60
  6. Total mismatch: 52
  7.  
  8. Register pairs that miss/match:
  9. Missmatch both faults from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6103 maps to U_CPU/U_CTR/ram_out_data[7]
  10. Missmatch both faults from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6111 maps to U_CPU/U_CTR/ram_addr[7]
  11. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6152 maps to U_CPU/U_CTR/alu_src_2[7]
  12. Missmatch both faults from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6160 maps to U_CPU/U_CTR/alu_src_3[7]
  13. Missmatch both faults from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6161 maps to U_CPU/U_CTR/alu_src_3[6]
  14. Missmatch both faults from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6162 maps to U_CPU/U_CTR/alu_src_3[5]
  15. Missmatch both faults from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6163 maps to U_CPU/U_CTR/alu_src_3[4]
  16. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6164 maps to U_CPU/U_CTR/alu_src_3[3]
  17. Missmatch one fault (stuck-at-0) from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6165 maps to U_CPU/U_CTR/alu_src_3[2]
  18. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6166 maps to U_CPU/U_CTR/alu_src_3[1]
  19. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6167 maps to U_CPU/U_CTR/alu_src_3[0]
  20. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6176 maps to U_CPU/U_CTR/reg_cy
  21. Missmatch both faults from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6192 maps to U_CPU/U_CTR/reg_op2[7]
  22. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_op2[7] to U_CPU/U_CTR/n6200 maps to U_CPU/U_CTR/reg_pc_15_11[4]
  23. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_ov to U_CPU/U_CTR/n6108 maps to U_CPU/U_CTR/ram_out_data[2]
  24. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_ov to U_CPU/U_CTR/n6181 maps to U_CPU/U_CTR/reg_ov
  25. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_pc_15_11[2] to U_CPU/U_CTR/n6105 maps to U_CPU/U_CTR/ram_out_data[5]
  26. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_pc_15_11[2] to U_CPU/U_CTR/n6154 maps to U_CPU/U_CTR/alu_src_2[5]
  27. Missmatch one fault (stuck-at-1) from register U_CPU/U_CTR/reg_pc_15_11[2] to U_CPU/U_CTR/n6202 maps to U_CPU/U_CTR/reg_pc_15_11[2]
  28.  
  29. Mismatch per input:
  30.  
  31. U_CPU/U_CTR/reg_op2[7]
  32. stuck-at-0 : 8
  33. stuck-at-1 : 13
  34.  
  35. U_CPU/U_CTR/reg_ov
  36. stuck-at-0 : 0
  37. stuck-at-1 : 2
  38.  
  39. U_CPU/U_CTR/reg_pc_15_11[2]
  40. stuck-at-0 : 0
  41. stuck-at-1 : 3
  42.  
  43.  
  44. Total single fault missmatch: 12
  45. Total both faults missmatch: 7
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