module D_FF(q, d, clk, reset);
    output q;
    input d, clk, reset;
    reg q;
    always @(posedge reset or negedge clk)
        if(reset) q <= 1'b0;
        else q <= d;
endmodule

module JK_FF(q, j, k, clk, reset); //requires D_FF
    output q;
    input j, k, clk, reset;
    wire qn, kn, jqn, knq, d;

    not notq(qn, q);
    not notk(kn, k);

    and andjqn(jqn, j, qn);
    and andknq(knq, kn, q);

    or ord(d, jqn, knq);

    D_FF dff(q, d, clk, reset);
endmodule

module T_FF(q, t, clk, reset); //requires T_FF
    output q;
    input t, clk, reset;

    JK_FF jkff(q, t, t, clk, reset);
endmodule

module counter(q, x, clk, reset);
    output[2:0] q;
    input x;
    input clk, reset;

    wire q0n, q1n, xn;
    not not0(q0n, q[0]);
    not not1(q1n, q[1]);
    not notx(xn, x);

    wire t1, t2;

    wire t21, t22;

    xor xort1(t1, x, q[0]);

    and andt21(t21, xn, q[1], q[0]);
    and andt22(t22, x, q0n, q1n);
    or ort2(t2, t21, t22);

    T_FF tff0(q[0], 1'b1, clk, reset);
    T_FF tff1(q[1], t1, clk, reset);
    T_FF tff2(q[2], t2, clk, reset);
endmodule