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- # (c) Altera
- # Setup USB hardware - assumes only USB Blaster is installed and
- # and FPGA is the only device in the JTAG chain
- set usb [lindex [get_hardware_names] 0]
- set device_name [lindex [get_device_name -hardware_name $usb] 0]
- # write procedure : argument value is integer
- proc write (value) {
- global device_name usb
- variable full
- start_insystem_source_probe -device_name $device_name -hardware-name $usb
- # read full flag
- set full [read_probe_data -instance_index 0]
- if {$full == 1} {end_insystem_source_probe
- return "Write Buffer Full"
- }
- # toggle select line, drive value onto port, toggle enable
- # bits 7:0 of instance 0 is S_data[7:0]; bit 8 = S_write_reg;
- # bit 9 = Source_write_sel
- # int2bits is custom procedure that returns a bitstring from an integer argument
- write_source_data -instance_index 0 -value [int2bit [expr 0x200 | $value]]
- write_source_data -instance_index 0 -value [int2bit [expr 0x200 | $value]]
- # clear transaction
- write_source_data -instance_index 0 -value 0
- end_insystem_source_probe
- }
- proc read {} {
- global device_name usb
- variable empty
- start_insystem_source_probe -device_name $device_name -hardware_name $usb
- # read empty flag : probe port [7:0] reads FIFO output; bit 8 reads empty_flag
- set empty [read_probe_data -instance_index 1]
- if {[regexp {1........} $empty}} {end_insystem_source_probe
- return "FIFO empty" }
- # toggle select line for read transaction
- # Source_read_sel = bit 0; s_read_reg = bit 1
- # pulse read enable on DC FIFO
- write_source_data -instance_index 1 -value 0x1 -value_in_hex
- write_source_data -instance_index 1 -value 0x3 -value_in_hex
- set x [read_probe_data -instance_index 1]
- end_insystem_source_probe
- return $x
- }
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