Advertisement
Chinnani

Untitled

Mar 31st, 2016
742
0
Never
Not a member of Pastebin yet? Sign Up, it unlocks many cool features!
text 1.76 KB | None | 0 0
  1. module TwoPButterfly( input wire en, input wire clk, input wire [63:0]inr1,ini1,inr2,ini2,
  2. output reg [63:0]outr1,outi1,outr2,outi2);
  3.  
  4. add_sub adder1(en,clk,inr1[63],inr2[63],inr1[62:52],inr2[62:52],inr1[51:0],inr2[51:0],1'b0,outr1[63],outr1[62:52],outr1[51:0]);
  5. add_sub adder2(en,clk,ini1[63],ini2[63],ini1[62:52],ini2[62:52],ini1[51:0],ini2[51:0],1'b0,outi1[63],outi1[62:52],outi1[51:0]);
  6.  
  7. add_sub subtractor1(en,clk,inr1[63],inr2[63],inr1[62:52],inr2[62:52],inr1[51:0],inr2[51:0],1'b1,outr2[63],outr2[62:52],outr2[51:0]);
  8. add_sub subtractor2(en,clk,ini1[63],ini2[63],ini1[62:52],ini2[62:52],ini1[51:0],ini2[51:0],1'b1,outi2[63],outi2[62:52],outi2[51:0]);
  9.  
  10. endmodule
  11.  
  12. ----------------------------
  13. module add_sub(input wire en, input wire clk, input wire S1,S2,
  14. input wire[10:0]E1, input wire [10:0]E2,
  15. input wire[51:0]F1,input wire [51:0]F2,
  16. input wire aors,
  17. output reg S,output reg[10:0]E,output reg[51:0]F);
  18. ....
  19. ....// ieee - 754 format adder/subtractor code which is working fine
  20. ....
  21.  
  22. endmodule
  23.  
  24. ---------------------------
  25. //testbench
  26.  
  27. module TwoPButterfly_tb;
  28.  
  29. reg en,clk;
  30. reg [63:0]inr1,ini1,inr2,ini2;
  31. wire [63:0]outr1,outi1,outr2,outi2;
  32.  
  33. TwoPButterfly T1(en,clk,inr1,ini1,inr2,ini2,outr1,outi1,outr2,outi2);
  34. always #5 clk <= ~clk;
  35.  
  36. initial
  37. begin
  38. clk = 1'b0;
  39. en = 1'b1;
  40.  
  41. #4
  42. // 7+7i , 6+6i
  43. inr1 <= 64'b0100000000011100000000000000000000000000000000000000000000000000;
  44. ini1 <= 64'b0100000000011100000000000000000000000000000000000000000000000000;
  45. inr2 <= 64'b0100000000011000000000000000000000000000000000000000000000000000;
  46. ini2 <= 64'b0100000000011000000000000000000000000000000000000000000000000000;
  47. end
  48. endmodule
Advertisement
Add Comment
Please, Sign In to add comment
Advertisement