Not a member of Pastebin yet?
Sign Up,
it unlocks many cool features!
- transition : process (currentState, writeEnable, bitCounter)
- begin
- case currentState is
- when IDLE =>
- if writeEnable = '1' then
- nextState <= START_BIT;
- else
- nextState <= IDLE;
- end if;
- when START_BIT =>
- nextState <= DATA_BIT;
- when DATA_BIT =>
- if bitCounter = 0 then
- nextState <= STOP_BIT;
- else
- nextState <= DATA_BIT;
- end if;
- when STOP_BIT =>
- nextState <= IDLE;
- when others =>
- nextState <= IDLE;
- end case;
- end process;
- stateMemory : process (baudClock)
- begin
- if rising_edge(baudClock) then
- if reset='1' then
- currentState <= IDLE;
- else
- currentState <= nextState;
- end if;
- end if;
- end process;
- outputs : process (currentState, bitCounter)
- begin
- case currentState is
- when IDLE =>
- txReady <= '1';
- txData <= '1';
- when START_BIT =>
- txReady <= '0';
- txData <= '0';
- when DATA_BIT =>
- txReady <= '0';
- txData <= txReg(0);
- when STOP_BIT =>
- txReady <= '0';
- txData <= '1';
- end case;
- end process;
- -- shift register
- shiftRegister : process (baudClock, reset)
- begin
- if reset = '1' then
- txReg <= (others => '0');
- elsif rising_edge(baudClock) then
- if currentState = DATA_BIT then
- txReg <= '0' & txReg(7 downto 1);
- else
- txReg <= writeData;
- end if;
- end if;
- end process;
- -- bit counter
- baudCount : process (baudClock, reset)
- begin
- if reset = '1' then
- bitCounter <= 7;
- elsif rising_edge(baudClock) then
- if currentState = DATA_BIT then
- if bitCounter > 0 then
- bitCounter <= bitCounter - 1;
- else
- bitCounter <= 0;
- end if;
- else
- bitCounter <= 7;
- end if;
- end if;
- end process;
Advertisement
Add Comment
Please, Sign In to add comment