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- diff --git a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
- index 21cac7b..769ec4d 100644
- --- a/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
- +++ b/arch/arm/cpu/arm926ejs/mxs/spl_power_init.c
- @@ -30,6 +30,60 @@
- #include "mxs_init.h"
- +/* Enable the following if you only have a VDD5V source only and no DCDC_BATT
- + * source. This includes configurations with and without a supercap on the
- + * BATTERY pin as * shown in the i.MX28 reference schematic (applies to
- + * i.MX233 as well).
- + *
- + * NOTE: If both a DCDC_BATT and VDD5V source are present, this is not meant to
- + * select which one to use. This is only for hardware configurations this no
- + * DCDC_BATT power source.
- +*/
- +#define NO_DCDC_BATT_SOURCE
- +
- +/* Enable the following if you only have a DCDC_BATT source only and no V
- + * This includes configurations with and without a supercap on the BATTERY pin as
- + * shown in the i.MX28 reference schematic (applies to i.MX233 as well).
- + *
- + * NOTE: If both a DCDC_BATT and VDD5V source are present, this is not meant to
- + * select which one to use. This is only for hardware configurations this no
- + * VDD5V power source.
- +*/
- +//#define NO_VDD5V_SOURCE
- +
- +
- +/* We need to protect the DCDC from trying to source charge
- + * from too low of a voltage. This limit is given in
- + * the characteristics and specifications section of the
- + * reference manual for i.MX233 and in the datasheet
- + * for i.MX28x. Also, we want to stop sourcing
- + * charge from the battery before the battery's internal
- + * protection circuitry may activate which would then cause
- + * us to lose RTC time. By default, we will use 3.0V as the
- + * battery's maximum voltage that may cause it's undervoltage protection
- + * circuitry to activate.
- + */
- +#ifdef CONFIG_MX28
- +/*
- + * The minimum DCDC operating voltage for i.MX28 with loading is 3.3V.
- + * we will set the BRWNOUT_LVL bitfield the 3.2V value for 0.1V margin.
- + */
- +#define BATTERY_BRWNOUT_BITFIELD_VALUE 20 /* 20 = 3.2V */
- +#else
- +/*
- + * At the time of this writing,
- + * 3V is greater than the minimum DCDC operating voltage for i.MX233
- + * as listed in by the "Battery / DCDC Input Voltage" parameter listed
- + * in the reference manual so we will set the BRWNOUT_LVL bitfield to 3V value.
- + */
- +#define BATTERY_BRWNOUT_BITFIELD_VALUE 15 /* 15 = 3.0V */
- +#endif
- +
- +/* if you accidentally define both, don't allow a successful compile. */
- +#if defined(NO_DCDC_BATT_SOURCE) && defined(NO_VDD5V_SOURCE)
- +#error Invalid power source configuration.
- +#endif
- +
- static void mxs_power_clock2xtal(void)
- {
- struct mxs_clkctrl_regs *clkctrl_regs =
- @@ -48,8 +102,13 @@ static void mxs_power_clock2pll(void)
- setbits_le32(&clkctrl_regs->hw_clkctrl_pll0ctrl0,
- CLKCTRL_PLL0CTRL0_POWER);
- early_delay(100);
- +
- +
- setbits_le32(&clkctrl_regs->hw_clkctrl_clkseq,
- CLKCTRL_CLKSEQ_BYPASS_CPU);
- +
- + //clrbits_le32(&clkctrl_regs->hw_clkctrl_clkseq,
- + // CLKCTRL_CLKSEQ_BYPASS_CPU);
- }
- static void mxs_power_clear_auto_restart(void)
- @@ -64,7 +123,7 @@ static void mxs_power_clear_auto_restart(void)
- writel(RTC_CTRL_CLKGATE, &rtc_regs->hw_rtc_ctrl_clr);
- while (readl(&rtc_regs->hw_rtc_ctrl) & RTC_CTRL_CLKGATE)
- ;
- -
- + #if 0
- /*
- * Due to the hardware design bug of mx28 EVK-A
- * we need to set the AUTO_RESTART bit.
- @@ -83,6 +142,7 @@ static void mxs_power_clear_auto_restart(void)
- ;
- while (readl(&rtc_regs->hw_rtc_stat) & RTC_STAT_STALE_REGS_MASK)
- ;
- + #endif
- }
- static void mxs_power_set_linreg(void)
- @@ -217,11 +277,18 @@ static void mxs_power_init_4p2_params(void)
- POWER_5VCTRL_HEADROOM_ADJ_MASK,
- 0x4 << POWER_5VCTRL_HEADROOM_ADJ_OFFSET);
- +#ifdef NO_DCDC_BATT_SOURCE
- +/* don't use the DCDC_BATT source if configured not to */
- + clrsetbits_le32(&power_regs->hw_power_dcdc4p2,
- + POWER_DCDC4P2_DROPOUT_CTRL_MASK,
- + POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL);
- +#else
- clrsetbits_le32(&power_regs->hw_power_dcdc4p2,
- POWER_DCDC4P2_DROPOUT_CTRL_MASK,
- POWER_DCDC4P2_DROPOUT_CTRL_100MV |
- POWER_DCDC4P2_DROPOUT_CTRL_SRC_SEL);
- -
- +#endif
- +
- clrsetbits_le32(&power_regs->hw_power_5vctrl,
- POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK,
- 0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
- @@ -376,7 +443,20 @@ static void mxs_power_init_4p2_regulator(void)
- POWER_DCDC4P2_BO_MASK,
- 22 << POWER_DCDC4P2_BO_OFFSET); /* 4.15V */
- - if (!(readl(&power_regs->hw_power_sts) & POWER_STS_DCDC_4P2_BO)) {
- + tmp = (readl(&power_regs->hw_power_5vctrl) &
- + POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK) >>
- + POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET;
- + while (tmp < 0x3f) {
- + tmp++;
- + tmp2 = readl(&power_regs->hw_power_5vctrl);
- + tmp2 &= ~POWER_5VCTRL_CHARGE_4P2_ILIMIT_MASK;
- + tmp2 |= tmp <<
- + POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET;
- + writel(tmp2, &power_regs->hw_power_5vctrl);
- + early_delay(100);
- + }
- +
- +/* if (!(readl(&power_regs->hw_power_sts) & POWER_STS_DCDC_4P2_BO)) {
- setbits_le32(&power_regs->hw_power_5vctrl,
- 0x3f << POWER_5VCTRL_CHARGE_4P2_ILIMIT_OFFSET);
- } else {
- @@ -402,7 +482,7 @@ static void mxs_power_init_4p2_regulator(void)
- }
- }
- }
- -
- +*/
- clrbits_le32(&power_regs->hw_power_dcdc4p2, POWER_DCDC4P2_BO_MASK);
- writel(POWER_CTRL_DCDC4P2_BO_IRQ, &power_regs->hw_power_ctrl_clr);
- }
- @@ -412,11 +492,11 @@ static void mxs_power_init_dcdc_4p2_source(void)
- struct mxs_power_regs *power_regs =
- (struct mxs_power_regs *)MXS_POWER_BASE;
- - if (!(readl(&power_regs->hw_power_dcdc4p2) &
- + /*if (!(readl(&power_regs->hw_power_dcdc4p2) &
- POWER_DCDC4P2_ENABLE_DCDC)) {
- hang();
- - }
- -
- + }*/
- + debug_printf("mxs_power_init_dcdc_4p2_source \r\n");
- mxs_enable_4p2_dcdc_input(1);
- if (readl(&power_regs->hw_power_ctrl) & POWER_CTRL_VBUS_VALID_IRQ) {
- @@ -631,7 +711,7 @@ static void mxs_init_batt_bo(void)
- /* Brownout at 3V */
- clrsetbits_le32(&power_regs->hw_power_battmonitor,
- POWER_BATTMONITOR_BRWNOUT_LVL_MASK,
- - 15 << POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET);
- + BATTERY_BRWNOUT_BITFIELD_VALUE << POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET);
- writel(POWER_CTRL_BATT_BO_IRQ, &power_regs->hw_power_ctrl_clr);
- writel(POWER_CTRL_ENIRQ_BATT_BO, &power_regs->hw_power_ctrl_clr);
- @@ -654,6 +734,8 @@ static void mxs_switch_vddd_to_dcdc_source(void)
- static void mxs_power_configure_power_source(void)
- {
- int batt_ready, batt_good;
- + struct mxs_rtc_regs *rtc_regs =
- + (struct mxs_rtc_regs *)MXS_RTC_BASE;
- struct mxs_power_regs *power_regs =
- (struct mxs_power_regs *)MXS_POWER_BASE;
- struct mxs_lradc_regs *lradc_regs =
- @@ -661,6 +743,58 @@ static void mxs_power_configure_power_source(void)
- mxs_src_power_init();
- +#ifdef NO_DCDC_BATT_SOURCE
- + /* device configured for no source to DCDC_BATT input (5V only power
- + * source). This boot option doesn't waste time looking for a good
- + * battery. Battery powered operation and automatic voltage
- + * measurements are disabled.
- + */
- + // bit 11 of PERSISTENT1
- + setbits_le32(&rtc_regs->hw_rtc_persistent1, RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER);
- +
- + debug_printf("\r\nConfigured for 5v only power source.\
- + Battery powered operation disabled.\r\n");
- +
- + /* Disable automatic battery voltage measurements which seem unnecessary
- + * for this configuration.
- + */
- + setbits_le32(&power_regs->hw_power_battmonitor, POWER_BATTMONITOR_EN_BATADJ);
- + writel(LRADC_CONVERSION_AUTOMATIC, &lradc_regs->hw_lradc_conversion_clr);
- + writel(525 << POWER_BATTMONITOR_BATT_VAL_OFFSET, &power_regs->hw_power_battmonitor);
- +
- +
- + clrsetbits_le32(&power_regs->hw_power_battmonitor,
- + POWER_BATTMONITOR_BRWNOUT_LVL_MASK,
- + BATTERY_BRWNOUT_BITFIELD_VALUE << POWER_BATTMONITOR_BRWNOUT_LVL_OFFSET);
- +
- + mxs_5v_boot();
- +
- +//#ifndef MXS_VBUS_CURRENT_DRAW
- + mxs_power_clock2pll();
- +//#endif
- +
- +#elif defined(NO_VDD5V_SOURCE)
- + printf("\r\nConfigured for DCDC_BATT only power source.\r\n");
- +
- +#ifdef CONFIG_MX28
- + /* We only care about the DCDC_BATT source in this configuration */
- + setbits_le32(&power_regs->hw_power_battmonitor,
- + POWER_BATTMONITOR_PWDN_BATTBRNOUT_5VDETECT_EN);
- +#endif
- +
- + clrbits_le32(&rtc_regs->hw_rtc_persistent1, RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER);
- +
- + mxs_batt_boot();
- + mxs_power_clock2pll();
- +
- + mxs_init_batt_bo();
- +
- + /* Configured to not use a VDD5V source */
- + setbits_le32(&power_regs->hw_power_5vctrl, POWER_5VCTRL_ILIMIT_EQ_ZERO);
- +#else
- +
- + clrbits_le32(&rtc_regs->hw_rtc_persistent1, RTC_PERSISTENT1_GENERAL_USB_BOOT_PLAYER);
- +
- if (readl(&power_regs->hw_power_sts) & POWER_STS_VDD5V_GT_VDDIO) {
- batt_ready = mxs_is_batt_ready();
- if (batt_ready) {
- @@ -686,6 +820,8 @@ static void mxs_power_configure_power_source(void)
- mxs_init_batt_bo();
- +#endif /* #ifdef NO_DCDC_BATT_SOURCE */
- +
- mxs_switch_vddd_to_dcdc_source();
- #ifdef CONFIG_MX23
- @@ -937,9 +1073,9 @@ void mxs_power_init(void)
- mxs_enable_output_rail_protection();
- mxs_power_set_vddx(&mxs_vddio_cfg, 3300, 3150);
- - mxs_power_set_vddx(&mxs_vddd_cfg, 1500, 1000);
- + mxs_power_set_vddx(&mxs_vddd_cfg, 1350, 1200);
- #ifdef CONFIG_MX23
- - mxs_power_set_vddx(&mxs_vddmem_cfg, 2500, 1700);
- + mxs_power_set_vddx(&mxs_vddmem_cfg, 3300, 3150);
- #endif
- writel(POWER_CTRL_VDDD_BO_IRQ | POWER_CTRL_VDDA_BO_IRQ |
- POWER_CTRL_VDDIO_BO_IRQ | POWER_CTRL_VDD5V_DROOP_IRQ |
- @@ -948,6 +1084,18 @@ void mxs_power_init(void)
- writel(POWER_5VCTRL_PWDN_5VBRNOUT, &power_regs->hw_power_5vctrl_set);
- +#if defined(NO_DCDC_BATT_SOURCE) && defined(CONFIG_MX28)
- + /* On i.MX28, a new bit has been added to allow automatic hardware
- + * shutdown if VDD4P2 browns out. If we permanently only have a VDD5V
- + * source, we want to enable this bit. For devices with dead batteries,
- + * we could also temporarily set this bit until the kernel battery
- + * charger sufficiently charges the battery but we won't do this for
- + * now as the latest release kernel versions aren't aware of it
- + * and thus don't handle the proper setting/clearing of this bit.
- + */
- + writel(1<<7, &power_regs->hw_power_refctrl);
- +#endif
- +
- early_delay(1000);
- }
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