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  1. Open On-Chip Debugger 0.10.0-dev-00273-g394abef (2016-11-24-15:12)
  2. Licensed under GNU GPL v2
  3. For bug reports, read
  4. http://openocd.org/doc/doxygen/bugs.html
  5. User : 13 1 command.c:546 command_print(): debug_level: 3
  6. Debug: 14 1 options.c:98 add_default_dirs(): bindir=/src/staging/linux64/bin
  7. Debug: 15 1 options.c:99 add_default_dirs(): pkgdatadir=/src/staging/linux64/share/openocd
  8. Debug: 16 1 options.c:100 add_default_dirs(): run_prefix=
  9. Debug: 17 1 configuration.c:44 add_script_search_dir(): adding /src/staging/linux64/share/openocd/site
  10. Debug: 18 1 configuration.c:44 add_script_search_dir(): adding /src/staging/linux64/share/openocd/scripts
  11. Debug: 19 1 configuration.c:84 find_file(): found stm32f0_blinky.cfg
  12. Debug: 20 1 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/interface/stlink-v2.cfg
  13. Debug: 21 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_interface hla
  14. Debug: 22 1 command.c:145 script_debug(): command - interface ocd_interface hla
  15. Debug: 24 1 command.c:366 register_command_handler(): registering 'ocd_hla_device_desc'...
  16. Debug: 25 1 command.c:366 register_command_handler(): registering 'ocd_hla_serial'...
  17. Debug: 26 1 command.c:366 register_command_handler(): registering 'ocd_hla_layout'...
  18. Debug: 27 1 command.c:366 register_command_handler(): registering 'ocd_hla_vid_pid'...
  19. Debug: 28 1 command.c:366 register_command_handler(): registering 'ocd_hla_command'...
  20. Debug: 29 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_layout stlink
  21. Debug: 30 1 command.c:145 script_debug(): command - hla_layout ocd_hla_layout stlink
  22. Debug: 32 1 hla_interface.c:241 hl_interface_handle_layout_command(): hl_interface_handle_layout_command
  23. Debug: 33 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_device_desc ST-LINK/V2
  24. Debug: 34 1 command.c:145 script_debug(): command - hla_device_desc ocd_hla_device_desc ST-LINK/V2
  25. Debug: 36 1 hla_interface.c:215 hl_interface_handle_device_desc_command(): hl_interface_handle_device_desc_command
  26. Debug: 37 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla_vid_pid 0x0483 0x3748
  27. Debug: 38 1 command.c:145 script_debug(): command - hla_vid_pid ocd_hla_vid_pid 0x0483 0x3748
  28. Debug: 40 1 hla_interface.c:269 hl_interface_handle_vid_pid_command(): hl_interface_handle_vid_pid_command
  29. Debug: 41 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select hla_swd
  30. Debug: 42 1 command.c:145 script_debug(): command - ocd_transport ocd_transport select hla_swd
  31. Debug: 43 1 hla_transport.c:193 hl_transport_select(): hl_transport_select
  32. Debug: 44 1 command.c:366 register_command_handler(): registering 'ocd_hla'...
  33. Debug: 45 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  34. Debug: 46 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  35. Debug: 47 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  36. Debug: 48 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  37. Debug: 49 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  38. Debug: 50 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  39. Debug: 51 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  40. Debug: 52 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  41. Debug: 53 1 command.c:366 register_command_handler(): registering 'ocd_jtag'...
  42. Debug: 54 1 command.c:366 register_command_handler(): registering 'ocd_jtag_ntrst_delay'...
  43. Debug: 55 1 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/target/stm32f0x_stlink.cfg
  44. Debug: 56 1 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/target/stm32f0x.cfg
  45. Debug: 57 1 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/target/swj-dp.tcl
  46. Debug: 58 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  47. Debug: 59 1 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  48. Debug: 60 1 configuration.c:84 find_file(): found /home/markus/Ac6/SystemWorkbench/plugins/fr.ac6.mcu.debug_1.11.2.201612060912/resources/openocd/scripts/mem_helper.tcl
  49. Debug: 61 1 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mrw address
  50. Debug: 62 1 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mrw address
  51. Debug: 64 1 command.c:1100 help_add_command(): added 'mrw' help text
  52. Debug: 65 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mrw Returns value of word in memory.
  53. Debug: 66 2 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mrw Returns value of word in memory.
  54. Debug: 68 2 command.c:1113 help_add_command(): added 'mrw' help text
  55. Debug: 69 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_usage_text mmw address setbits clearbits
  56. Debug: 70 2 command.c:145 script_debug(): command - add_usage_text ocd_add_usage_text mmw address setbits clearbits
  57. Debug: 72 2 command.c:1100 help_add_command(): added 'mmw' help text
  58. Debug: 73 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
  59. Debug: 74 2 command.c:145 script_debug(): command - add_help_text ocd_add_help_text mmw Modify word in memory. new_val = (old_val & ~clearbits) | setbits;
  60. Debug: 76 2 command.c:1113 help_add_command(): added 'mmw' help text
  61. Debug: 77 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  62. Debug: 78 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  63. Debug: 79 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  64. Debug: 80 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  65. Debug: 81 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  66. Debug: 82 2 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  67. Debug: 83 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_hla newtap stm32f0x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x0bb11477
  68. Debug: 84 2 command.c:145 script_debug(): command - ocd_hla ocd_hla newtap stm32f0x cpu -irlen 4 -ircapture 0x1 -irmask 0xf -expected-id 0x0bb11477
  69. Debug: 85 2 hla_tcl.c:118 jim_hl_newtap_cmd(): Creating New Tap, Chip: stm32f0x, Tap: cpu, Dotted: stm32f0x.cpu, 8 params
  70. Debug: 86 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irlen
  71. Debug: 87 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -ircapture
  72. Debug: 88 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -irmask
  73. Debug: 89 2 hla_tcl.c:128 jim_hl_newtap_cmd(): Processing option: -expected-id
  74. Debug: 90 2 core.c:1306 jtag_tap_init(): Created Tap: stm32f0x.cpu @ abs position 0, irlen 0, capture: 0x0 mask: 0x0
  75. Debug: 91 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target create stm32f0x.cpu cortex_m -endian little -chain-position stm32f0x.cpu
  76. Debug: 92 2 command.c:145 script_debug(): command - ocd_target ocd_target create stm32f0x.cpu cortex_m -endian little -chain-position stm32f0x.cpu
  77. Info : 93 2 target.c:5223 target_create(): The selected transport took over low-level target control. The results might differ compared to plain JTAG/SWD
  78. Debug: 94 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  79. Debug: 95 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  80. Debug: 96 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  81. Debug: 97 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  82. Debug: 98 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  83. Debug: 99 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  84. Debug: 100 2 command.c:366 register_command_handler(): registering 'ocd_arm'...
  85. Debug: 101 2 command.c:366 register_command_handler(): registering 'ocd_tpiu'...
  86. Debug: 102 2 command.c:366 register_command_handler(): registering 'ocd_itm'...
  87. Debug: 103 2 command.c:366 register_command_handler(): registering 'ocd_itm'...
  88. Debug: 104 2 hla_target.c:353 adapter_target_create(): adapter_target_create
  89. Debug: 105 2 hla_target.c:324 adapter_init_arch_info(): adapter_init_arch_info
  90. Debug: 106 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  91. Debug: 107 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  92. Debug: 108 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  93. Debug: 109 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  94. Debug: 110 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  95. Debug: 111 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  96. Debug: 112 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  97. Debug: 113 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  98. Debug: 114 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  99. Debug: 115 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  100. Debug: 116 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  101. Debug: 117 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  102. Debug: 118 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  103. Debug: 119 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  104. Debug: 120 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  105. Debug: 121 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  106. Debug: 122 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  107. Debug: 123 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  108. Debug: 124 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  109. Debug: 125 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  110. Debug: 126 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  111. Debug: 127 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  112. Debug: 128 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  113. Debug: 129 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  114. Debug: 130 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  115. Debug: 131 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  116. Debug: 132 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  117. Debug: 133 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  118. Debug: 134 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  119. Debug: 135 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  120. Debug: 136 2 command.c:366 register_command_handler(): registering 'ocd_stm32f0x.cpu'...
  121. Debug: 137 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
  122. Debug: 138 2 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -work-area-phys 0x20000000 -work-area-size 0x1000 -work-area-backup 0
  123. Debug: 139 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  124. Debug: 140 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  125. Debug: 141 2 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  126. Debug: 142 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash bank stm32f0x.flash stm32f1x 0x08000000 0 0 0 stm32f0x.cpu
  127. Debug: 143 2 command.c:145 script_debug(): command - ocd_flash ocd_flash bank stm32f0x.flash stm32f1x 0x08000000 0 0 0 stm32f0x.cpu
  128. Debug: 145 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  129. Debug: 146 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  130. Debug: 147 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  131. Debug: 148 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  132. Debug: 149 2 command.c:366 register_command_handler(): registering 'ocd_stm32f1x'...
  133. Debug: 150 2 tcl.c:1031 handle_flash_bank_command(): 'stm32f1x' driver usage field missing
  134. Debug: 151 2 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
  135. Debug: 152 3 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1000
  136. Debug: 154 3 core.c:1633 jtag_config_khz(): handle jtag khz
  137. Debug: 155 3 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  138. Debug: 156 3 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  139. User : 157 3 command.c:546 command_print(): adapter speed: 1000 kHz
  140. Debug: 158 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_nsrst_delay 100
  141. Debug: 159 3 command.c:145 script_debug(): command - adapter_nsrst_delay ocd_adapter_nsrst_delay 100
  142. User : 161 3 command.c:546 command_print(): adapter_nsrst_delay: 100
  143. Debug: 162 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only srst_nogate connect_assert_srst
  144. Debug: 163 3 command.c:145 script_debug(): command - reset_config ocd_reset_config srst_only srst_nogate connect_assert_srst
  145. User : 165 3 command.c:546 command_print(): srst_only separate srst_nogate srst_open_drain connect_assert_srst
  146. Debug: 166 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  147. Debug: 167 3 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  148. Debug: 168 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event gdb-attach
  149. # Needed to be able to use the connect_assert_srst in reset_config
  150. # otherwise, can't read device id
  151. reset init
  152.  
  153. Debug: 169 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event gdb-attach
  154. # Needed to be able to use the connect_assert_srst in reset_config
  155. # otherwise, can't read device id
  156. reset init
  157.  
  158. Debug: 170 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event examine-end stm32f0x_default_examine_end
  159. Debug: 171 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event examine-end stm32f0x_default_examine_end
  160. Debug: 172 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event reset-start stm32f0x_default_reset_start
  161. Debug: 173 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event reset-start stm32f0x_default_reset_start
  162. Debug: 174 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event reset-init stm32f0x_default_reset_init
  163. Debug: 175 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event reset-init stm32f0x_default_reset_init
  164. Debug: 176 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset_config srst_only srst_nogate
  165. Debug: 177 3 command.c:145 script_debug(): command - reset_config ocd_reset_config srst_only srst_nogate
  166. User : 179 3 command.c:546 command_print(): srst_only separate srst_nogate srst_open_drain connect_assert_srst
  167. Debug: 180 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_gdb_port 3333
  168. Debug: 181 3 command.c:145 script_debug(): command - gdb_port ocd_gdb_port 3333
  169. Debug: 183 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_init
  170. Debug: 184 3 command.c:145 script_debug(): command - init ocd_init
  171. Debug: 186 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target init
  172. Debug: 187 3 command.c:145 script_debug(): command - ocd_target ocd_target init
  173. Debug: 189 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
  174. Debug: 190 3 command.c:145 script_debug(): command - ocd_target ocd_target names
  175. Debug: 191 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu cget -event gdb-flash-erase-start
  176. Debug: 192 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu cget -event gdb-flash-erase-start
  177. Debug: 193 3 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event gdb-flash-erase-start reset init
  178. Debug: 194 3 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event gdb-flash-erase-start reset init
  179. Debug: 195 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu cget -event gdb-flash-write-end
  180. Debug: 196 4 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu cget -event gdb-flash-write-end
  181. Debug: 197 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu configure -event gdb-flash-write-end reset halt
  182. Debug: 198 4 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu configure -event gdb-flash-write-end reset halt
  183. Debug: 199 4 target.c:1308 handle_target_init_command(): Initializing targets...
  184. Debug: 200 4 hla_target.c:343 adapter_init_target(): adapter_init_target
  185. Debug: 201 4 command.c:366 register_command_handler(): registering 'ocd_target_request'...
  186. Debug: 202 4 command.c:366 register_command_handler(): registering 'ocd_trace'...
  187. Debug: 203 4 command.c:366 register_command_handler(): registering 'ocd_trace'...
  188. Debug: 204 4 command.c:366 register_command_handler(): registering 'ocd_fast_load_image'...
  189. Debug: 205 4 command.c:366 register_command_handler(): registering 'ocd_fast_load'...
  190. Debug: 206 4 command.c:366 register_command_handler(): registering 'ocd_profile'...
  191. Debug: 207 4 command.c:366 register_command_handler(): registering 'ocd_virt2phys'...
  192. Debug: 208 4 command.c:366 register_command_handler(): registering 'ocd_reg'...
  193. Debug: 209 4 command.c:366 register_command_handler(): registering 'ocd_poll'...
  194. Debug: 210 4 command.c:366 register_command_handler(): registering 'ocd_wait_halt'...
  195. Debug: 211 4 command.c:366 register_command_handler(): registering 'ocd_halt'...
  196. Debug: 212 4 command.c:366 register_command_handler(): registering 'ocd_resume'...
  197. Debug: 213 4 command.c:366 register_command_handler(): registering 'ocd_reset'...
  198. Debug: 214 4 command.c:366 register_command_handler(): registering 'ocd_soft_reset_halt'...
  199. Debug: 215 4 command.c:366 register_command_handler(): registering 'ocd_step'...
  200. Debug: 216 4 command.c:366 register_command_handler(): registering 'ocd_mdw'...
  201. Debug: 217 4 command.c:366 register_command_handler(): registering 'ocd_mdh'...
  202. Debug: 218 4 command.c:366 register_command_handler(): registering 'ocd_mdb'...
  203. Debug: 219 4 command.c:366 register_command_handler(): registering 'ocd_mww'...
  204. Debug: 220 4 command.c:366 register_command_handler(): registering 'ocd_mwh'...
  205. Debug: 221 4 command.c:366 register_command_handler(): registering 'ocd_mwb'...
  206. Debug: 222 4 command.c:366 register_command_handler(): registering 'ocd_bp'...
  207. Debug: 223 4 command.c:366 register_command_handler(): registering 'ocd_rbp'...
  208. Debug: 224 4 command.c:366 register_command_handler(): registering 'ocd_wp'...
  209. Debug: 225 4 command.c:366 register_command_handler(): registering 'ocd_rwp'...
  210. Debug: 226 4 command.c:366 register_command_handler(): registering 'ocd_load_image'...
  211. Debug: 227 4 command.c:366 register_command_handler(): registering 'ocd_dump_image'...
  212. Debug: 228 4 command.c:366 register_command_handler(): registering 'ocd_verify_image'...
  213. Debug: 229 4 command.c:366 register_command_handler(): registering 'ocd_test_image'...
  214. Debug: 230 4 command.c:366 register_command_handler(): registering 'ocd_reset_nag'...
  215. Debug: 231 4 command.c:366 register_command_handler(): registering 'ocd_ps'...
  216. Debug: 232 4 command.c:366 register_command_handler(): registering 'ocd_test_mem_access'...
  217. Debug: 233 4 hla_interface.c:111 hl_interface_init(): hl_interface_init
  218. Debug: 234 4 hla_layout.c:85 hl_layout_init(): hl_layout_init
  219. Debug: 235 4 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  220. Debug: 236 4 core.c:1603 adapter_khz_to_speed(): have interface set up
  221. Info : 237 4 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  222. Debug: 238 4 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  223. Debug: 239 4 core.c:1603 adapter_khz_to_speed(): have interface set up
  224. Info : 240 4 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  225. Info : 241 4 core.c:1388 adapter_init(): clock speed 950 kHz
  226. Debug: 242 4 openocd.c:137 handle_init_command(): Debug Adapter init complete
  227. Debug: 243 4 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport init
  228. Debug: 244 4 command.c:145 script_debug(): command - ocd_transport ocd_transport init
  229. Debug: 246 4 transport.c:240 handle_transport_init(): handle_transport_init
  230. Debug: 247 4 hla_transport.c:154 hl_transport_init(): hl_transport_init
  231. Debug: 248 4 hla_transport.c:171 hl_transport_init(): current transport hla_swd
  232. Debug: 249 4 hla_interface.c:44 hl_interface_open(): hl_interface_open
  233. Debug: 250 4 hla_layout.c:42 hl_layout_open(): hl_layout_open
  234. Debug: 251 4 stlink_usb.c:1698 stlink_usb_open(): stlink_usb_open
  235. Debug: 252 4 stlink_usb.c:1716 stlink_usb_open(): transport: 1 vid: 0x0483 pid: 0x3748 serial:
  236. Info : 253 7 stlink_usb.c:619 stlink_usb_version(): STLINK v2 JTAG v27 API v2 SWIM v6 VID 0x0483 PID 0x3748
  237. Info : 254 7 stlink_usb.c:1834 stlink_usb_open(): using stlink api v2
  238. Debug: 255 7 stlink_usb.c:818 stlink_usb_init_mode(): MODE: 0x02
  239. Info : 256 7 stlink_usb.c:651 stlink_usb_check_voltage(): Target voltage: 3.567957
  240. Debug: 257 7 stlink_usb.c:873 stlink_usb_init_mode(): MODE: 0x01
  241. Debug: 258 8 stlink_usb.c:899 stlink_usb_init_mode(): MODE: 0x02
  242. Debug: 259 8 stlink_usb.c:1849 stlink_usb_open(): Supported clock speeds are:
  243. Debug: 260 8 stlink_usb.c:1852 stlink_usb_open(): 4000 kHz
  244. Debug: 261 8 stlink_usb.c:1852 stlink_usb_open(): 1800 kHz
  245. Debug: 262 8 stlink_usb.c:1852 stlink_usb_open(): 1200 kHz
  246. Debug: 263 8 stlink_usb.c:1852 stlink_usb_open(): 950 kHz
  247. Debug: 264 8 stlink_usb.c:1852 stlink_usb_open(): 480 kHz
  248. Debug: 265 8 stlink_usb.c:1852 stlink_usb_open(): 240 kHz
  249. Debug: 266 8 stlink_usb.c:1852 stlink_usb_open(): 125 kHz
  250. Debug: 267 8 stlink_usb.c:1852 stlink_usb_open(): 100 kHz
  251. Debug: 268 8 stlink_usb.c:1852 stlink_usb_open(): 50 kHz
  252. Debug: 269 8 stlink_usb.c:1852 stlink_usb_open(): 25 kHz
  253. Debug: 270 8 stlink_usb.c:1852 stlink_usb_open(): 15 kHz
  254. Debug: 271 8 stlink_usb.c:1852 stlink_usb_open(): 5 kHz
  255. Debug: 272 8 stlink_usb.c:1872 stlink_usb_open(): Using TAR autoincrement: 1024
  256. Debug: 273 8 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  257. Debug: 274 8 core.c:727 jtag_add_reset(): SRST line asserted
  258. Debug: 275 8 core.c:755 jtag_add_reset(): TRST line released
  259. Debug: 276 8 core.c:329 jtag_call_event_callbacks(): jtag event: TAP reset
  260. Debug: 277 9 hla_interface.c:69 hl_interface_init_target(): hl_interface_init_target
  261. Debug: 278 9 stlink_usb.c:924 stlink_usb_idcode(): IDCODE: 0x0BB11477
  262. Debug: 279 9 openocd.c:150 handle_init_command(): Examining targets...
  263. Debug: 280 9 target.c:1501 target_call_event_callbacks(): target event 21 (examine-start)
  264. Debug: 281 9 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
  265. Debug: 282 9 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x410cc200
  266. Debug: 283 9 cortex_m.c:1933 cortex_m_examine(): Cortex-M0 r0p0 processor detected
  267. Debug: 284 9 cortex_m.c:1941 cortex_m_examine(): cpuid: 0x410cc200
  268. Debug: 285 9 target.c:2314 target_write_u32(): address: 0xe000edfc, value: 0x01000000
  269. Debug: 286 9 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000edfc 4 1
  270. Debug: 287 9 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0002000 4 1
  271. Debug: 288 10 target.c:2226 target_read_u32(): address: 0xe0002000, value: 0x00000040
  272. Debug: 289 10 target.c:2314 target_write_u32(): address: 0xe0002008, value: 0x00000000
  273. Debug: 290 10 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002008 4 1
  274. Debug: 291 10 target.c:2314 target_write_u32(): address: 0xe000200c, value: 0x00000000
  275. Debug: 292 10 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe000200c 4 1
  276. Debug: 293 15 target.c:2314 target_write_u32(): address: 0xe0002010, value: 0x00000000
  277. Debug: 294 15 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002010 4 1
  278. Debug: 295 16 target.c:2314 target_write_u32(): address: 0xe0002014, value: 0x00000000
  279. Debug: 296 16 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0002014 4 1
  280. Debug: 297 16 cortex_m.c:2032 cortex_m_examine(): FPB fpcr 0x40, numcode 4, numlit 0
  281. Debug: 298 16 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe0001000 4 1
  282. Debug: 299 17 target.c:2226 target_read_u32(): address: 0xe0001000, value: 0x20000000
  283. Debug: 300 17 target.c:2314 target_write_u32(): address: 0xe0001028, value: 0x00000000
  284. Debug: 301 17 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001028 4 1
  285. Debug: 302 17 target.c:2314 target_write_u32(): address: 0xe0001038, value: 0x00000000
  286. Debug: 303 17 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0xe0001038 4 1
  287. Debug: 304 17 cortex_m.c:1847 cortex_m_dwt_setup(): DWT dwtcr 0x20000000, comp 2, watch/trigger
  288. Info : 305 17 cortex_m.c:2042 cortex_m_examine(): stm32f0x.cpu: hardware has 4 breakpoints, 2 watchpoints
  289. Debug: 306 17 target.c:1501 target_call_event_callbacks(): target event 22 (examine-end)
  290. Debug: 307 17 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 22 (examine-end) action: stm32f0x_default_examine_end
  291. Debug: 308 17 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40021018 4 1
  292. Debug: 309 18 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40021018 4194304
  293. Debug: 310 18 command.c:145 script_debug(): command - mww ocd_mww 0x40021018 4194304
  294. Debug: 312 18 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40021018 4 1
  295. Debug: 313 19 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015804 4 1
  296. Debug: 314 19 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015804 6
  297. Debug: 315 19 command.c:145 script_debug(): command - mww ocd_mww 0x40015804 6
  298. Debug: 317 19 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015804 4 1
  299. Debug: 318 20 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015808 4 1
  300. Debug: 319 20 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015808 6144
  301. Debug: 320 20 command.c:145 script_debug(): command - mww ocd_mww 0x40015808 6144
  302. Debug: 322 21 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015808 4 1
  303. Debug: 323 21 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_flash init
  304. Debug: 324 21 command.c:145 script_debug(): command - ocd_flash ocd_flash init
  305. Debug: 326 21 tcl.c:1097 handle_flash_init_command(): Initializing flash devices...
  306. Debug: 327 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  307. Debug: 328 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  308. Debug: 329 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  309. Debug: 330 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  310. Debug: 331 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  311. Debug: 332 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  312. Debug: 333 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  313. Debug: 334 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  314. Debug: 335 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  315. Debug: 336 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  316. Debug: 337 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  317. Debug: 338 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  318. Debug: 339 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  319. Debug: 340 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  320. Debug: 341 21 command.c:366 register_command_handler(): registering 'ocd_flash'...
  321. Debug: 342 21 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mflash init
  322. Debug: 343 21 command.c:145 script_debug(): command - ocd_mflash ocd_mflash init
  323. Debug: 345 22 mflash.c:1379 handle_mflash_init_command(): Initializing mflash devices...
  324. Debug: 346 22 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_nand init
  325. Debug: 347 22 command.c:145 script_debug(): command - ocd_nand ocd_nand init
  326. Debug: 349 22 tcl.c:497 handle_nand_init_command(): Initializing NAND devices...
  327. Debug: 350 22 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_pld init
  328. Debug: 351 22 command.c:145 script_debug(): command - ocd_pld ocd_pld init
  329. Debug: 353 22 pld.c:207 handle_pld_init_command(): Initializing PLDs...
  330. Info : 354 218 server.c:91 add_connection(): accepting 'gdb' connection on tcp/3333
  331. Debug: 355 218 breakpoints.c:359 breakpoint_clear_target_internal(): Delete all breakpoints for target: stm32f0x.cpu
  332. Debug: 356 218 breakpoints.c:499 watchpoint_clear_target(): Delete all watchpoints for target: stm32f0x.cpu
  333. Debug: 357 218 target.c:1501 target_call_event_callbacks(): target event 23 (gdb-attach)
  334. Debug: 358 218 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 23 (gdb-attach) action:
  335. # Needed to be able to use the connect_assert_srst in reset_config
  336. # otherwise, can't read device id
  337. reset init
  338.  
  339. Debug: 359 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_reset init
  340. Debug: 360 218 command.c:145 script_debug(): command - reset ocd_reset init
  341. Debug: 362 218 target.c:1519 target_call_reset_callbacks(): target reset 3 (init)
  342. Debug: 363 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_target names
  343. Debug: 364 218 command.c:145 script_debug(): command - ocd_target ocd_target names
  344. Debug: 365 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-start
  345. Debug: 366 218 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-start
  346. Debug: 367 218 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 7 (reset-start) action: stm32f0x_default_reset_start
  347. Debug: 368 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_adapter_khz 1000
  348. Debug: 369 218 command.c:145 script_debug(): command - adapter_khz ocd_adapter_khz 1000
  349. Debug: 371 218 core.c:1633 jtag_config_khz(): handle jtag khz
  350. Debug: 372 218 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  351. Debug: 373 218 core.c:1603 adapter_khz_to_speed(): have interface set up
  352. Info : 374 218 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  353. Debug: 375 218 core.c:1600 adapter_khz_to_speed(): convert khz to interface specific speed value
  354. Debug: 376 218 core.c:1603 adapter_khz_to_speed(): have interface set up
  355. Info : 377 218 stlink_usb.c:1664 stlink_speed(): Unable to match requested speed 1000 kHz, using 950 kHz
  356. User : 378 218 command.c:546 command_print(): adapter speed: 950 kHz
  357. Debug: 379 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  358. Debug: 380 218 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  359. Debug: 381 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  360. Debug: 382 218 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  361. Debug: 383 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event examine-start
  362. Debug: 384 218 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event examine-start
  363. Debug: 385 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_examine
  364. Debug: 386 218 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_examine
  365. Debug: 387 218 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event examine-end
  366. Debug: 388 218 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event examine-end
  367. Debug: 389 218 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 22 (examine-end) action: stm32f0x_default_examine_end
  368. Debug: 390 218 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40021018 4 1
  369. Debug: 391 219 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40021018 4194304
  370. Debug: 392 219 command.c:145 script_debug(): command - mww ocd_mww 0x40021018 4194304
  371. Debug: 394 219 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40021018 4 1
  372. Debug: 395 219 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015804 4 1
  373. Debug: 396 220 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015804 6
  374. Debug: 397 220 command.c:145 script_debug(): command - mww ocd_mww 0x40015804 6
  375. Debug: 399 220 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015804 4 1
  376. Debug: 400 220 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40015808 4 1
  377. Debug: 401 221 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40015808 6144
  378. Debug: 402 221 command.c:145 script_debug(): command - mww ocd_mww 0x40015808 6144
  379. Debug: 404 221 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40015808 4 1
  380. Debug: 405 221 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-assert-pre
  381. Debug: 406 221 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-assert-pre
  382. Debug: 407 221 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  383. Debug: 408 221 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  384. Debug: 409 221 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_reset assert 1
  385. Debug: 410 221 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_reset assert 1
  386. Debug: 411 221 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  387. Debug: 412 221 hla_target.c:485 adapter_assert_reset(): adapter_assert_reset
  388. Debug: 413 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-assert-post
  389. Debug: 414 223 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-assert-post
  390. Debug: 415 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-deassert-pre
  391. Debug: 416 223 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-deassert-pre
  392. Debug: 417 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  393. Debug: 418 223 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  394. Debug: 419 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_reset deassert 1
  395. Debug: 420 223 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_reset deassert 1
  396. Debug: 421 223 target.c:1883 target_free_all_working_areas_restore(): freeing all working areas
  397. Debug: 422 223 hla_target.c:548 adapter_deassert_reset(): adapter_deassert_reset
  398. Debug: 423 223 hla_interface.c:129 hl_interface_execute_queue(): hl_interface_execute_queue: ignored
  399. Debug: 424 223 core.c:731 jtag_add_reset(): SRST line released
  400. Debug: 425 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-deassert-post
  401. Debug: 426 223 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-deassert-post
  402. Debug: 427 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  403. Debug: 428 223 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  404. Debug: 429 223 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_waitstate halted 1000
  405. Debug: 430 223 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_waitstate halted 1000
  406. Debug: 431 223 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000edf8 4 1
  407. Debug: 432 224 target.c:2226 target_read_u32(): address: 0xe000edf8, value: 0x08000238
  408. Debug: 433 224 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  409. Debug: 434 224 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 0 value 0xffffffff
  410. Debug: 435 224 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  411. Debug: 436 224 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 1 value 0xffffffff
  412. Debug: 437 224 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  413. Debug: 438 225 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 2 value 0xffffffff
  414. Debug: 439 225 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  415. Debug: 440 225 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 3 value 0xffffffff
  416. Debug: 441 225 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  417. Debug: 442 226 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 4 value 0xffffffff
  418. Debug: 443 226 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  419. Debug: 444 226 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 5 value 0xffffffff
  420. Debug: 445 226 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  421. Debug: 446 226 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 6 value 0xffffffff
  422. Debug: 447 226 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  423. Debug: 448 227 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 7 value 0xffffffff
  424. Debug: 449 227 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  425. Debug: 450 227 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 8 value 0xffffffff
  426. Debug: 451 227 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  427. Debug: 452 228 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 9 value 0xffffffff
  428. Debug: 453 228 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  429. Debug: 454 228 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 10 value 0xffffffff
  430. Debug: 455 228 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  431. Debug: 456 229 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 11 value 0xffffffff
  432. Debug: 457 229 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  433. Debug: 458 229 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 12 value 0xffffffff
  434. Debug: 459 229 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  435. Debug: 460 229 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 13 value 0x20001000
  436. Debug: 461 229 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  437. Debug: 462 230 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 14 value 0xffffffff
  438. Debug: 463 230 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  439. Debug: 464 230 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 15 value 0x8000238
  440. Debug: 465 230 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  441. Debug: 466 231 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 16 value 0xc1000000
  442. Debug: 467 231 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  443. Debug: 468 231 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 17 value 0x20001000
  444. Debug: 469 231 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  445. Debug: 470 231 hla_target.c:75 adapter_load_core_reg_u32(): load from core reg 18 value 0xfffffffc
  446. Debug: 471 231 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  447. Debug: 472 232 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 19 value 0x0
  448. Debug: 473 232 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  449. Debug: 474 232 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 20 value 0x0
  450. Debug: 475 232 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  451. Debug: 476 233 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 21 value 0x0
  452. Debug: 477 233 hla_target.c:60 adapter_load_core_reg_u32(): adapter_load_core_reg_u32
  453. Debug: 478 233 hla_target.c:132 adapter_load_core_reg_u32(): load from special reg 22 value 0x0
  454. Debug: 479 233 hla_target.c:433 adapter_debug_entry(): entered debug state in core mode: Thread at PC 0x08000238, target->state: halted
  455. Debug: 480 233 target.c:1501 target_call_event_callbacks(): target event 0 (gdb-halt)
  456. Debug: 481 233 target.c:1501 target_call_event_callbacks(): target event 1 (halted)
  457. User : 482 233 target.c:1936 target_arch_state(): stm32f0x.cpu: target state: halted
  458. User : 483 233 armv7m.c:553 armv7m_arch_state(): target halted due to debug-request, current mode: Thread
  459. xPSR: 0xc1000000 pc: 0x08000238 msp: 0x20001000
  460. Debug: 484 233 hla_target.c:472 adapter_poll(): halted: PC: 0x08000238
  461. Debug: 485 233 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu curstate
  462. Debug: 486 233 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu curstate
  463. Debug: 487 233 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_transport select
  464. Debug: 488 233 command.c:145 script_debug(): command - ocd_transport ocd_transport select
  465. Debug: 489 233 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu arp_waitstate halted 5000
  466. Debug: 490 234 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu arp_waitstate halted 5000
  467. Debug: 491 234 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-init
  468. Debug: 492 234 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-init
  469. Debug: 493 234 target.c:4256 target_handle_event(): target: (0) stm32f0x.cpu (hla_target) event: 17 (reset-init) action: stm32f0x_default_reset_init
  470. Debug: 494 234 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40021004 0x00100000
  471. Debug: 495 234 command.c:145 script_debug(): command - mww ocd_mww 0x40021004 0x00100000
  472. Debug: 497 234 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40021004 4 1
  473. Debug: 498 234 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0x40021000 4 1
  474. Debug: 499 235 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_mww 0x40021000 16800387
  475. Debug: 500 235 command.c:145 script_debug(): command - mww ocd_mww 0x40021000 16800387
  476. Debug: 502 235 hla_target.c:766 adapter_write_memory(): adapter_write_memory 0x40021000 4 1
  477. Debug: 503 237 stlink_usb.c:473 stlink_usb_error_check(): SWD_DP_ERROR
  478. Debug: 504 237 command.c:628 run_command(): Command failed with error code -4
  479. User : 505 237 command.c:546 command_print(): in procedure 'reset'
  480. in procedure 'ocd_bouncer'
  481. in procedure 'ocd_process_reset'
  482. in procedure 'ocd_process_reset_inner' called at file "embedded:startup.tcl", line 248
  483. in procedure 'stm32f0x.cpu' called at file "embedded:startup.tcl", line 370
  484. in procedure 'ocd_bouncer'
  485.  
  486. Debug: 506 237 command.c:145 script_debug(): command - ocd_command ocd_command type ocd_stm32f0x.cpu invoke-event reset-end
  487. Debug: 507 237 command.c:145 script_debug(): command - ocd_stm32f0x.cpu ocd_stm32f0x.cpu invoke-event reset-end
  488. Debug: 508 237 hla_target.c:752 adapter_read_memory(): adapter_read_memory 0xe000ed00 4 1
  489. Debug: 509 238 target.c:2226 target_read_u32(): address: 0xe000ed00, value: 0x00000000
  490. Error: 510 238 stm32f1x.c:801 stm32x_get_device_id(): Cannot identify target as a stm32x
  491. Error: 511 238 core.c:217 get_flash_bank_by_num(): auto_probe failed
  492. Error: 512 238 gdb_server.c:984 gdb_new_connection(): Connect failed. Consider setting up a gdb-attach event for the target to prepare target for GDB connect, or use 'gdb_memory_map disable'.
  493. Error: 513 238 server.c:95 add_connection(): attempted 'gdb' connection rejected
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