list p=18f45K22     ;list directive to define processor
    #include <p18F45K22.inc>
    errorlevel -302     ;suppress "not in bank 0" messa

    CONFIG FOSC = XT    ; Oscillator (LP,XT,HSHP,HSMP,RC,RCIO6,ECHP,ECHPIO6; INTIO67,INTIO7,ECMPIO6,ECLP,ECLPIO6)
    CONFIG PLLCFG = OFF    ; 4X PLL Enable
    CONFIG PRICLKEN = OFF   ; Primary clock Enable
    CONFIG FCMEN = OFF      ; Fail-Safe Clock Monitor Enable
    CONFIG IESO = OFF       ; Internal/External Oscillator Switchove

    CBLOCK  0x30
    RESULTHI
    RESULTLO
    amnt
    ENDC

    ORG 0x0000
    goto ResetCode

ResetCode:
    CLRF PCLATH

MAIN:
    banksel TRISA
    clrf PORTA
    clrf PORTB
    MOVLW B'00000000'
    MOVWF TRISC
    MOVWF TRISB
    MOVWF amnt
MAIN1:
    MOVLW B'10000111'
    CLRF TMR0
    MOVWF T0CON
TIMER1:
    BTFSS INTCON, TMR0IF
    GOTO TIMER1
    INCF amnt
    CLRF T0CON
    BCF INTCON, TMR0IF
ADC1:
    BTFSS amnt, 4
    GOTO MAIN1
    COMF PORTB
    CLRF amnt
    MOVLW B'10101111' ;right justify, Frc,
    MOVWF ADCON2 ; & 12 TAD ACQ time
    MOVLW B'00000000' ;ADC ref = Vdd,Vss
    MOVWF ADCON1 ;
    BSF TRISA,0 ;Set RA0 to input
    BSF ANSELA,0 ;Set RA0 to analog
    MOVLW B'00000001' ;AN0, ADC on
    MOVWF ADCON0 ;
    BSF ADCON0,GO ;Start conversion
ADCPoll:
    BTFSC ADCON0,GO ;Is conversion done?
    BRA ADCPoll ;No, test again
    ; Result is complete - store 2 MSbits in
    ; RESULTHI and 8 LSbits in RESULTLO
    MOVFF ADRESH,RESULTHI
    MOVFF ADRESL,RESULTLO
    CLRF ADCON0

    MOVLW RESULTLO
    MOVWF PORTC
    ;MOVLW b'00000000'
    ;MOVWF IPR4
    GOTO MAIN1
    END