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3366 power up spi procedure (g502)

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Jun 23rd, 2015
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  1. spi activity during 3366 power up procedure
  2.  
  3.  
  4. time time delta mosi miso
  5.  
  6. >initial power
  7.  
  8. >~44ms gap
  9.  
  10. >raise NCS for first time
  11.  
  12. >2.6ms gap
  13.  
  14. >write 0xB6 to register 0x3b. for 9800, this is the shutdown command
  15.  
  16. >273ms gap
  17.  
  18. >drop NCS for 40us
  19. >raise NCS for 40us
  20.  
  21. >write 0x5a to register 0x3a. same thing for 9800, where 0x3a is "Power_Up_Reset" register.
  22. 122205.68 122205.68 0xba 0xff
  23. 122211.12 5.44 0x5a 0xff
  24.  
  25. >wait 50ms
  26.  
  27. >write 0x95 to register 0x3d. turns on the clock tuning thing (pin 14) briefly
  28. 172399.36 50188.24 0xbd 0xff
  29. 172404.80 5.44 0x95 0xff
  30. >write 0x15 to register 0x3d. turns off the clock tuning thing (pin 14)
  31. 173591.84 1187.04 0xbd 0xff
  32. 173597.36 5.52 0x15 0xff
  33.  
  34. >read registers 0x02, 0x03, 0x04, 0x05, 0x06
  35. >same as step 5 for 9800, where these registers are Motion, Delta_X_L, Delta_X_H, Delta_Y_L, Delta_Y_H
  36. 173783.04 185.68 0x02 0xff
  37. 173950.16 167.12 0x00 0x00
  38. 173980.24 30.08 0x03 0xff
  39. 174147.04 166.80 0x00 0x00
  40. 174177.84 30.80 0x04 0xff
  41. 174344.64 166.80 0x00 0x00
  42. 174375.04 30.40 0x05 0xff
  43. 174542.16 167.12 0x00 0x00
  44. 174572.24 30.08 0x06 0xff
  45. 174739.04 166.80 0x00 0x00
  46.  
  47. >write 0x00 to register 0x10. ??
  48. 174770.56 31.52 0x90 0xff
  49. 174776.08 5.52 0x00 0xff
  50.  
  51. >write 0x00 to register 0x22. ??
  52. 174961.52 185.44 0xa2 0xff
  53. 174966.96 5.44 0x00 0xff
  54.  
  55. >write 0x1d to register 0x13. same as 9800 SROM Download procedure 2
  56. 175153.04 186.08 0x93 0xff
  57. 175158.48 5.44 0x1d 0xff
  58.  
  59. >wait 10ms. 9800 SROM Download step 3 says 1 frame. 10ms is probably just a safe value
  60.  
  61. >write 0x18 to register 0x13. same as 9800 SROM Download step 4
  62. 185345.04 10186.56 0x93 0xff
  63. 185350.48 5.44 0x18 0xff
  64.  
  65. >SROM download. same as 9800 SROM Download step 5. SROM_Load_Burst address is also 0x62 here.
  66. 185535.28 184.80 0xe2 0xff
  67. 185557.28 22.00 0x02 0xff
  68. 185579.44 22.16 0x07 0xff
  69. 185601.28 21.84 0x8b 0xff
  70. 185623.44 22.16 0x9a 0xff
  71. 185645.28 21.84 0x76 0xff
  72. .
  73. .
  74. .
  75. .
  76. .
  77. >SROM download finishes
  78.  
  79.  
  80. >read 0x07 from register 0x2a
  81. 276068.80 224.80 0x2a 0xff
  82. 276235.92 167.12 0x00 0x07
  83.  
  84. >write 0x20 to register 0x10
  85. 276267.20 31.28 0x90 0xff
  86. 276272.72 5.52 0x20 0xff
  87.  
  88. >write 0xff to register 0x14
  89. 276458.00 185.28 0x94 0xff
  90. 276463.44 5.44 0xff 0xff
  91.  
  92. >write 0xff to register 0x17
  93. 276649.12 185.68 0x97 0xff
  94. 276654.56 5.44 0xff 0xff
  95.  
  96. >write 0x00 to register 0x18
  97. 276840.64 186.08 0x98 0xff
  98. 276846.08 5.44 0x00 0xff
  99.  
  100. >write 0x00 to register 0x19
  101. 277034.64 188.56 0x99 0xff
  102. 277040.16 5.52 0x00 0xff
  103.  
  104. >write 0x00 to register 0x1b
  105. 277226.16 186.00 0x9b 0xff
  106. 277231.68 5.52 0x00 0xff
  107.  
  108. >write 0x00 to register 0x1c
  109. 277417.68 186.00 0x9c 0xff
  110. 277423.12 5.44 0x00 0xff
  111.  
  112. >read 0x0a from register 0x2c
  113. 277608.88 185.76 0x2c 0xff
  114. 277775.68 166.80 0x00 0x0a
  115.  
  116. >read 0x10 from register 0x2b
  117. 277806.48 30.80 0x2b 0xff
  118. 277973.28 166.80 0x00 0x10
  119.  
  120. >write 0x0a to register 0x2c
  121. 278021.36 48.08 0xac 0xff
  122. 278026.80 5.44 0x0a 0xff
  123.  
  124. >write 0x10 to register 0x2b
  125. 278213.20 186.40 0xab 0xff
  126. 278218.72 5.52 0x10 0xff
  127.  
  128. >clock tuning thing here???
  129. >~16ms between each of the next writes
  130.  
  131. >write 0x95 to register 0x3d
  132. 278405.68 186.96 0xbd 0xff
  133. 278411.12 5.44 0x95 0xff
  134.  
  135. >write 0x9d to register 0x3d
  136. 294764.80 16353.68 0xbd 0xff
  137. 294770.24 5.44 0x9d 0xff
  138.  
  139. >write 0x99 to register 0x3d
  140. 310039.60 15269.36 0xbd 0xff
  141. 310045.12 5.52 0x99 0xff
  142.  
  143. >write 0x97 to register 0x3d
  144. 326269.28 16224.16 0xbd 0xff
  145. 326274.80 5.52 0x97 0xff
  146.  
  147. >write 0x96 to register 0x3d
  148. 342055.76 15780.96 0xbd 0xff
  149. 342061.20 5.44 0x96 0xff
  150.  
  151. >write 0x16 to register 0x3d
  152. 358208.32 16147.12 0xbd 0xff
  153. 358213.76 5.44 0x16 0xff
  154.  
  155. >part 2 of clock tuning???
  156.  
  157. >write 0x90 to register 0x4f
  158. 358399.76 186.00 0xcf 0xff
  159. 358405.20 5.44 0x90 0xff
  160.  
  161. >write 0x88 to register 0x4f
  162. 374056.24 15651.04 0xcf 0xff
  163. 374061.68 5.44 0x88 0xff
  164.  
  165. >write 0x8c to register 0x4f
  166. 391489.36 17427.68 0xcf 0xff
  167. 391494.80 5.44 0x8c 0xff
  168.  
  169. >write 0x8e to register 0x4f
  170. 408454.48 16959.68 0xcf 0xff
  171. 408459.92 5.44 0x8e 0xff
  172.  
  173. >write 0x8f to register 0x4f
  174. 424603.28 16143.36 0xcf 0xff
  175. 424608.72 5.44 0x8f 0xff
  176.  
  177. >write 0x0e to register 0x4f
  178. 440340.24 15731.52 0xcf 0xff
  179. 440345.68 5.44 0x0e 0xff
  180.  
  181.  
  182. >normal operation of motion burst reads begins here. format appears identical to that of 9800.
  183.  
  184. >write 0x00 to register 0x50 (Motion_Burst)
  185. 440922.96 577.28 0xd0 0xff
  186. 440928.40 5.44 0x00 0xff
  187.  
  188. >wait 180-190us
  189.  
  190. >read burst motion data from register 0x50
  191. 441122.48 194.08 0x50 0xff
  192. 441164.32 41.84 0x00 0x20 >motion
  193. 441170.40 6.08 0x00 0x7f >observation
  194. 441176.48 6.08 0x00 0x00 >Delta_X_L
  195. 441182.56 6.08 0x00 0x00 >Delta_X_H
  196. 441188.72 6.16 0x00 0x00 >Delta_Y_L
  197. 441194.80 6.08 0x00 0x00 >Delta_Y_H
  198.  
  199. >write 0xef to register 0x0f. (set dpi. dpi = (0xef + 1) * 500 = 12000 in this case)
  200. 441525.04 330.24 0x8f 0xff
  201. 441530.56 5.52 0xef 0xff
  202.  
  203. 441922.88 392.32 0xd0 0xff
  204. 441928.32 5.44 0x00 0xff
  205. 442122.24 193.92 0x50 0xff
  206. 442164.08 41.84 0x00 0x20
  207. 442170.16 6.08 0x00 0x7f
  208. 442176.24 6.08 0x00 0x00
  209. 442182.32 6.08 0x00 0x00
  210. 442188.48 6.16 0x00 0x00
  211. 442194.56 6.08 0x00 0x00
  212.  
  213. >write 0x00 to register 0x42. (set angle snapping off. 0x80 for on, 0x00 for off)
  214. 442524.24 329.68 0xc2 0xff
  215. 442529.76 5.52 0x00 0xff
  216.  
  217. 442934.08 404.32 0xd0 0xff
  218. 442939.52 5.44 0x00 0xff
  219. 443122.24 182.72 0x50 0xff
  220. 443164.00 41.76 0x00 0x20
  221. 443170.08 6.08 0x00 0x7f
  222. 443176.24 6.16 0x00 0x00
  223. 443182.32 6.08 0x00 0x00
  224. 443188.40 6.08 0x00 0x00
  225. 443194.48 6.08 0x00 0x00
  226.  
  227. 443931.44 736.96 0xd0 0xff
  228. 443936.88 5.44 0x00 0xff
  229. 444122.00 185.12 0x50 0xff
  230. 444163.84 41.84 0x00 0x20
  231. 444169.92 6.08 0x00 0x7f
  232. 444176.00 6.08 0x00 0x00
  233. 444182.08 6.08 0x00 0x00
  234. 444188.24 6.16 0x00 0x00
  235. 444194.32 6.08 0x00 0x00
  236.  
  237. >everything past here is just stable motion burst reads
  238. 444923.04 728.72 0xd0 0xff
  239. 444928.56 5.52 0x00 0xff
  240. 445122.48 193.92 0x50 0xff
  241. 445163.92 41.44 0x00 0x20
  242. 445170.00 6.08 0x00 0x7f
  243. 445176.08 6.08 0x00 0x00
  244. 445182.16 6.08 0x00 0x00
  245. 445188.32 6.16 0x00 0x00
  246. 445194.40 6.08 0x00 0x00
  247.  
  248. 445922.64 728.24 0xd0 0xff
  249. 445928.08 5.44 0x00 0xff
  250. 446122.00 193.92 0x50 0xff
  251. 446163.84 41.84 0x00 0x20
  252. 446169.92 6.08 0x00 0x7f
  253. 446176.00 6.08 0x00 0x00
  254. 446182.16 6.16 0x00 0x00
  255. 446188.24 6.08 0x00 0x00
  256. 446194.32 6.08 0x00 0x00
  257.  
  258. 446922.48 728.16 0xd0 0xff
  259. 446927.92 5.44 0x00 0xff
  260. 447121.52 193.60 0x50 0xff
  261. 447162.96 41.44 0x00 0x20
  262. 447169.04 6.08 0x00 0x7f
  263. 447175.12 6.08 0x00 0x00
  264. 447181.20 6.08 0x00 0x00
  265. 447187.28 6.08 0x00 0x00
  266. 447193.36 6.08 0x00 0x00
  267. .
  268. .
  269. .
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