// ECAP
#define EC          c3
#define EC_CTL1_V 0b0000000111111111 //todo: msb?
#define EC_CTL2_V 0b0000000010010000
#define EC_EINT_V 0x2 //interrupt on capture event 1

#define EC_TSCCTR   0x0 //timestamp counter
#define EC_CTL1     0x28
#define EC_CTL2     0x2A
#define EC_EINT     0x2c //interrupt enable
#define EC_FLG      0x2e //interrupt flags
#define EC_CLR      0x2e //interrupt clear

CHECK_ECAP:
        //stop everything
        MOV  tmp0, 0
        SBCO tmp0, EC, EC_CTL1, 4
        SBCO tmp0, EC, EC_CTL2, 4
        SBCO tmp0, EC, EC_CLR, 4

        //enable interrupts
        MOV  tmp0, EC_EINT_V
        SBCO tmp0, EC, EC_EINT, 4

        //start everything
        MOV  tmp0, EC_CTL1_V
        SBCO tmp0, EC, EC_CTL1, 4
        MOV  tmp0, EC_CTL2_V
        SBCO tmp0, EC, EC_CTL2, 4

        //check for interrupt
        LBCO tmp0, EC, EC_FLG, 4
        AND  tmp0, tmp0, 0x2
        QBNE CHECK_ECAP, tmp0, 0x2
        MOV  R31.b0, PRU0_ARM_INTERRUPT+16