arm-linux-gnueabihf-nm libavcodec.a | grep vc1
         U ff_vc1_parser
vc1dsp_init_arm.o:
00000000 T ff_vc1dsp_init_arm
         U ff_vc1dsp_init_neon
vc1dsp_init_neon.o:
         U ff_avg_vc1_chroma_mc4_neon
         U ff_avg_vc1_chroma_mc8_neon
         U ff_put_vc1_chroma_mc4_neon
         U ff_put_vc1_chroma_mc8_neon
0000012c t ff_put_vc1_mspel_mc01_16_neon
         U ff_put_vc1_mspel_mc01_neon
000002bc t ff_put_vc1_mspel_mc02_16_neon
         U ff_put_vc1_mspel_mc02_neon
0000044c t ff_put_vc1_mspel_mc03_16_neon
         U ff_put_vc1_mspel_mc03_neon
00000000 t ff_put_vc1_mspel_mc10_16_neon
         U ff_put_vc1_mspel_mc10_neon
00000190 t ff_put_vc1_mspel_mc11_16_neon
         U ff_put_vc1_mspel_mc11_neon
00000320 t ff_put_vc1_mspel_mc12_16_neon
         U ff_put_vc1_mspel_mc12_neon
000004b0 t ff_put_vc1_mspel_mc13_16_neon
         U ff_put_vc1_mspel_mc13_neon
00000064 t ff_put_vc1_mspel_mc20_16_neon
         U ff_put_vc1_mspel_mc20_neon
000001f4 t ff_put_vc1_mspel_mc21_16_neon
         U ff_put_vc1_mspel_mc21_neon
00000384 t ff_put_vc1_mspel_mc22_16_neon
         U ff_put_vc1_mspel_mc22_neon
00000514 t ff_put_vc1_mspel_mc23_16_neon
         U ff_put_vc1_mspel_mc23_neon
000000c8 t ff_put_vc1_mspel_mc30_16_neon
         U ff_put_vc1_mspel_mc30_neon
00000258 t ff_put_vc1_mspel_mc31_16_neon
         U ff_put_vc1_mspel_mc31_neon
000003e8 t ff_put_vc1_mspel_mc32_16_neon
         U ff_put_vc1_mspel_mc32_neon
00000578 t ff_put_vc1_mspel_mc33_16_neon
         U ff_put_vc1_mspel_mc33_neon
00000000 T ff_vc1dsp_init_neon
         U ff_vc1_inv_trans_4x4_dc_neon
         U ff_vc1_inv_trans_4x4_neon
         U ff_vc1_inv_trans_4x8_dc_neon
         U ff_vc1_inv_trans_4x8_neon
         U ff_vc1_inv_trans_8x4_dc_neon
         U ff_vc1_inv_trans_8x4_neon
         U ff_vc1_inv_trans_8x8_dc_neon
         U ff_vc1_inv_trans_8x8_neon
vc1dsp_neon.o:
0000156c T ff_put_vc1_mspel_mc01_neon
00001624 T ff_put_vc1_mspel_mc02_neon
000016c0 T ff_put_vc1_mspel_mc03_neon
00001474 T ff_put_vc1_mspel_mc10_neon
00000674 T ff_put_vc1_mspel_mc11_neon
00000818 T ff_put_vc1_mspel_mc12_neon
00000990 T ff_put_vc1_mspel_mc13_neon
000014cc T ff_put_vc1_mspel_mc20_neon
00000b34 T ff_put_vc1_mspel_mc21_neon
00000cc4 T ff_put_vc1_mspel_mc22_neon
00000e24 T ff_put_vc1_mspel_mc23_neon
00001514 T ff_put_vc1_mspel_mc30_neon
00000fb4 T ff_put_vc1_mspel_mc31_neon
00001158 T ff_put_vc1_mspel_mc32_neon
000012d0 T ff_put_vc1_mspel_mc33_neon
00001958 T ff_vc1_inv_trans_4x4_dc_neon
000005ac T ff_vc1_inv_trans_4x4_neon
000018cc T ff_vc1_inv_trans_4x8_dc_neon
000003fc T ff_vc1_inv_trans_4x8_neon
00001864 T ff_vc1_inv_trans_8x4_dc_neon
00000264 T ff_vc1_inv_trans_8x4_neon
000017bc T ff_vc1_inv_trans_8x8_dc_neon
00000000 T ff_vc1_inv_trans_8x8_neon
         U ff_vc1_profiles
00000028 D ff_vc1_profiles
vc1.o:
         U ff_vc1_1ref_mvdata_bits
         U ff_vc1_1ref_mvdata_codes
         U ff_vc1_1ref_mvdata_vlc
         U ff_vc1_2mv_block_pattern_bits
         U ff_vc1_2mv_block_pattern_codes
         U ff_vc1_2mv_block_pattern_vlc
         U ff_vc1_2ref_mvdata_bits
         U ff_vc1_2ref_mvdata_codes
         U ff_vc1_2ref_mvdata_vlc
         U ff_vc1_4mv_block_pattern_bits
         U ff_vc1_4mv_block_pattern_codes
         U ff_vc1_4mv_block_pattern_vlc
         U ff_vc1_ac_coeff_table
         U ff_vc1_ac_sizes
         U ff_vc1_adv_progressive_4x8_zz
         U ff_vc1_adv_progressive_8x4_zz
         U ff_vc1_bfraction_bits
         U ff_vc1_bfraction_codes
         U ff_vc1_bfraction_lut
         U ff_vc1_bfraction_vlc
         U ff_vc1_cbpcy_p_bits
         U ff_vc1_cbpcy_p_codes
         U ff_vc1_cbpcy_p_vlc
000020c4 T ff_vc1_decode_entry_point
00000efc T ff_vc1_decode_sequence_header
         U ff_vc1dsp_init
         U ff_vc1_fps_dr
         U ff_vc1_fps_nr
         U ff_vc1_icbpcy_p_bits
         U ff_vc1_icbpcy_p_codes
         U ff_vc1_icbpcy_vlc
         U ff_vc1_if_1mv_mbmode_bits
         U ff_vc1_if_1mv_mbmode_codes
         U ff_vc1_if_1mv_mbmode_vlc
         U ff_vc1_if_mmv_mbmode_bits
         U ff_vc1_if_mmv_mbmode_codes
         U ff_vc1_if_mmv_mbmode_vlc
         U ff_vc1_imode_bits
         U ff_vc1_imode_codes
         U ff_vc1_imode_vlc
00000014 T ff_vc1_init_common
         U ff_vc1_intfr_4mv_mbmode_bits
         U ff_vc1_intfr_4mv_mbmode_codes
         U ff_vc1_intfr_4mv_mbmode_vlc
         U ff_vc1_intfr_non4mv_mbmode_bits
         U ff_vc1_intfr_non4mv_mbmode_codes
         U ff_vc1_intfr_non4mv_mbmode_vlc
         U ff_vc1_mv_diff_bits
         U ff_vc1_mv_diff_codes
         U ff_vc1_mv_diff_vlc
         U ff_vc1_mv_pmode_table
         U ff_vc1_mv_pmode_table2
         U ff_vc1_norm2_bits
         U ff_vc1_norm2_codes
         U ff_vc1_norm2_vlc
         U ff_vc1_norm6_bits
         U ff_vc1_norm6_codes
         U ff_vc1_norm6_vlc
000026c4 T ff_vc1_parse_frame_header
00003688 T ff_vc1_parse_frame_header_adv
         U ff_vc1_pixel_aspect
         U ff_vc1_pquant_table
         U ff_vc1_subblkpat_bits
         U ff_vc1_subblkpat_codes
         U ff_vc1_subblkpat_vlc
         U ff_vc1_ttblk_bits
         U ff_vc1_ttblk_codes
         U ff_vc1_ttblk_vlc
         U ff_vc1_ttfrm_to_tt
         U ff_vc1_ttmb_bits
         U ff_vc1_ttmb_codes
         U ff_vc1_ttmb_vlc
0000009c r vc1_ac_tables
vc1_parser.o:
         U ff_vc1_decode_entry_point
         U ff_vc1_decode_sequence_header
         U ff_vc1_init_common
         U ff_vc1_parse_frame_header
         U ff_vc1_parse_frame_header_adv
00000000 D ff_vc1_parser
00000088 t vc1_extract_header
00000260 t vc1_parse
00000000 t vc1_parse_init
00000000 t vc1_split
vc1data.o:
000023e8 R ff_vc1_1ref_mvdata_bits
00002508 R ff_vc1_1ref_mvdata_codes
00000040 C ff_vc1_1ref_mvdata_vlc
00002b64 R ff_vc1_2mv_block_pattern_bits
00002b74 R ff_vc1_2mv_block_pattern_codes
00000040 C ff_vc1_2mv_block_pattern_vlc
00001038 R ff_vc1_2ref_mvdata_bits
00001428 R ff_vc1_2ref_mvdata_codes
00000080 C ff_vc1_2ref_mvdata_vlc
00002b84 R ff_vc1_4mv_block_pattern_bits
00002bc4 R ff_vc1_4mv_block_pattern_codes
00000040 C ff_vc1_4mv_block_pattern_vlc
00000080 C ff_vc1_ac_coeff_table
00000000 R ff_vc1_ac_sizes
000001c4 R ff_vc1_adv_interlaced_4x4_zz
000001d4 R ff_vc1_adv_interlaced_4x8_zz
000001f4 R ff_vc1_adv_interlaced_8x4_zz
00000214 R ff_vc1_adv_interlaced_8x8_zz
00000254 R ff_vc1_adv_progressive_4x8_zz
00000274 R ff_vc1_adv_progressive_8x4_zz
00000020 R ff_vc1_b_field_mvpred_scales
00002d74 R ff_vc1_bfraction_bits
00002d5c R ff_vc1_bfraction_codes
00002d8c R ff_vc1_bfraction_lut
00000010 C ff_vc1_bfraction_vlc
00000d18 R ff_vc1_cbpcy_p_bits
00000e18 R ff_vc1_cbpcy_p_codes
00000040 C ff_vc1_cbpcy_p_vlc
000000c8 R ff_vc1_dqscale
00000058 R ff_vc1_field_mvpred_scales
00002e1c R ff_vc1_fps_dr
00002e24 R ff_vc1_fps_nr
00000730 R ff_vc1_icbpcy_p_bits
00000928 R ff_vc1_icbpcy_p_codes
00000080 C ff_vc1_icbpcy_vlc
00002988 R ff_vc1_if_1mv_mbmode_bits
000029b8 R ff_vc1_if_1mv_mbmode_codes
00000080 C ff_vc1_if_1mv_mbmode_vlc
000029e8 R ff_vc1_if_mmv_mbmode_bits
00002a28 R ff_vc1_if_mmv_mbmode_codes
00000080 C ff_vc1_if_mmv_mbmode_vlc
00002ccc R ff_vc1_imode_bits
00002cd4 R ff_vc1_imode_codes
00000010 C ff_vc1_imode_vlc
00002ab0 R ff_vc1_intfr_4mv_mbmode_bits
00002aec R ff_vc1_intfr_4mv_mbmode_codes
00000040 C ff_vc1_intfr_4mv_mbmode_vlc
00002a68 R ff_vc1_intfr_non4mv_mbmode_bits
00002a8c R ff_vc1_intfr_non4mv_mbmode_codes
00000040 C ff_vc1_intfr_non4mv_mbmode_vlc
00002e40 R ff_vc1_mbmode_intfrp
000002a4 R ff_vc1_mv_diff_bits
000003c8 R ff_vc1_mv_diff_codes
00000040 C ff_vc1_mv_diff_vlc
00002ec0 R ff_vc1_mv_pmode_table
00002eb8 R ff_vc1_mv_pmode_table2
00002cc4 R ff_vc1_norm2_bits
00002cc8 R ff_vc1_norm2_codes
00000010 C ff_vc1_norm2_vlc
00002c04 R ff_vc1_norm6_bits
00002c44 R ff_vc1_norm6_codes
00000010 C ff_vc1_norm6_vlc
00002cdc R ff_vc1_pixel_aspect
00002dbc R ff_vc1_pquant_table
00000294 R ff_vc1_simple_progressive_4x4_zz
00000610 R ff_vc1_subblkpat_bits
00000640 R ff_vc1_subblkpat_codes
00000030 C ff_vc1_subblkpat_vlc
00000670 R ff_vc1_ttblk_bits
00000688 R ff_vc1_ttblk_codes
00002edc R ff_vc1_ttblk_to_tt
00000030 C ff_vc1_ttblk_vlc
00002ecc R ff_vc1_ttfrm_to_tt
000006a0 R ff_vc1_ttmb_bits
000006d0 R ff_vc1_ttmb_codes
00000030 C ff_vc1_ttmb_vlc
vc1dsp.o:
00009228 t avg_no_rnd_vc1_chroma_mc4_c
00008ff4 t avg_no_rnd_vc1_chroma_mc8_c
00002884 t avg_vc1_mspel_mc01_16_c
0000276c t avg_vc1_mspel_mc01_c
00004aec t avg_vc1_mspel_mc02_16_c
000049ec t avg_vc1_mspel_mc02_c
00006c88 t avg_vc1_mspel_mc03_16_c
00006b80 t avg_vc1_mspel_mc03_c
00002008 t avg_vc1_mspel_mc10_16_c
00001f10 t avg_vc1_mspel_mc10_c
0000324c t avg_vc1_mspel_mc11_16_c
00002c1c t avg_vc1_mspel_mc11_c
00005484 t avg_vc1_mspel_mc12_16_c
00004e6c t avg_vc1_mspel_mc12_c
00007630 t avg_vc1_mspel_mc13_16_c
00007010 t avg_vc1_mspel_mc13_c
0000232c t avg_vc1_mspel_mc20_16_c
0000224c t avg_vc1_mspel_mc20_c
00003c5c t avg_vc1_mspel_mc21_16_c
0000372c t avg_vc1_mspel_mc21_c
00005e40 t avg_vc1_mspel_mc22_16_c
00005940 t avg_vc1_mspel_mc22_c
00008020 t avg_vc1_mspel_mc23_16_c
00007b00 t avg_vc1_mspel_mc23_c
0000266c t avg_vc1_mspel_mc30_16_c
00002584 t avg_vc1_mspel_mc30_c
00004714 t avg_vc1_mspel_mc31_16_c
0000414c t avg_vc1_mspel_mc31_c
000068bc t avg_vc1_mspel_mc32_16_c
0000630c t avg_vc1_mspel_mc32_c
00008ab8 t avg_vc1_mspel_mc33_16_c
00008500 t avg_vc1_mspel_mc33_c
00000000 T ff_vc1dsp_init
         U ff_vc1dsp_init_arm
00008ed8 t put_no_rnd_vc1_chroma_mc4_c
00008d04 t put_no_rnd_vc1_chroma_mc8_c
00002800 t put_vc1_mspel_mc01_16_c
000026e8 t put_vc1_mspel_mc01_c
00004a74 t put_vc1_mspel_mc02_16_c
00004974 t put_vc1_mspel_mc02_c
00006c0c t put_vc1_mspel_mc03_16_c
00006b04 t put_vc1_mspel_mc03_c
00001f94 t put_vc1_mspel_mc10_16_c
00001cf0 t put_vc1_mspel_mc10_c
00002fe4 t put_vc1_mspel_mc11_16_c
00002918 t put_vc1_mspel_mc11_c
00005228 t put_vc1_mspel_mc12_16_c
00004b74 t put_vc1_mspel_mc12_c
000073d0 t put_vc1_mspel_mc13_16_c
00006d14 t put_vc1_mspel_mc13_c
000022c4 t put_vc1_mspel_mc20_16_c
0000208c t put_vc1_mspel_mc20_c
00003a68 t put_vc1_mspel_mc21_16_c
000034b4 t put_vc1_mspel_mc21_c
00005c68 t put_vc1_mspel_mc22_16_c
000056e0 t put_vc1_mspel_mc22_c
00007e34 t put_vc1_mspel_mc23_16_c
00007890 t put_vc1_mspel_mc23_c
00002600 t put_vc1_mspel_mc30_16_c
000023a4 t put_vc1_mspel_mc30_c
000044f0 t put_vc1_mspel_mc31_16_c
00003e9c t put_vc1_mspel_mc31_c
000066a4 t put_vc1_mspel_mc32_16_c
00006068 t put_vc1_mspel_mc32_c
0000889c t put_vc1_mspel_mc33_16_c
00008258 t put_vc1_mspel_mc33_c
00009374 t vc1_h_loop_filter16_c
0000a1d4 t vc1_h_loop_filter4_c
0000a5f8 t vc1_h_loop_filter8_c
00000088 t vc1_h_overlap_c
0000019c t vc1_h_s_overlap_c
00001614 t vc1_inv_trans_4x4_c
000014e0 t vc1_inv_trans_4x4_dc_c
000011d8 t vc1_inv_trans_4x8_c
00000f90 t vc1_inv_trans_4x8_dc_c
00000d40 t vc1_inv_trans_8x4_c
00000b0c t vc1_inv_trans_8x4_dc_c
00000820 t vc1_inv_trans_8x8_c
00000768 t vc1_inv_trans_8x8_dc_c
000097e0 t vc1_v_loop_filter16_c
00009d10 t vc1_v_loop_filter4_c
00000234 t vc1_v_loop_filter8_c
00000000 t vc1_v_overlap_c
00000104 t vc1_v_s_overlap_c