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Oct 28th, 2016
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  1. module mojo_top(
  2. // 50MHz clock input
  3. input clk,
  4. // Input from reset button (active low)
  5. input rst_n,
  6. // cclk input from AVR, high when AVR is ready
  7. input cclk,
  8. // Outputs to the 8 onboard LEDs
  9. output[7:0]led,
  10. // AVR SPI connections
  11. output spi_miso,
  12. input spi_ss,
  13. input spi_mosi,
  14. input spi_sck,
  15. // AVR ADC channel select
  16. output [3:0] spi_channel,
  17. // Serial connections
  18. input avr_tx, // AVR Tx => FPGA Rx
  19. output avr_rx, // AVR Rx => FPGA Tx
  20. input avr_rx_busy, // AVR Rx buffer full
  21. input button
  22. );
  23.  
  24.  
  25. wire rst = ~rst_n; // make reset active high
  26.  
  27. // these signals should be high-z when not used
  28. assign spi_miso = 1'bz;
  29. assign avr_rx = 1'bz;
  30. assign spi_channel = 4'bzzzz;
  31.  
  32. wire btn_out;
  33. reg [7:0] led_r;
  34.  
  35. assign led = led_r;
  36.  
  37. button_conditioner btn(
  38. .clk(clk),
  39. .btn(button),
  40. .out(btn_out)
  41. );
  42.  
  43. always @(posedge rst or posedge btn_out) begin
  44. if (rst)
  45. led_r <= 0;
  46. else if (btn_out == 1'b0) // <=== THIS IS THE WTF LINE
  47. led_r <= led_r + 1;
  48. end
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