stm8 dac+dma+tim4

void dmadactim4init(void)
{
    uint8_t tmpreg1=0;
  //DMA style
  CLK_PeripheralClockConfig(CLK_Peripheral_DAC,ENABLE);
  CLK_PeripheralClockConfig(CLK_Peripheral_DMA1,ENABLE);
  CLK_PeripheralClockConfig(CLK_Peripheral_TIM4,ENABLE);
  //DMA Init
  //Reset DMA Channelx control register
  DMA1_Channel3->CCR  = DMA_CCR_RESET_VALUE;
  //Set DMA direction & Mode & Incremantal Memory mode
  DMA1_Channel3->CCR |= ((uint8_t)DMA_DIR_MemoryToPeripheral
    //| (uint8_t)DMA_Mode_Circular
    |(uint8_t) DMA_MemoryIncMode_Inc);
  //Clear old priority and memory data size  option
  DMA1_Channel3->CSPR &= (uint8_t)~(DMA_CSPR_PL | DMA_CSPR_16BM);
  //Set old priority and memory data size  option
  DMA1_Channel3->CSPR |= ((uint8_t)DMA_Priority_VeryHigh |(uint8_t)DMA_MemoryDataSize_HalfWord);
  //Write to DMA Channelx CNDTR
  DMA1_Channel3->CNBTR = 128;
  //--------------------------- DMA Channel3 CPAR Configuration ----------------
  DMA1_Channel3->CPARH = (uint8_t)(DAC_CH1RDHRH_ADDRESS >> (uint8_t)8);
  DMA1_Channel3->CPARL = (uint8_t)(DAC_CH1RDHRH_ADDRESS);
  //--------------------------- DMA Channel3 CMAR Configuration ----------------
  DMA1_Channel3->CM0ARH = (uint8_t)((uint16_t)&(dac_buf[0]) >> (uint8_t)8);
  DMA1_Channel3->CM0ARL = (uint8_t)((uint16_t)&(dac_buf[0]));
  //DMA1 Channel 3 enable
  DMA1_Channel3->CCR |= (uint8_t)(DMA_CCR_CE | DMA_CCR_TCIE | DMA_CCR_HTIE);
  //Enable the  DMA
  DMA1->GCSR |= (uint8_t)DMA_GCSR_GE;

  //DAC Channel1 Config
  //Fill DAC Init param DAC_Trigger_T4_TRGO* and  DAC Channel1 Init
  //DAC CR1 Config
  tmpreg1 = DAC->CH1CR1;
  //Clear TENx, TSELx bits
  tmpreg1 &= (uint8_t)~(DAC_CR1_TEN | DAC_CR1_TSEL );
  //Configure for the selected DAC channel: buffer output, trigger
  //Set BOFFx bit Output Buffer disable
  tmpreg1 |= (uint8_t)(DAC_CR1_BOFF );
  //Set TSELx and TEN  bits according to DAC_Trigger value
  tmpreg1 |= (uint8_t)(DAC_CR1_TEN | DAC_Trigger_T4_TRGO) ;
  //Write to DAC CR1
  DAC->CH1CR1 = tmpreg1;
  //Enable DAC Channel1
  DAC->CH1CR1 |= DAC_CR1_EN;
  DAC->CH1CR2 |= DAC_CR2_DMAEN;

  // TIM4 Config
  //Set output signal frequency approx. equal to 22050Hz Range 1
  TIM4->ARR = (uint8_t)(181);
  //Set the Prescaler value
  TIM4->PSCR = (uint8_t)(TIM4_Prescaler_4);

  //TIM4 TRGO selection
  tmpreg1 = TIM4->CR2;
  //Reset the MMS Bits
  tmpreg1 &= (uint8_t)(~TIM4_CR2_MMS);
  //Select the TRGO source
  tmpreg1 |=  (uint8_t)TIM4_TRGOSource_Update;
  TIM4->CR2 = tmpreg1;

  //TIM4 enable counter
  TIM4->CR1 |= TIM4_CR1_CEN ;

}