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Haiku Syslog

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Jul 20th, 2015
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  1. KERN: radeon_hd: radeon_get_edid_info
  2. KERN: radeon_hd: radeon_get_pixel_clock_limits
  3. KERN: radeon_hd: radeon_get_edid_info
  4. KERN: radeon_hd: radeon_get_pixel_clock_limits
  5. KERN: radeon_hd: radeon_get_edid_info
  6. KERN: radeon_hd: radeon_get_pixel_clock_limits
  7. KERN: radeon_hd: radeon_get_edid_info
  8. KERN: radeon_hd: encoder_output_lock: true
  9. KERN: radeon_hd: display_crtc_lock
  10. KERN: radeon_hd: encoder_dpms_set: power: false
  11. KERN: radeon_hd: encoder_dpms_set_dig: power: false
  12. KERN: radeon_hd: transmitter_dig_setup
  13. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  14. KERN: radeon_hd: encoder_pick_dig
  15. KERN: radeon_hd: transmitter_dig_setup
  16. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  17. KERN: radeon_hd: encoder_pick_dig
  18. KERN: Last message repeated 2 times.
  19. KERN: radeon_hd: encoder_dig_setup: table 1.1
  20. KERN: radeon_hd: display_crtc_dpms: crtc 0 dpms powerdown
  21. KERN: radeon_hd: display_crtc_blank
  22. KERN: radeon_hd: display_crtc_memreq
  23. KERN: radeon_hd: display_crtc_power
  24. KERN: radeon_hd: encoder_assign_crtc
  25. KERN: radeon_hd: encoder_assign_crtc: table 1.2
  26. KERN: radeon_hd: encoder_pick_dig
  27. KERN: radeon_hd: encoder_crtc_scratch
  28. KERN: radeon_hd: radeon_set_display_mode: pll 1 selected for connector 1
  29. KERN: radeon_hd: pll_setup_flags: CRTC: 0, PLL: 1
  30. KERN: radeon_hd: pll_adjust: table 1.2
  31. KERN: radeon_hd: pll_adjust: was: 172510, now: 172510
  32. KERN: radeon_hd: pll_compute_post_divider: vco = 600000
  33. KERN: radeon_hd: pll_compute_post_divider: postDiv = 3
  34. KERN: radeon_hd: pll_compute: using minimum reference divider
  35. KERN: radeon_hd: pll_compute: performing fractional feedback calculations
  36. KERN: radeon_hd: pll_compute: Calculated pixel clock of 172800 based on:
  37. KERN: radeon_hd: pll_compute: referenceFrequency: 27000; referenceDivider: 5
  38. KERN: radeon_hd: pll_compute: feedbackDivider: 96; feedbackDividerFrac: 0
  39. KERN: radeon_hd: pll_compute: postDivider: 3
  40. KERN: radeon_hd: pll_compute: pixel clock 172510 was changed to 172800
  41. KERN: radeon_hd: pll_set: table 1.3
  42. KERN: radeon_hd: pll_set: set adjusted pixel clock 172800 (was 172510)
  43. KERN: radeon_hd: display_crtc_ss
  44. KERN: radeon_hd: display_crtc_set_dtd called to do 1920x1080
  45. KERN: radeon_hd: display_crtc_fb_set: Framebuffer at: 0x0
  46. KERN: radeon_hd: display_crtc_fb_set: Set SurfaceAddress High: 0x0
  47. KERN: radeon_hd: display_crtc_fb_set: Set SurfaceAddress: 0x0
  48. KERN: radeon_hd: display_crtc_fb_set: fb: 1920x1080 (32 bpp)
  49. KERN: radeon_hd: display_crtc_fb_set: fb pitch: 1920
  50. KERN: radeon_hd: display_avivo_crtc_load_lut: crtcID 0
  51. KERN: radeon_hd: display_crtc_scale
  52. KERN: radeon_hd: encoder_mode_set
  53. KERN: radeon_hd: transmitter_dig_setup
  54. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  55. KERN: radeon_hd: encoder_pick_dig
  56. KERN: Last message repeated 2 times.
  57. KERN: radeon_hd: encoder_dig_setup: table 1.1
  58. KERN: radeon_hd: encoder_pick_dig
  59. Last message repeated 1 time
  60. KERN: radeon_hd: encoder_dig_setup: table 1.1
  61. KERN: radeon_hd: transmitter_dig_setup
  62. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  63. KERN: radeon_hd: encoder_pick_dig
  64. KERN: radeon_hd: transmitter_dig_setup
  65. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  66. KERN: radeon_hd: encoder_pick_dig
  67. KERN: radeon_hd: encoder_apply_quirks
  68. KERN: radeon_hd: display_crtc_dpms: crtc 0 dpms powerup
  69. KERN: radeon_hd: display_crtc_power
  70. KERN: radeon_hd: display_crtc_memreq
  71. KERN: radeon_hd: display_crtc_blank
  72. KERN: radeon_hd: encoder_dpms_set: power: true
  73. KERN: radeon_hd: encoder_dpms_set_dig: power: true
  74. KERN: radeon_hd: encoder_pick_dig
  75. Last message repeated 1 time
  76. KERN: radeon_hd: encoder_dig_setup: table 1.1
  77. KERN: radeon_hd: transmitter_dig_setup
  78. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  79. KERN: radeon_hd: encoder_pick_dig
  80. KERN: radeon_hd: transmitter_dig_setup
  81. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  82. KERN: radeon_hd: encoder_pick_dig
  83. KERN: radeon_hd: display_crtc_lock
  84. KERN: radeon_hd: encoder_output_lock: false
  85. KERN: radeon_hd: Current DisplayPort Info =================
  86. KERN: radeon_hd: Connector #0) DP: false
  87. KERN: radeon_hd: Connector #1) DP: false
  88. KERN: radeon_hd: Connector #2) DP: false
  89. KERN: radeon_hd: Connector #3) DP: false
  90. KERN: radeon_hd: ==========================================
  91. KERN: radeon_hd: D1CRTC_STATUS Value: 0x20002
  92. KERN: radeon_hd: D2CRTC_STATUS Value: 0x10009
  93. KERN: radeon_hd: D1CRTC_CONTROL Value: 0x410311
  94. KERN: radeon_hd: D2CRTC_CONTROL Value: 0x400310
  95. KERN: radeon_hd: D1GRPH_ENABLE Value: 0x1
  96. KERN: radeon_hd: D2GRPH_ENABLE Value: 0x1
  97. KERN: radeon_hd: D1SCL_ENABLE Value: 0x0
  98. KERN: radeon_hd: D2SCL_ENABLE Value: 0x0
  99. KERN: radeon_hd: D1CRTC_BLANK_CONTROL Value: 0x0
  100. KERN: radeon_hd: D2CRTC_BLANK_CONTROL Value: 0x0
  101. KERN: radeon_hd: radeon_get_frame_buffer_config
  102. KERN: radeon_hd: radeon_get_edid_info
  103. KERN: radeon_hd: encoder_output_lock: true
  104. KERN: radeon_hd: display_crtc_lock
  105. KERN: radeon_hd: encoder_dpms_set: power: false
  106. KERN: radeon_hd: encoder_dpms_set_dig: power: false
  107. KERN: radeon_hd: transmitter_dig_setup
  108. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  109. KERN: radeon_hd: encoder_pick_dig
  110. KERN: radeon_hd: transmitter_dig_setup
  111. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  112. KERN: radeon_hd: encoder_pick_dig
  113. KERN: Last message repeated 2 times.
  114. KERN: radeon_hd: encoder_dig_setup: table 1.1
  115. KERN: radeon_hd: display_crtc_dpms: crtc 0 dpms powerdown
  116. KERN: radeon_hd: display_crtc_blank
  117. KERN: radeon_hd: display_crtc_memreq
  118. KERN: radeon_hd: display_crtc_power
  119. KERN: radeon_hd: encoder_assign_crtc
  120. KERN: radeon_hd: encoder_assign_crtc: table 1.2
  121. KERN: radeon_hd: encoder_pick_dig
  122. KERN: radeon_hd: encoder_crtc_scratch
  123. KERN: radeon_hd: radeon_set_display_mode: pll 1 selected for connector 1
  124. KERN: radeon_hd: pll_setup_flags: CRTC: 0, PLL: 1
  125. KERN: radeon_hd: pll_adjust: table 1.2
  126. KERN: radeon_hd: pll_adjust: was: 85478, now: 85470
  127. KERN: radeon_hd: pll_compute_post_divider: vco = 600000
  128. KERN: radeon_hd: pll_compute_post_divider: postDiv = 7
  129. KERN: radeon_hd: pll_compute: using minimum reference divider
  130. KERN: radeon_hd: pll_compute: performing fractional feedback calculations
  131. KERN: radeon_hd: pll_compute: Calculated pixel clock of 85628 based on:
  132. KERN: radeon_hd: pll_compute: referenceFrequency: 27000; referenceDivider: 5
  133. KERN: radeon_hd: pll_compute: feedbackDivider: 111; feedbackDividerFrac: 0
  134. KERN: radeon_hd: pll_compute: postDivider: 7
  135. KERN: radeon_hd: pll_compute: pixel clock 85470 was changed to 85628
  136. KERN: radeon_hd: pll_set: table 1.3
  137. KERN: radeon_hd: pll_set: set adjusted pixel clock 85628 (was 85478)
  138. KERN: radeon_hd: display_crtc_ss
  139. KERN: radeon_hd: display_crtc_set_dtd called to do 1360x768
  140. KERN: radeon_hd: display_crtc_fb_set: Framebuffer at: 0x0
  141. KERN: radeon_hd: display_crtc_fb_set: Set SurfaceAddress High: 0x0
  142. KERN: radeon_hd: display_crtc_fb_set: Set SurfaceAddress: 0x0
  143. KERN: radeon_hd: display_crtc_fb_set: fb: 1360x768 (32 bpp)
  144. KERN: radeon_hd: display_crtc_fb_set: fb pitch: 1408
  145. KERN: radeon_hd: display_avivo_crtc_load_lut: crtcID 0
  146. KERN: radeon_hd: display_crtc_scale
  147. KERN: radeon_hd: encoder_mode_set
  148. KERN: radeon_hd: transmitter_dig_setup
  149. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  150. KERN: radeon_hd: encoder_pick_dig
  151. KERN: Last message repeated 2 times.
  152. KERN: radeon_hd: encoder_dig_setup: table 1.1
  153. KERN: radeon_hd: encoder_pick_dig
  154. Last message repeated 1 time
  155. KERN: radeon_hd: encoder_dig_setup: table 1.1
  156. KERN: radeon_hd: transmitter_dig_setup
  157. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  158. KERN: radeon_hd: encoder_pick_dig
  159. KERN: radeon_hd: transmitter_dig_setup
  160. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  161. KERN: radeon_hd: encoder_pick_dig
  162. KERN: radeon_hd: encoder_apply_quirks
  163. KERN: radeon_hd: display_crtc_dpms: crtc 0 dpms powerup
  164. KERN: radeon_hd: display_crtc_power
  165. KERN: radeon_hd: display_crtc_memreq
  166. KERN: radeon_hd: display_crtc_blank
  167. KERN: radeon_hd: encoder_dpms_set: power: true
  168. KERN: radeon_hd: encoder_dpms_set_dig: power: true
  169. KERN: radeon_hd: encoder_pick_dig
  170. Last message repeated 1 time
  171. KERN: radeon_hd: encoder_dig_setup: table 1.1
  172. KERN: radeon_hd: transmitter_dig_setup
  173. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  174. KERN: radeon_hd: encoder_pick_dig
  175. KERN: radeon_hd: transmitter_dig_setup
  176. KERN: radeon_hd: transmitter_dig_setup: table 1.2
  177. KERN: radeon_hd: encoder_pick_dig
  178. KERN: radeon_hd: display_crtc_lock
  179. KERN: radeon_hd: encoder_output_lock: false
  180. KERN: radeon_hd: Current DisplayPort Info =================
  181. KERN: radeon_hd: Connector #0) DP: false
  182. KERN: radeon_hd: Connector #1) DP: false
  183. KERN: radeon_hd: Connector #2) DP: false
  184. KERN: radeon_hd: Connector #3) DP: false
  185. KERN: radeon_hd: ==========================================
  186. KERN: radeon_hd: D1CRTC_STATUS Value: 0x20002
  187. KERN: radeon_hd: D2CRTC_STATUS Value: 0x10009
  188. KERN: radeon_hd: D1CRTC_CONTROL Value: 0x410311
  189. KERN: radeon_hd: D2CRTC_CONTROL Value: 0x400310
  190. KERN: radeon_hd: D1GRPH_ENABLE Value: 0x1
  191. KERN: radeon_hd: D2GRPH_ENABLE Value: 0x1
  192. KERN: radeon_hd: D1SCL_ENABLE Value: 0x0
  193. KERN: radeon_hd: D2SCL_ENABLE Value: 0x0
  194. KERN: radeon_hd: D1CRTC_BLANK_CONTROL Value: 0x0
  195. KERN: radeon_hd: D2CRTC_BLANK_CONTROL Value: 0x0
  196. KERN: radeon_hd: radeon_get_frame_buffer_config
  197. KERN: radeon_hd: radeon_get_edid_info
  198. Last message repeated 1 time
  199. KERN: radeon_hd: radeon_get_pixel_clock_limits
  200. KERN: radeon_hd: radeon_get_edid_info
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