ATA/DMA test

/*
 *   Buggy ATA/DMA test, that works in QEMU and not in Bochs.
 */

#define ATATIMEOUT 5

/* the two following variables were
 * initialized while reading the PCI
 */
unsigned int ata_bar[6];
unsigned short ata_int_inf;

unsigned short ata_base;
unsigned short ata_alts;        /* R: alternate status / W: device ctrl reg */

char *buffer = (char*)0x6000;


struct prdt {
        unsigned int addr;
        unsigned short siz;
        unsigned short end;
};


struct prdt *prdt;

int ataint;


atatest()
{
        unsigned addr = 0;   /* LBA address */
        unsigned disk = 0;
        extern ksleep(int);

        printf("ATA BAR %x %x %x %x %x %x -- INT INFO %x\n",
                ata_bar[0], ata_bar[1], ata_bar[2],
                ata_bar[3], ata_bar[4], ata_bar[5],
                ata_int_inf);

        if (ata_bar[0] < 2) {
                ata_base = 0x1F0;
        } else {
                ata_base = ata_bar[0];
        }
        if (ata_bar[1] > 2) {
                ata_alts = ata_bar[1]+2;
        } else {
                ata_alts = 0x3F6;
        }
        printf("base = %x, alt status = %x\n", ata_base, ata_alts);

        prdt->addr = (unsigned)buffer;
        prdt->siz = 512;     /* count in bytes. 512 bytes = 0x200 = 1 sect */
        prdt->end = 0x8000; /* End Of Table bit set */


        atawait();

        atabsw(4, prdt, 4);     /* set prdt pointer */

        /* enable ata controller */
        outb(ata_base+1, 1);
        outb(ata_alts, 0);


        /* reset ata */
        outb(ata_alts, 4);
        ksleep(1);
        outb(ata_alts, 0);

        atawait();

        atabsw(2, 4, 1);        /* reset interrupt bit */

        /* Read */

        outb(ata_base+6, 0xE0 | (disk << 4) | ((addr<<24) & 0x0f) );
        outb(ata_base+2, 1);    /* sector count */
        outb(ata_base+3, (unsigned char)addr);   /* low addr */
        outb(ata_base+4, (unsigned char)(addr>>8)); /* mid addr */
        outb(ata_base+5, (unsigned char)(addr>>16)); /* high addr */


        ataint = 0;
        printf("waiting for int\n");

        outb(ata_base+7, 0xC8);     /* cmd read 28 dma */

    atabsw(2, 4, 1);    /* reset interrupt bit */
        atabsw(0, 8|1 ,1);  /* set start bit and read bit */

        while(!ataint)
        ;

        printf("=%s\n",buffer);

}

atint1()
{
        ataint = 1;
        printf("ATA INT 1 \n");
}

atint2()
{
        printf("ATA INT 2 \n");
}

/* bus master write - len in bytes */
atabsw(int offset, unsigned val, int len)
{
        if (ata_bar[4] == 0)
        {
error:
                printf("atabsw cannot comply\n");
                return -1;
        }
        switch (len) {
                case 1:
                        outb(offset+(ata_bar[4] & (~1)),val);
                        break;
                case 2:
                        outw(offset+(ata_bar[4] & (~1)),val);
                        break;
                case 4:
                        outl(offset+(ata_bar[4] & (~1)),val);
                        break;
                default:
                        goto error;
        }
}

/* wait until not busy */
atawait()
{
        int i;
        extern ksleep(int);
        for (i = ATATIMEOUT; i > 0; i--) {
                if ( !(inb(ata_base+7) & (1<<7))  )  /* read busy flag */
                        return;
                ksleep(1);
        }
        printf(" ata timeout\n");
        return -1;
}