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#define DD_MOSI 5
#define DD_MISO 6
#define DD_SCK 7
#define DDR_SPI DDRB

#define REG_SYNCVALUE1  0x2F



void spi_init(void)
{
    DDR_SPI = (1<<DD_MOSI)|(1<<DD_SCK)|(0<<DD_MISO);
    SPCR = (1<<SPE)|(1<<MSTR)|(1<<SPR0)|(0<<DORD)|(0<<CPOL)|(0<<CPHA);
}

uint8_t spi_transfer(uint8_t val)
{
    SPDR = val;
    while(!(SPDR & (1<<SPIF)));

    return SPDR;
}


int main()
{
    spi_init();

    DDRD |= (1<<PD7);
    PORTD |= (1<<PD7); // SS

    char s[8];

    while(1)
    {
        PORTD &= ~(1<<PD7); //select
        spi_transfer(REG_SYNCVALUE1 | 0x80);
        spi_transfer(0x55);
        PORTD |= (1<<PD7); //unselect

        PORTD &= ~(1<<PD7); //select
        spi_transfer(REG_SYNCVALUE1 & 0x7F);
        uint8_t resu = spi_transfer(0);
        PORTD |= (1<<PD7); //unselect

        itoa( resu, s, 10);
        uart_puts("Result:\n");
        uart_puts(s);

        _delay_ms(5000);
    }
    return 0;
}