entity spinwheel is
port( fast_clock : IN STD_LOGIC;
      resetb : IN STD_LOGIC;
      spin_result : OUT UNSIGNED(5 downto 0));
end;

component spinwheel is
port( fast_clock : IN STD_LOGIC;
      resetb : IN STD_LOGIC;
      spin_result : OUT UNSIGNED(5 downto 0));
end component;

block1: spinwheel port map(
                           fast_clock,
                           KEY(0),
                           spin_result);