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  1. From 53e587aa5ca81497d0ea6e340320ec5778d1f311 Mon Sep 17 00:00:00 2001
  2. From: Chris Wilson <chris@chris-wilson.co.uk>
  3. Date: Thu, 15 Nov 2012 11:32:18 +0000
  4. Subject: drm/i915: Fix detection of base of stolen memory
  5.  
  6. commit e12a2d53ae45a69aea499b64f75e7222cca0f12f upstream.
  7.  
  8. The routine to query the base of stolen memory was using the wrong
  9. registers and the wrong encodings on virtually every platform.
  10.  
  11. It was not until the G33 refresh, that a PCI config register was
  12. introduced that explicitly said where the stolen memory was. Prior to
  13. 865G there was not even a register that said where the end of usable
  14. low memory was and where the stolen memory began (or ended depending
  15. upon chipset). Before then, one has to look at the BIOS memory maps to
  16. find the Top of Memory. Alas that is not exported by arch/x86 and so we
  17. have to resort to disabling stolen memory on gen2 for the time being.
  18.  
  19. Then SandyBridge enlarged the PCI register to a full 32-bits and change
  20. the encoding of the address, so even though we happened to be querying
  21. the right register, we read the wrong bits and ended up using address 0
  22. for our stolen data, i.e. notably FBC.
  23.  
  24. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
  25. Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
  26. [bwh: Backported to 3.2: adjust filename, context]
  27. Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
  28. ---
  29. diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
  30. index ca67338..c77fc67 100644
  31. --- a/drivers/gpu/drm/i915/i915_dma.c
  32. +++ b/drivers/gpu/drm/i915/i915_dma.c
  33. @@ -1007,56 +1007,50 @@ intel_teardown_mchbar(struct drm_device *dev)
  34.         release_resource(&dev_priv->mch_res);
  35.  }
  36.  
  37. -#define PTE_ADDRESS_MASK       0xfffff000
  38. -#define PTE_ADDRESS_MASK_HIGH      0x000000f0 /* i915+ */
  39. -#define PTE_MAPPING_TYPE_UNCACHED  (0 << 1)
  40. -#define PTE_MAPPING_TYPE_DCACHE        (1 << 1) /* i830 only */
  41. -#define PTE_MAPPING_TYPE_CACHED        (3 << 1)
  42. -#define PTE_MAPPING_TYPE_MASK      (3 << 1)
  43. -#define PTE_VALID          (1 << 0)
  44. -
  45. -/**
  46. - * i915_stolen_to_phys - take an offset into stolen memory and turn it into
  47. - *                       a physical one
  48. - * @dev: drm device
  49. - * @offset: address to translate
  50. - *
  51. - * Some chip functions require allocations from stolen space and need the
  52. - * physical address of the memory in question.
  53. - */
  54. -static unsigned long i915_stolen_to_phys(struct drm_device *dev, u32 offset)
  55. +static unsigned long i915_stolen_to_physical(struct drm_device *dev)
  56.  {
  57.     struct drm_i915_private *dev_priv = dev->dev_private;
  58.     struct pci_dev *pdev = dev_priv->bridge_dev;
  59.     u32 base;
  60.  
  61. -#if 0
  62.     /* On the machines I have tested the Graphics Base of Stolen Memory
  63. -    * is unreliable, so compute the base by subtracting the stolen memory
  64. -    * from the Top of Low Usable DRAM which is where the BIOS places
  65. -    * the graphics stolen memory.
  66. +    * is unreliable, so on those compute the base by subtracting the
  67. +    * stolen memory from the Top of Low Usable DRAM which is where the
  68. +    * BIOS places the graphics stolen memory.
  69. +    *
  70. +    * On gen2, the layout is slightly different with the Graphics Segment
  71. +    * immediately following Top of Memory (or Top of Usable DRAM). Note
  72. +    * it appears that TOUD is only reported by 865g, so we just use the
  73. +    * top of memory as determined by the e820 probe.
  74. +    *
  75. +    * XXX gen2 requires an unavailable symbol and 945gm fails with
  76. +    * its value of TOLUD.
  77.      */
  78. -   if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
  79. -       /* top 32bits are reserved = 0 */
  80. +   base = 0;
  81. +   if (INTEL_INFO(dev)->gen >= 6) {
  82. +       /* Read Base Data of Stolen Memory Register (BDSM) directly.
  83. +        * Note that there is also a MCHBAR miror at 0x1080c0 or
  84. +        * we could use device 2:0x5c instead.
  85. +       */
  86. +       pci_read_config_dword(pdev, 0xB0, &base);
  87. +       base &= ~4095; /* lower bits used for locking register */
  88. +   } else if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
  89. +       /* Read Graphics Base of Stolen Memory directly */
  90.         pci_read_config_dword(pdev, 0xA4, &base);
  91. -   } else {
  92. -       /* XXX presume 8xx is the same as i915 */
  93. -       pci_bus_read_config_dword(pdev->bus, 2, 0x5C, &base);
  94. -   }
  95. -#else
  96. -   if (INTEL_INFO(dev)->gen > 3 || IS_G33(dev)) {
  97. -       u16 val;
  98. -       pci_read_config_word(pdev, 0xb0, &val);
  99. -       base = val >> 4 << 20;
  100. -   } else {
  101. +#if 0
  102. +   } else if (IS_GEN3(dev)) {
  103.         u8 val;
  104. +       /* Stolen is immediately below Top of Low Usable DRAM */
  105.         pci_read_config_byte(pdev, 0x9c, &val);
  106.         base = val >> 3 << 27;
  107. -   }
  108. -   base -= dev_priv->mm.gtt->stolen_size;
  109. +       base -= dev_priv->mm.gtt->stolen_size;
  110. +   } else {
  111. +       /* Stolen is immediately above Top of Memory */
  112. +       base = max_low_pfn_mapped << PAGE_SHIFT;
  113.  #endif
  114. +   }
  115.  
  116. -   return base + offset;
  117. +   return base;
  118.  }
  119.  
  120.  static void i915_warn_stolen(struct drm_device *dev)
  121. @@ -1081,7 +1075,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
  122.     if (!compressed_fb)
  123.         goto err;
  124.  
  125. -   cfb_base = i915_stolen_to_phys(dev, compressed_fb->start);
  126. +   cfb_base = dev_priv->mm.stolen_base + compressed_fb->start;
  127.     if (!cfb_base)
  128.         goto err_fb;
  129.  
  130. @@ -1094,7 +1088,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
  131.         if (!compressed_llb)
  132.             goto err_fb;
  133.  
  134. -       ll_base = i915_stolen_to_phys(dev, compressed_llb->start);
  135. +       ll_base = dev_priv->mm.stolen_base + compressed_llb->start;
  136.         if (!ll_base)
  137.             goto err_llb;
  138.     }
  139. @@ -1113,7 +1107,7 @@ static void i915_setup_compression(struct drm_device *dev, int size)
  140.     }
  141.  
  142.     DRM_DEBUG_KMS("FBC base 0x%08lx, ll base 0x%08lx, size %dM\n",
  143. -             cfb_base, ll_base, size >> 20);
  144. +             (long)cfb_base, (long)ll_base, size >> 20);
  145.     return;
  146.  
  147.  err_llb:
  148. @@ -1187,6 +1181,13 @@ static int i915_load_gem_init(struct drm_device *dev)
  149.     gtt_size = dev_priv->mm.gtt->gtt_total_entries << PAGE_SHIFT;
  150.     mappable_size = dev_priv->mm.gtt->gtt_mappable_entries << PAGE_SHIFT;
  151.  
  152. +   dev_priv->mm.stolen_base = i915_stolen_to_physical(dev);
  153. +   if (dev_priv->mm.stolen_base == 0)
  154. +       return 0;
  155. +
  156. +   DRM_DEBUG_KMS("found %d bytes of stolen memory at %08lx\n",
  157. +             dev_priv->mm.gtt->stolen_size, dev_priv->mm.stolen_base);
  158. +
  159.     /* Basic memrange allocator for stolen space */
  160.     drm_mm_init(&dev_priv->mm.stolen, 0, prealloc_size);
  161.  
  162. diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
  163. index 144d37c..20cd295 100644
  164. --- a/drivers/gpu/drm/i915/i915_drv.h
  165. +++ b/drivers/gpu/drm/i915/i915_drv.h
  166. @@ -581,6 +581,7 @@ typedef struct drm_i915_private {
  167.         unsigned long gtt_start;
  168.         unsigned long gtt_mappable_end;
  169.         unsigned long gtt_end;
  170. +       unsigned long stolen_base; /* limited to low memory (32-bit) */
  171.  
  172.         struct io_mapping *gtt_mapping;
  173.         int gtt_mtrr;
  174. --
  175. cgit v0.9.1
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