diff --git a/arch/arm/mach-sun7i/clock/clock.c b/arch/arm/mach-sun7i/clock/clock.c
index 26fe462..9fd2ab9 100644
--- a/arch/arm/mach-sun7i/clock/clock.c
+++ b/arch/arm/mach-sun7i/clock/clock.c
@@ -126,6 +126,28 @@ int clk_init(void)
         }
     }

+    if (script_parser_fetch("clock", "apb1", &val, sizeof(int)) == 0) {
+        struct clk *tmpClk;
+        __u32 tmpRate, min, max;
+        CCU_INF("script config apb1 to %dMHz\n", val);
+        clk = &aw_clock[AW_SYS_CLK_APB1];
+        tmpClk = &aw_clock[AW_SYS_CLK_PLL62];
+        CCU_INF("apb1 0 clock was %lu\n", clk_get_rate(clk));
+        clk_set_parent(clk, tmpClk);
+        tmpRate = clk_get_rate(tmpClk) / 1000000;
+        CCU_INF("apb1 new parent clock is %lu\n", clk_get_rate(clk_get_parent(clk)));
+        min = (tmpRate / (8 * 32));
+        max = tmpRate;
+        if (val >= min && val <= max) {
+            clk_enable(clk);
+            clk_set_rate(clk, val * 1000000);
+            CCU_INF("apb1 new clock is %lu\n", clk_get_rate(clk));
+        } else {
+            CCU_ERR("    invalid apb1 value, must in %dMHz ~ %dGHz\n", min, max);
+        }
+    }
+
+
     return 0;
 }
 arch_initcall(clk_init);
diff --git a/arch/arm/mach-sun7i/clock/sys_clk.c b/arch/arm/mach-sun7i/clock/sys_clk.c
index 0928935..8658a30 100644
--- a/arch/arm/mach-sun7i/clock/sys_clk.c
+++ b/arch/arm/mach-sun7i/clock/sys_clk.c
@@ -903,6 +903,8 @@ static int sys_clk_set_rate(__aw_ccu_clk_id_e id, __u64 rate)
             aw_ccu_reg->Apb1ClkDiv.PreDiv = tmpDivP;
             aw_ccu_reg->Apb1ClkDiv.ClkDiv = tmpDivM;

+            CCU_INF("apb1 new config preDiv %d ClkDiv %d\n", tmpDivP, tmpDivM);
+
             return 0;
         }
         default: {
diff --git a/drivers/tty/serial/8250/8250_sunxi.c b/drivers/tty/serial/8250/8250_sunxi.c
index 25fdcff..17560d3 100644
--- a/drivers/tty/serial/8250/8250_sunxi.c
+++ b/drivers/tty/serial/8250/8250_sunxi.c
@@ -212,8 +212,8 @@ static int __devinit sw_serial_probe(struct platform_device *dev)
        port.serial_out = sw_serial_out32;
        port.handle_irq = sw_serial_handle_irq;

-       pr_info("serial probe %d irq %d mapbase 0x%08x\n", dev->id,
-               sport->irq, sport->mmres->start);
+       pr_info("serial probe %d irq %d mapbase 0x%08x uartclk %u\n", dev->id,
+               sport->irq, sport->mmres->start, port.uartclk);
        ret = serial8250_register_port(&port);
        if (ret < 0)
                goto free_dev;