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- BS1 recording 30sec
- usb read write log
- bmRequestType bRequest wValue wIndex wLength Data...
- 2015-12-13 08:38:26,311 DEBUG: open
- 2015-12-13 08:38:26,311 DEBUG: open_usb_device
- 2015-12-13 08:38:26,313 DEBUG: device found 3275 0085
- 2015-12-13 08:38:26,313 DEBUG: open_usb_bridge
- 2015-12-13 08:38:26,313 DEBUG: read_usb_bridge
- 2015-12-13 08:38:26,314 DEBUG: read reg c0 00 00 0a 01 72
- 2015-12-13 08:38:26,314 DEBUG: read_usb_bridge
- 2015-12-13 08:38:26,314 DEBUG: read reg c0 00 00 0c 01 00
- 2015-12-13 08:38:26,314 DEBUG: read_usb_bridge
- 2015-12-13 08:38:26,314 DEBUG: read reg c0 00 00 0b 01 82
- 2015-12-13 08:38:26,324 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,325 DEBUG: write reg 40 00 00 80 01 ff
- 2015-12-13 08:38:26,325 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,325 DEBUG: write reg 40 00 00 0d 01 ff
- 2015-12-13 08:38:26,335 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,335 DEBUG: write reg 40 00 00 80 01 fd
- 2015-12-13 08:38:26,335 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,336 DEBUG: write reg 40 00 00 73 01 fd
- 2015-12-13 08:38:26,336 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,336 DEBUG: write reg 40 00 00 0d 01 42
- 2015-12-13 08:38:26,346 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,346 DEBUG: write reg 40 00 00 06 01 40
- 2015-12-13 08:38:26,346 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,346 DEBUG: write reg 40 00 00 15 01 20
- 2015-12-13 08:38:26,347 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,347 DEBUG: write reg 40 00 00 16 01 20
- 2015-12-13 08:38:26,347 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,347 DEBUG: write reg 40 00 00 17 01 20
- 2015-12-13 08:38:26,347 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,347 DEBUG: write reg 40 00 00 18 01 00
- 2015-12-13 08:38:26,347 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,347 DEBUG: write reg 40 00 00 19 01 00
- 2015-12-13 08:38:26,347 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,348 DEBUG: write reg 40 00 00 1a 01 00
- 2015-12-13 08:38:26,348 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,348 DEBUG: write reg 40 00 00 23 01 00
- 2015-12-13 08:38:26,348 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,348 DEBUG: write reg 40 00 00 24 01 00
- 2015-12-13 08:38:26,348 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,348 DEBUG: write reg 40 00 00 26 01 00
- 2015-12-13 08:38:26,348 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,348 DEBUG: write reg 40 00 00 13 01 08
- 2015-12-13 08:38:26,349 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,349 DEBUG: write reg 40 00 00 12 01 27
- 2015-12-13 08:38:26,349 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,349 DEBUG: write reg 40 00 00 0c 01 10
- 2015-12-13 08:38:26,349 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,349 DEBUG: write reg 40 00 00 27 01 00
- 2015-12-13 08:38:26,349 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,349 DEBUG: write reg 40 00 00 10 01 00
- 2015-12-13 08:38:26,349 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,350 DEBUG: write reg 40 00 00 11 01 11
- 2015-12-13 08:38:26,350 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,350 DEBUG: write reg 40 00 00 50 01 01
- 2015-12-13 08:38:26,350 DEBUG: open_demodulator
- 2015-12-13 08:38:26,350 DEBUG: write_demodulator
- 2015-12-13 08:38:26,350 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,352 DEBUG: write i2c 40 02 00 28 02 01 80
- 2015-12-13 08:38:26,353 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,363 DEBUG: write_demodulator
- 2015-12-13 08:38:26,363 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,365 DEBUG: write i2c 40 02 00 28 02 0e 77
- 2015-12-13 08:38:26,365 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,366 DEBUG: write_demodulator
- 2015-12-13 08:38:26,366 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,368 DEBUG: write i2c 40 02 00 28 02 0f 77
- 2015-12-13 08:38:26,368 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,368 DEBUG: sleep_demodulator
- 2015-12-13 08:38:26,368 DEBUG: write_demodulator
- 2015-12-13 08:38:26,369 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,371 DEBUG: write i2c 40 02 00 28 02 03 f0
- 2015-12-13 08:38:26,371 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,371 DEBUG: write_demodulator
- 2015-12-13 08:38:26,371 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,374 DEBUG: write i2c 40 02 00 2a 02 01 90
- 2015-12-13 08:38:26,374 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,384 DEBUG: write_demodulator
- 2015-12-13 08:38:26,384 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,387 DEBUG: write i2c 40 02 00 2a 02 52 89
- 2015-12-13 08:38:26,387 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,387 DEBUG: write_demodulator
- 2015-12-13 08:38:26,387 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,389 DEBUG: write i2c 40 02 00 2a 02 53 b3
- 2015-12-13 08:38:26,390 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,390 DEBUG: write_demodulator
- 2015-12-13 08:38:26,390 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,392 DEBUG: write i2c 40 02 00 2a 02 5a 2d
- 2015-12-13 08:38:26,392 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,393 DEBUG: write_demodulator
- 2015-12-13 08:38:26,393 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,395 DEBUG: write i2c 40 02 00 2a 02 5b d3
- 2015-12-13 08:38:26,395 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,395 DEBUG: write_demodulator
- 2015-12-13 08:38:26,396 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,398 DEBUG: write i2c 40 02 00 2a 02 51 b0
- 2015-12-13 08:38:26,398 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,398 DEBUG: write_demodulator
- 2015-12-13 08:38:26,398 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,401 DEBUG: write i2c 40 02 00 2a 02 10 b1
- 2015-12-13 08:38:26,401 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,401 DEBUG: write_demodulator
- 2015-12-13 08:38:26,401 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,404 DEBUG: write i2c 40 02 00 2a 02 11 40
- 2015-12-13 08:38:26,404 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,404 DEBUG: write_demodulator
- 2015-12-13 08:38:26,404 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,407 DEBUG: write i2c 40 02 00 2a 02 85 7a
- 2015-12-13 08:38:26,407 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,407 DEBUG: write_demodulator
- 2015-12-13 08:38:26,407 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,410 DEBUG: write i2c 40 02 00 2a 02 87 04
- 2015-12-13 08:38:26,410 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,510 DEBUG: write_demodulator
- 2015-12-13 08:38:26,510 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,513 DEBUG: write i2c 40 02 00 2a 02 07 01
- 2015-12-13 08:38:26,513 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,513 DEBUG: write_demodulator
- 2015-12-13 08:38:26,513 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,516 DEBUG: write i2c 40 02 00 2a 02 08 10
- 2015-12-13 08:38:26,516 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,516 DEBUG: write_demodulator
- 2015-12-13 08:38:26,517 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,519 DEBUG: write i2c 40 02 00 2a 02 8e 24
- 2015-12-13 08:38:26,519 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,519 DEBUG: open_tuner
- 2015-12-13 08:38:26,519 DEBUG: write_tuner
- 2015-12-13 08:38:26,520 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,523 DEBUG: write i2c 40 02 00 2a 04 fe c2 01 0c
- 2015-12-13 08:38:26,523 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,524 DEBUG: write_tuner
- 2015-12-13 08:38:26,525 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,528 DEBUG: write i2c 40 02 00 2a 04 fe c2 01 1c
- 2015-12-13 08:38:26,528 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,528 DEBUG: read_tuner
- 2015-12-13 08:38:26,528 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,531 DEBUG: write i2c 40 02 00 2a 03 fe c2 00
- 2015-12-13 08:38:26,531 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,531 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,534 DEBUG: write i2c 40 02 00 2a 02 fe c3
- 2015-12-13 08:38:26,534 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,534 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,536 DEBUG: read i2c c0 02 00 2a 01 68
- 2015-12-13 08:38:26,537 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,537 DEBUG: wake_up_tuner
- 2015-12-13 08:38:26,537 DEBUG: write_tuner
- 2015-12-13 08:38:26,537 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,540 DEBUG: write i2c 40 02 00 2a 04 fe c2 01 1e
- 2015-12-13 08:38:26,540 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,541 DEBUG: write_tuner
- 2015-12-13 08:38:26,541 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,544 DEBUG: write i2c 40 02 00 2a 04 fe c2 05 f7
- 2015-12-13 08:38:26,544 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,545 DEBUG: write_tuner
- 2015-12-13 08:38:26,546 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,549 DEBUG: write i2c 40 02 00 2a 04 fe c2 0c 43
- 2015-12-13 08:38:26,549 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,569 DEBUG: write_tuner
- 2015-12-13 08:38:26,569 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,572 DEBUG: write i2c 40 02 00 2a 04 fe c2 01 1e
- 2015-12-13 08:38:26,573 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,573 DEBUG: write_tuner
- 2015-12-13 08:38:26,573 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,576 DEBUG: write i2c 40 02 00 2a 04 fe c2 02 c0
- 2015-12-13 08:38:26,576 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,576 DEBUG: write_tuner
- 2015-12-13 08:38:26,576 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,580 DEBUG: write i2c 40 02 00 2a 04 fe c2 03 10
- 2015-12-13 08:38:26,580 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,580 DEBUG: write_tuner
- 2015-12-13 08:38:26,580 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,583 DEBUG: write i2c 40 02 00 2a 04 fe c2 04 bc
- 2015-12-13 08:38:26,583 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,583 DEBUG: write_tuner
- 2015-12-13 08:38:26,584 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,587 DEBUG: write i2c 40 02 00 2a 04 fe c2 05 c1
- 2015-12-13 08:38:26,587 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,587 DEBUG: write_tuner
- 2015-12-13 08:38:26,587 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,590 DEBUG: write i2c 40 02 00 2a 04 fe c2 06 20
- 2015-12-13 08:38:26,591 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,591 DEBUG: write_tuner
- 2015-12-13 08:38:26,591 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,594 DEBUG: write i2c 40 02 00 2a 04 fe c2 07 33
- 2015-12-13 08:38:26,594 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,594 DEBUG: write_tuner
- 2015-12-13 08:38:26,595 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,598 DEBUG: write i2c 40 02 00 2a 04 fe c2 08 03
- 2015-12-13 08:38:26,598 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,598 DEBUG: write_tuner
- 2015-12-13 08:38:26,598 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,601 DEBUG: write i2c 40 02 00 2a 04 fe c2 09 00
- 2015-12-13 08:38:26,601 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,602 DEBUG: write_tuner
- 2015-12-13 08:38:26,602 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,605 DEBUG: write i2c 40 02 00 2a 04 fe c2 0a 00
- 2015-12-13 08:38:26,605 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,605 DEBUG: write_tuner
- 2015-12-13 08:38:26,605 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,608 DEBUG: write i2c 40 02 00 2a 04 fe c2 0b 00
- 2015-12-13 08:38:26,609 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,609 DEBUG: write_tuner
- 2015-12-13 08:38:26,609 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,612 DEBUG: write i2c 40 02 00 2a 04 fe c2 0c 43
- 2015-12-13 08:38:26,612 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,613 DEBUG: write_tuner
- 2015-12-13 08:38:26,613 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,616 DEBUG: write i2c 40 02 00 2a 04 fe c2 11 ff
- 2015-12-13 08:38:26,616 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,616 DEBUG: write_tuner
- 2015-12-13 08:38:26,616 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,619 DEBUG: write i2c 40 02 00 2a 04 fe c2 12 f3
- 2015-12-13 08:38:26,620 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,620 DEBUG: write_tuner
- 2015-12-13 08:38:26,620 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,623 DEBUG: write i2c 40 02 00 2a 04 fe c2 13 00
- 2015-12-13 08:38:26,623 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,624 DEBUG: write_tuner
- 2015-12-13 08:38:26,624 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,627 DEBUG: write i2c 40 02 00 2a 04 fe c2 14 3f
- 2015-12-13 08:38:26,627 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,627 DEBUG: write_tuner
- 2015-12-13 08:38:26,627 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,630 DEBUG: write i2c 40 02 00 2a 04 fe c2 15 25
- 2015-12-13 08:38:26,631 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,631 DEBUG: write_tuner
- 2015-12-13 08:38:26,631 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,634 DEBUG: write i2c 40 02 00 2a 04 fe c2 16 5c
- 2015-12-13 08:38:26,634 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,635 DEBUG: write_tuner
- 2015-12-13 08:38:26,635 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,638 DEBUG: write i2c 40 02 00 2a 04 fe c2 17 d6
- 2015-12-13 08:38:26,638 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,638 DEBUG: write_tuner
- 2015-12-13 08:38:26,638 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,641 DEBUG: write i2c 40 02 00 2a 04 fe c2 18 55
- 2015-12-13 08:38:26,642 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,642 DEBUG: write_tuner
- 2015-12-13 08:38:26,642 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,645 DEBUG: write i2c 40 02 00 2a 04 fe c2 19 cf
- 2015-12-13 08:38:26,645 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,646 DEBUG: write_tuner
- 2015-12-13 08:38:26,646 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,649 DEBUG: write i2c 40 02 00 2a 04 fe c2 1a 95
- 2015-12-13 08:38:26,649 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,649 DEBUG: write_tuner
- 2015-12-13 08:38:26,649 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,652 DEBUG: write i2c 40 02 00 2a 04 fe c2 1b f6
- 2015-12-13 08:38:26,653 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,653 DEBUG: write_tuner
- 2015-12-13 08:38:26,653 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,656 DEBUG: write i2c 40 02 00 2a 04 fe c2 1c 36
- 2015-12-13 08:38:26,656 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,657 DEBUG: write_tuner
- 2015-12-13 08:38:26,657 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,660 DEBUG: write i2c 40 02 00 2a 04 fe c2 1d f2
- 2015-12-13 08:38:26,660 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,660 DEBUG: write_tuner
- 2015-12-13 08:38:26,661 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,664 DEBUG: write i2c 40 02 00 2a 04 fe c2 1e 09
- 2015-12-13 08:38:26,664 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,664 DEBUG: write_tuner
- 2015-12-13 08:38:26,664 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,667 DEBUG: write i2c 40 02 00 2a 04 fe c2 1f 00
- 2015-12-13 08:38:26,668 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,668 DEBUG: set_channel
- 2015-12-13 08:38:26,668 DEBUG: set_channel_s
- 2015-12-13 08:38:26,668 DEBUG: set_frequency_s
- 2015-12-13 08:38:26,668 DEBUG: write_tuner
- 2015-12-13 08:38:26,669 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,672 DEBUG: write i2c 40 02 00 2a 04 fe c2 02 b0
- 2015-12-13 08:38:26,672 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,672 DEBUG: write_tuner
- 2015-12-13 08:38:26,672 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,675 DEBUG: write i2c 40 02 00 2a 04 fe c2 06 11
- 2015-12-13 08:38:26,676 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,676 DEBUG: write_tuner
- 2015-12-13 08:38:26,676 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,679 DEBUG: write i2c 40 02 00 2a 04 fe c2 07 35
- 2015-12-13 08:38:26,679 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,679 DEBUG: write_tuner
- 2015-12-13 08:38:26,680 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,683 DEBUG: write i2c 40 02 00 2a 04 fe c2 08 09
- 2015-12-13 08:38:26,683 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,683 DEBUG: write_tuner
- 2015-12-13 08:38:26,683 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,686 DEBUG: write i2c 40 02 00 2a 04 fe c2 09 06
- 2015-12-13 08:38:26,687 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,687 DEBUG: write_tuner
- 2015-12-13 08:38:26,687 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,690 DEBUG: write i2c 40 02 00 2a 04 fe c2 0a 00
- 2015-12-13 08:38:26,690 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,690 DEBUG: write_tuner
- 2015-12-13 08:38:26,691 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,694 DEBUG: write i2c 40 02 00 2a 04 fe c2 0b 00
- 2015-12-13 08:38:26,694 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,694 DEBUG: write_tuner
- 2015-12-13 08:38:26,694 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,697 DEBUG: write i2c 40 02 00 2a 04 fe c2 0c 03
- 2015-12-13 08:38:26,698 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,698 DEBUG: write_tuner
- 2015-12-13 08:38:26,698 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,701 DEBUG: write i2c 40 02 00 2a 04 fe c2 0c c3
- 2015-12-13 08:38:26,701 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,721 DEBUG: write_tuner
- 2015-12-13 08:38:26,722 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,725 DEBUG: write i2c 40 02 00 2a 04 fe c2 08 09
- 2015-12-13 08:38:26,725 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,725 DEBUG: write_tuner
- 2015-12-13 08:38:26,725 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,728 DEBUG: write i2c 40 02 00 2a 04 fe c2 13 20
- 2015-12-13 08:38:26,729 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,729 DEBUG: write_demodulator
- 2015-12-13 08:38:26,729 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,731 DEBUG: write i2c 40 02 00 2a 02 03 01
- 2015-12-13 08:38:26,732 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,732 DEBUG: lock_tuner_s
- 2015-12-13 08:38:26,732 DEBUG: is_lock_tuner_s
- 2015-12-13 08:38:26,732 DEBUG: read_tuner
- 2015-12-13 08:38:26,732 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,735 DEBUG: write i2c 40 02 00 2a 03 fe c2 0d
- 2015-12-13 08:38:26,735 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,736 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,738 DEBUG: write i2c 40 02 00 2a 02 fe c3
- 2015-12-13 08:38:26,738 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,739 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,741 DEBUG: read i2c c0 02 00 2a 01 4f
- 2015-12-13 08:38:26,741 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,741 DEBUG: demodulate_tmcc
- 2015-12-13 08:38:26,741 DEBUG: read_demodulator
- 2015-12-13 08:38:26,741 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,743 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,744 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,745 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,745 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,755 DEBUG: read_demodulator
- 2015-12-13 08:38:26,755 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,757 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,758 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,759 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,759 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,769 DEBUG: read_demodulator
- 2015-12-13 08:38:26,769 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,771 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,772 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,773 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,773 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,783 DEBUG: read_demodulator
- 2015-12-13 08:38:26,783 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,785 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,786 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,787 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,787 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,797 DEBUG: read_demodulator
- 2015-12-13 08:38:26,797 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,799 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,800 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,801 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,801 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,811 DEBUG: read_demodulator
- 2015-12-13 08:38:26,811 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,813 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,814 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,815 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,815 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,825 DEBUG: read_demodulator
- 2015-12-13 08:38:26,825 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,827 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,828 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,829 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,829 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,839 DEBUG: read_demodulator
- 2015-12-13 08:38:26,839 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,842 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,842 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,843 DEBUG: read i2c c0 02 00 2a 01 50
- 2015-12-13 08:38:26,843 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,853 DEBUG: read_demodulator
- 2015-12-13 08:38:26,853 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,856 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,856 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,857 DEBUG: read i2c c0 02 00 2a 01 10
- 2015-12-13 08:38:26,857 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,867 DEBUG: read_demodulator
- 2015-12-13 08:38:26,867 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,870 DEBUG: write i2c 40 03 00 2a 01 c3
- 2015-12-13 08:38:26,870 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,871 DEBUG: read i2c c0 02 00 2a 01 00
- 2015-12-13 08:38:26,871 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,871 DEBUG: set_ts_id
- 2015-12-13 08:38:26,871 DEBUG: write_demodulator
- 2015-12-13 08:38:26,872 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,874 DEBUG: write i2c 40 02 00 2a 02 8f 40
- 2015-12-13 08:38:26,874 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,874 DEBUG: write_demodulator
- 2015-12-13 08:38:26,875 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,877 DEBUG: write i2c 40 02 00 2a 02 90 f1
- 2015-12-13 08:38:26,877 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,877 DEBUG: check_ts_error
- 2015-12-13 08:38:26,877 DEBUG: read_demodulator
- 2015-12-13 08:38:26,878 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,880 DEBUG: write i2c 40 03 00 2a 01 c5
- 2015-12-13 08:38:26,880 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,881 DEBUG: read i2c c0 02 00 2a 01 a6
- 2015-12-13 08:38:26,881 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,881 DEBUG: get_cnr
- 2015-12-13 08:38:26,881 DEBUG: read_demodulator
- 2015-12-13 08:38:26,882 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,884 DEBUG: write i2c 40 03 00 2a 01 bc
- 2015-12-13 08:38:26,884 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,885 DEBUG: read i2c c0 02 00 2a 01 3d
- 2015-12-13 08:38:26,885 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,885 DEBUG: read_demodulator
- 2015-12-13 08:38:26,886 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:26,888 DEBUG: write i2c 40 03 00 2a 01 bd
- 2015-12-13 08:38:26,888 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,889 DEBUG: read i2c c0 02 00 2a 01 98
- 2015-12-13 08:38:26,889 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:26,889 DEBUG: cnr = 12.732982307236227
- 2015-12-13 08:38:26,889 DEBUG: start_stream
- 2015-12-13 08:38:26,890 DEBUG: write_usb_bridge
- 2015-12-13 08:38:26,890 DEBUG: write reg 40 00 00 5f 01 81
- 2015-12-13 08:38:26,901 DEBUG: stream_reader
- 2015-12-13 08:38:26,902 DEBUG: StreamWriter
- 2015-12-13 08:38:56,912 DEBUG: stop_stream
- 2015-12-13 08:38:56,913 DEBUG: read_usb_bridge
- 2015-12-13 08:38:56,913 DEBUG: read reg c0 00 00 5f 01 81
- 2015-12-13 08:38:56,913 DEBUG: write_usb_bridge
- 2015-12-13 08:38:56,914 DEBUG: write reg 40 00 00 5f 01 80
- 2015-12-13 08:38:57,427 DEBUG: close
- 2015-12-13 08:38:57,427 DEBUG: close_tuner
- 2015-12-13 08:38:57,427 DEBUG: sleep_tuner
- 2015-12-13 08:38:57,427 DEBUG: write_tuner
- 2015-12-13 08:38:57,428 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:57,431 DEBUG: write i2c 40 02 00 2a 04 fe c2 05 c9
- 2015-12-13 08:38:57,431 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:57,431 DEBUG: write_tuner
- 2015-12-13 08:38:57,432 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:57,435 DEBUG: write i2c 40 02 00 2a 04 fe c2 01 17
- 2015-12-13 08:38:57,435 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:57,435 DEBUG: close_demodulator
- 2015-12-13 08:38:57,435 DEBUG: sleep_demodulator
- 2015-12-13 08:38:57,435 DEBUG: write_demodulator
- 2015-12-13 08:38:57,436 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:57,438 DEBUG: write i2c 40 02 00 2a 02 17 ff
- 2015-12-13 08:38:57,438 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:57,438 DEBUG: write_demodulator
- 2015-12-13 08:38:57,439 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:57,441 DEBUG: write i2c 40 02 00 2a 02 15 00
- 2015-12-13 08:38:57,441 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:57,441 DEBUG: write_demodulator
- 2015-12-13 08:38:57,442 DEBUG: write reg 40 00 00 06 01 46
- 2015-12-13 08:38:57,444 DEBUG: write i2c 40 02 00 2a 02 13 80
- 2015-12-13 08:38:57,444 DEBUG: read reg c0 00 00 05 01 00
- 2015-12-13 08:38:57,444 DEBUG: close_usb_brdige
- 2015-12-13 08:38:57,444 DEBUG: write_usb_bridge
- 2015-12-13 08:38:57,445 DEBUG: write reg 40 00 00 5f 01 00
- 2015-12-13 08:38:57,445 DEBUG: write_usb_bridge
- 2015-12-13 08:38:57,445 DEBUG: write reg 40 00 00 80 01 ff
- 2015-12-13 08:38:57,445 DEBUG: write_usb_bridge
- 2015-12-13 08:38:57,445 DEBUG: write reg 40 00 00 0c 01 00
- 2015-12-13 08:38:57,446 DEBUG: close_usb_device
- tsselect log
- pid=0x0000, total= 300, d= 0, e= 0, scrambling=0, offset=49444
- pid=0x0001, total= 3, d= 0, e= 0, scrambling=0, offset=4471580
- pid=0x0010, total= 15, d= 0, e= 0, scrambling=0, offset=4471956
- pid=0x0011, total= 164, d= 0, e= 0, scrambling=0, offset=767040
- pid=0x0012, total= 5839, d= 0, e= 0, scrambling=0, offset=11092
- pid=0x0014, total= 6, d= 0, e= 0, scrambling=0, offset=15988648
- pid=0x0023, total= 17, d= 0, e= 0, scrambling=0, offset=2942764
- pid=0x0024, total= 18, d= 0, e= 0, scrambling=0, offset=9246968
- pid=0x0060, total= 300, d= 0, e= 0, scrambling=0, offset=56588
- pid=0x0100, total= 375715, d= 3, e= 0, scrambling=375715, offset=0
- pid=0x0110, total= 4121, d= 0, e= 0, scrambling=4121, offset=9964
- pid=0x0138, total= 8, d= 0, e= 0, scrambling=0, offset=2550408
- pid=0x0140, total= 39926, d= 0, e= 0, scrambling=39926, offset=376
- pid=0x0160, total= 3858, d= 0, e= 0, scrambling=3858, offset=10904
- pid=0x0161, total= 7809, d= 0, e= 0, scrambling=7809, offset=8836
- pid=0x0162, total= 5131, d= 0, e= 0, scrambling=5131, offset=7708
- pid=0x0170, total= 465, d= 0, e= 0, scrambling=465, offset=21808
- pid=0x0171, total= 1273, d= 0, e= 0, scrambling=1273, offset=50008
- pid=0x01f0, total= 300, d= 0, e= 0, scrambling=0, offset=209244
- pid=0x01ff, total= 1001, d= 0, e= 0, scrambling=0, offset=9400
- pid=0x02f0, total= 300, d= 0, e= 0, scrambling=0, offset=209620
- pid=0x0701, total= 331, d= 0, e= 0, scrambling=0, offset=65424
- pid=0x0900, total= 1375, d= 0, e= 0, scrambling=0, offset=13536
- pid=0x10f0, total= 300, d= 0, e= 0, scrambling=0, offset=49820
- pid=0x11f0, total= 300, d= 0, e= 0, scrambling=0, offset=50196
- pid=0x1780, total= 998, d= 0, e= 0, scrambling=0, offset=76704
- pid=0x17f0, total= 300, d= 0, e= 0, scrambling=0, offset=50572
- pid=0x1fff, total= 92241, d= 0, e= 0, scrambling=0, offset=3008
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