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  1. /*
  2. * Copyright 2013 Freescale Semiconductor, Inc.
  3. *
  4. * Author: Fabio Estevam <fabio.estevam@freescale.com>
  5. *
  6. * Copyright (C) 2014 Jasbir
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. *
  12. */
  13. #include <dt-bindings/gpio/gpio.h>
  14.  
  15. / {
  16. aliases {
  17. mxcfb0 = &mxcfb1;
  18. reg_can_xcvr = &reg_can_xcvr;
  19. };
  20.  
  21. backlight { /* could use pwm1 as backlight */
  22. compatible = "pwm-backlight";
  23. pwms = <&pwm1 0 5000000>;
  24. brightness-levels = <0 4 8 16 32 64 128 255>;
  25. default-brightness-level = <0>;
  26. };
  27.  
  28. /*pwmleds {
  29. compatible = "pwm-leds";
  30. pinctrl-names = "default";
  31. pinctrl-0 = <&pinctrl_pwm1>;
  32.  
  33. front {
  34. active-low;
  35. label = "imx6:pwm:pwm1";
  36. max-brightness = <255>;
  37. pwms = <&pwm1 0 50000>;
  38. };
  39. };*/
  40.  
  41. memory {
  42. reg = <0x10000000 0x40000000>;
  43. };
  44.  
  45. regulators {
  46. compatible = "simple-bus";
  47. #address-cells = <1>;
  48. #size-cells = <0>;
  49.  
  50. reg_usb_h1_vbus: regulator@0 {
  51. compatible = "regulator-fixed";
  52. reg = <0>;
  53. regulator-name = "usb_h1_vbus";
  54. regulator-min-microvolt = <5000000>;
  55. regulator-max-microvolt = <5000000>;
  56. enable-active-high;
  57. startup-delay-us = <2>; /* USB2415 requires a POR of 1 us minimum */
  58. gpio = <&gpio7 12 0>;
  59. };
  60.  
  61. reg_can_xcvr: regulator@1 {
  62. compatible = "regulator-fixed";
  63. reg = <1>;
  64. regulator-name = "CAN XCVR";
  65. regulator-min-microvolt = <3300000>;
  66. regulator-max-microvolt = <3300000>;
  67. regulator-always-on;
  68. enable-active-low;
  69. };
  70.  
  71. reg_usb_otg_vbus: regulator@2 {
  72. compatible = "regulator-fixed";
  73. reg = <2>;
  74. regulator-name = "usb_otg_vbus";
  75. regulator-min-microvolt = <5000000>;
  76. regulator-max-microvolt = <5000000>;
  77. enable-active-high;
  78. };
  79.  
  80. reg_audio: regulator@3 {
  81. compatible = "regulator-fixed";
  82. reg = <3>;
  83. regulator-name = "8962-SUPPLY";
  84. gpio = <&gpio4 10 0>;
  85. enable-active-high;
  86. };
  87.  
  88. reg_sensor: regulator@4 {
  89. compatible = "regulator-fixed";
  90. reg = <4>;
  91. regulator-name = "sensor-SUPPLY";
  92. enable-active-high;
  93. };
  94.  
  95. reg_2p5v: regulator@5 {
  96. compatible = "regulator-fixed";
  97. reg = <5>;
  98. regulator-name = "2P5V";
  99. regulator-min-microvolt = <2500000>;
  100. regulator-max-microvolt = <2500000>;
  101. regulator-always-on;
  102. };
  103.  
  104. reg_lcd0_pwr: regulator@6 {
  105. compatible = "regulator-fixed";
  106. reg = <6>;
  107. regulator-name = "LCD0 POWER";
  108. regulator-min-microvolt = <3300000>;
  109. regulator-max-microvolt = <3300000>;
  110. gpio = <&gpio1 2 0>;
  111. enable-active-high;
  112. regulator-boot-on;
  113. regulator-always-on;
  114. status = "disabled";
  115. };
  116.  
  117. reg_lcd0_backlight: regulator@7 {
  118. compatible = "regulator-fixed";
  119. reg = <7>;
  120. regulator-name = "LCD0 BACKLIGHT";
  121. regulator-min-microvolt = <3300000>;
  122. regulator-max-microvolt = <3300000>;
  123. gpio = <&gpio1 4 0>;
  124. enable-active-high;
  125. regulator-boot-on;
  126. regulator-always-on;
  127. status = "disabled";
  128. };
  129.  
  130. reg_1p8v: regulator@8 {
  131. compatible = "regulator-fixed";
  132. reg = <8>;
  133. regulator-name = "DOVDD";
  134. regulator-min-microvolt = <1800000>;
  135. regulator-max-microvolt = <1800000>;
  136. regulator-always-on;
  137. };
  138.  
  139. reg_1p5v: regulator@9 {
  140. compatible = "regulator-fixed";
  141. reg = <9>;
  142. regulator-name = "1P5V";
  143. regulator-min-microvolt = <1500000>;
  144. regulator-max-microvolt = <1500000>;
  145. regulator-always-on;
  146. };
  147.  
  148. reg_2p8v: regulator@10 {
  149. compatible = "regulator-fixed";
  150. reg = <10>;
  151. regulator-name = "2P8V";
  152. regulator-min-microvolt = <2800000>;
  153. regulator-max-microvolt = <2800000>;
  154. };
  155. };
  156.  
  157. mxcfb1: fb@0 {
  158. compatible = "fsl,mxc_sdc_fb";
  159. disp_dev = "hdmi";
  160. interface_pix_fmt = "RGB24";
  161. mode_str ="";
  162. default_bpp = <32>;
  163. int_clk = <0>;
  164. late_init = <0>;
  165. status = "disabled";
  166. };
  167.  
  168. sound-hdmi {
  169. compatible = "fsl,imx6q-audio-hdmi",
  170. "fsl,imx-audio-hdmi";
  171. model = "imx-audio-hdmi";
  172. hdmi-controller = <&hdmi_audio>;
  173. };
  174.  
  175. sound-spdif {
  176. compatible = "fsl,imx-audio-spdif",
  177. "fsl,imx-sabreauto-spdif";
  178. model = "imx-spdif";
  179. spdif-controller = <&spdif>;
  180. spdif-in;
  181. status = "disabled";
  182. };
  183.  
  184. v4l2_cap_0 {
  185. compatible = "fsl,imx6q-v4l2-capture";
  186. ipu_id = <0>;
  187. csi_id = <0>;
  188. mclk_source = <0>;
  189. status = "okay";
  190. };
  191.  
  192. v4l2_cap_1 {
  193. compatible = "fsl,imx6q-v4l2-capture";
  194. ipu_id = <0>;
  195. csi_id = <1>;
  196. mclk_source = <0>;
  197. status = "okay";
  198. };
  199.  
  200.  
  201. v4l2_out {
  202. compatible = "fsl,mxc_v4l2_output";
  203. status = "okay";
  204. };
  205.  
  206. poweroff {
  207. compatible = "udoo,poweroff";
  208. sam3x_rst_gpio = <&gpio1 0 0>;
  209. pwr_5v_gpio = <&gpio2 4 0>;
  210. };
  211.  
  212. codec: vt1613 {
  213. compatible = "via,vt1613";
  214. };
  215.  
  216. sound {
  217. compatible = "udoo,imx-vt1613-audio";
  218. ssi-controller = <&ssi1>;
  219. audio-codec = <&codec>;
  220. mux-int-port = <1>;
  221. mux-ext-port = <6>;
  222. };
  223.  
  224. onewire {
  225. compatible = "w1-gpio";
  226. gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
  227. linux,open-drain;
  228. pinctrl-names = "default";
  229. pinctrl-0 = <&pinctrl_onewire>;
  230. status = "okay";
  231. };
  232.  
  233. udoo_ard: udoo_ard_manager {
  234. compatible = "udoo,imx6q-udoo-ard";
  235. pinctrl-names = "default";
  236. pinctrl-0 = <&pinctrl_udoo_ard_alt>;
  237. bossac-clk-gpio = <&gpio6 3 GPIO_ACTIVE_LOW>;
  238. bossac-dat-gpio = <&gpio5 18 GPIO_ACTIVE_LOW>;
  239. bossac-erase-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>;
  240. bossac-reset-gpio = <&gpio1 0 GPIO_ACTIVE_LOW>;
  241. status = "okay";
  242. };
  243. };
  244.  
  245. &audmux {
  246. status = "okay";
  247. };
  248.  
  249. &gpc {
  250. fsl,cpu_pupscr_sw2iso = <0xf>;
  251. fsl,cpu_pupscr_sw = <0xf>;
  252. fsl,cpu_pdnscr_iso2sw = <0x1>;
  253. fsl,cpu_pdnscr_iso = <0x1>;
  254. };
  255.  
  256. &hdmi_audio {
  257. status = "okay";
  258. };
  259.  
  260. &hdmi_cec {
  261. pinctrl-names = "default";
  262. pinctrl-0 = <&pinctrl_hdmi_cec>;
  263. status = "okay";
  264. };
  265.  
  266. &hdmi {
  267. ipu_id = <0>;
  268. disp_id = <0>;
  269. status = "okay";
  270. };
  271.  
  272. &hdmi_video {
  273. fsl,phy_reg_vlev = <0x0294>;
  274. fsl,phy_reg_cksymtx = <0x800d>;
  275. status = "okay";
  276. };
  277.  
  278. &ldb { // LVDS display bridge
  279. status = "disabled";
  280. primary;
  281. lvds-channel@0 {
  282. reg = <0>;
  283. fsl,data-mapping = "spwg";
  284. status = "disabled";
  285. primary;
  286. crtc = "ipu1-di0";
  287. };
  288. };
  289.  
  290. &i2c1 {
  291. clock-frequency = <100000>;
  292. pinctrl-names = "default";
  293. pinctrl-0 = <&pinctrl_i2c1>;
  294. status = "okay";
  295. };
  296.  
  297. &i2c2 {
  298. clock-frequency = <100000>;
  299. pinctrl-names = "default";
  300. pinctrl-0 = <&pinctrl_i2c2>;
  301. status = "okay";
  302.  
  303. hdmi_screen: edid@50 {
  304. compatible = "fsl,imx6-hdmi-i2c";
  305. reg = <0x50>;
  306. };
  307. };
  308.  
  309. &i2c3 {
  310. clock-frequency = <100000>;
  311. pinctrl-names = "default";
  312. pinctrl-0 = <&pinctrl_i2c3>;
  313. status = "okay";
  314. touchscreen: st1232@55 {
  315. compatible = "sitronix,st1232";
  316. reg = <0x55>;
  317. interrupt-parent = <&gpio1>;
  318. interrupts = <13 IRQ_TYPE_LEVEL_LOW>;
  319. gpios = <&gpio1 15 0>;
  320. /* udoo poweroff driver */
  321. lcd_panel_on_gpio = <&gpio1 2 1>;
  322. lcd_backlight_gpio = <&gpio1 4 1>;
  323. };
  324.  
  325. ov5640_mipi: ov5640_mipi@3c { /* i2c2 driver */
  326. compatible = "ovti,ov5640_mipi";
  327. reg = <0x3c>;
  328. pinctrl-0 = <&pinctrl_ov5640>;
  329. pinctrl-names = "default";
  330. clocks = <&clks IMX6QDL_CLK_CKO>;
  331. clock-names = "csi_mclk";
  332. DOVDD-supply = <&reg_1p8v>; /* 1.8v */
  333. AVDD-supply = <&reg_2p8v>; /* 2.8v, rev C board is VGEN3
  334. rev B board is VGEN5 */
  335. DVDD-supply = <&reg_1p5v>; /* 1.5v*/
  336. pwn-gpios = <&gpio6 4 1>;
  337. rst-gpios = <&gpio6 5 0>;
  338. csi_id = <0>;
  339. mclk = <22000000>;
  340. mclk_source = <0>;
  341. };
  342. };
  343.  
  344. &fec {
  345. pinctrl-names = "default";
  346. pinctrl-0 = <&pinctrl_enet>;
  347. phy-mode = "rgmii";
  348. phy-poweron = <&gpio2 31 0>;
  349. phy-reset-gpio = <&gpio3 23 0>;
  350. phy-clk125-en = <&gpio6 24 1>;
  351. phy-mode0 = <&gpio6 29 1>;
  352. phy-mode1 = <&gpio6 28 1>;
  353. phy-mode2 = <&gpio6 27 1>;
  354. phy-mode3 = <&gpio6 25 1>;
  355. status = "okay";
  356. };
  357.  
  358. &iomuxc {
  359.  
  360. pinctrl-names = "default";
  361. pinctrl-0 = <&pinctrl_hog>;
  362.  
  363. imx6q-udoo {
  364. pinctrl_hog: hoggrp {
  365. fsl,pins = <
  366. MX6QDL_PAD_NANDF_D4__GPIO2_IO04 0x80000000 /* 5v enable */
  367. MX6QDL_PAD_NANDF_CS0__GPIO6_IO11 0x80000000 /* Vtt suspend */
  368. MX6QDL_PAD_SD2_DAT0__GPIO1_IO15 0x80000000 /* touch reset */
  369.  
  370. MX6QDL_PAD_GPIO_17__GPIO7_IO12 0x80000000 /* usb hub reset */
  371. MX6QDL_PAD_NANDF_CS2__CCM_CLKO2 0x130b0 /* clk usb hub */
  372. MX6QDL_PAD_EIM_WAIT__GPIO5_IO00 0xb0b1 /* usb otg select */
  373.  
  374. MX6QDL_PAD_NANDF_D5__GPIO2_IO05 0x80000000 /* sdcard power */
  375. MX6QDL_PAD_SD3_DAT5__GPIO7_IO00 0x80000000 /* sd card detect */
  376.  
  377. MX6QDL_PAD_DISP0_DAT5__GPIO4_IO26 0x80000000 /* select dbg uart*/
  378.  
  379. MX6QDL_PAD_GPIO_16__GPIO7_IO11 0xb0b1 /* SAM3X vbus_en */
  380. MX6QDL_PAD_SD4_DAT7__GPIO2_IO15 0x80000000 /* SAM3X usb host */
  381.  
  382. MX6QDL_PAD_GPIO_2__GPIO1_IO02 0x80000000 /* panel on */
  383. MX6QDL_PAD_GPIO_4__GPIO1_IO04 0x80000000 /* backlight on */
  384.  
  385. MX6QDL_PAD_EIM_A19__GPIO2_IO19 0x80000000 /* writeprotect spi*/
  386.  
  387. MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x30b1 /* arduino pinout */
  388. >;
  389. };
  390. /*
  391. external_hog: hoggrp-2 {
  392. fsl,pins = <
  393. // External Pinout GPIOs
  394. MX6QDL_PAD_CSI0_DAT11__GPIO5_IO29 0x80000000 // pin 00
  395. MX6QDL_PAD_CSI0_DAT10__GPIO5_IO28 0x80000000 // pin 01
  396. MX6QDL_PAD_SD1_CLK__GPIO1_IO20 0x80000000 // pin 02
  397. MX6QDL_PAD_SD1_DAT0__GPIO1_IO16 0x80000000 // pin 03
  398. MX6QDL_PAD_SD1_DAT1__GPIO1_IO17 0x80000000 // pin 04
  399. MX6QDL_PAD_SD1_CMD__GPIO1_IO18 0x80000000 // pin 05
  400. MX6QDL_PAD_SD4_DAT1__GPIO2_IO09 0x80000000 // pin 06
  401. MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x80000000 // pin 07
  402. MX6QDL_PAD_SD1_DAT3__GPIO1_IO21 0x80000000 // pin 08
  403. MX6QDL_PAD_SD1_DAT2__GPIO1_IO19 0x80000000 // pin 09
  404. MX6QDL_PAD_GPIO_1__GPIO1_IO01 0x80000000 // pin 10
  405. MX6QDL_PAD_GPIO_9__GPIO1_IO09 0x80000000 // pin 11
  406. MX6QDL_PAD_GPIO_3__GPIO1_IO03 0x80000000 // pin 12
  407. MX6QDL_PAD_SD4_DAT0__GPIO2_IO08 0x80000000 // pin 13
  408. MX6QDL_PAD_CSI0_DAT4__GPIO5_IO22 0x80000000 // pin 14
  409. MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x80000000 // pin 15
  410. MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x80000000 // pin 16
  411. MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x80000000 // pin 17
  412. MX6QDL_PAD_CSI0_DAT12__GPIO5_IO30 0x80000000 // pin 18
  413. MX6QDL_PAD_CSI0_DAT13__GPIO5_IO31 0x80000000 // pin 19
  414. // pin 20, 21 in pinctrl_i2c1
  415. MX6QDL_PAD_DISP0_DAT6__GPIO4_IO27 0x80000000 // pin 22
  416. MX6QDL_PAD_DISP0_DAT7__GPIO4_IO28 0x80000000 // pin 23
  417. MX6QDL_PAD_DISP0_DAT8__GPIO4_IO29 0x80000000 // pin 24
  418. MX6QDL_PAD_DISP0_DAT9__GPIO4_IO30 0x80000000 // pin 25
  419. MX6QDL_PAD_DISP0_DAT10__GPIO4_IO31 0x80000000 // pin 26
  420. MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x80000000 // pin 27
  421. MX6QDL_PAD_DISP0_DAT12__GPIO5_IO06 0x80000000 // pin 28
  422. MX6QDL_PAD_DISP0_DAT13__GPIO5_IO07 0x80000000 // pin 29
  423. MX6QDL_PAD_DISP0_DAT14__GPIO5_IO08 0x80000000 // pin 30
  424. MX6QDL_PAD_DISP0_DAT15__GPIO5_IO09 0x80000000 // pin 31
  425. MX6QDL_PAD_DISP0_DAT16__GPIO5_IO10 0x80000000 // pin 32
  426. MX6QDL_PAD_DISP0_DAT17__GPIO5_IO11 0x80000000 // pin 33
  427. MX6QDL_PAD_DISP0_DAT18__GPIO5_IO12 0x80000000 // pin 34
  428. MX6QDL_PAD_DISP0_DAT19__GPIO5_IO13 0x80000000 // pin 35
  429. MX6QDL_PAD_DISP0_DAT20__GPIO5_IO14 0x80000000 // pin 36
  430. MX6QDL_PAD_DISP0_DAT21__GPIO5_IO15 0x80000000 // pin 37
  431. MX6QDL_PAD_EIM_A16__GPIO2_IO22 0x80000000 // pin 38
  432. MX6QDL_PAD_GPIO_18__GPIO7_IO13 0x80000000 // pin 39 KEY_VOL_UP
  433. MX6QDL_PAD_NANDF_D0__GPIO2_IO00 0x80000000 // pin 40 HOME
  434. MX6QDL_PAD_NANDF_D3__GPIO2_IO03 0x80000000 // pin 41 SEARCH
  435. MX6QDL_PAD_NANDF_D2__GPIO2_IO02 0x80000000 // pin 42 BACK
  436. MX6QDL_PAD_NANDF_D1__GPIO2_IO01 0x80000000 // pin 43 MENU
  437. MX6QDL_PAD_GPIO_19__GPIO4_IO05 0x80000000 // pin 44 KEY_VOL_DOWN
  438. MX6QDL_PAD_DISP0_DAT22__GPIO5_IO16 0x80000000 // pin 45
  439. MX6QDL_PAD_DISP0_DAT23__GPIO5_IO17 0x80000000 // pin 46
  440. MX6QDL_PAD_EIM_D25__GPIO3_IO25 0x80000000 // pin 47
  441. MX6QDL_PAD_KEY_ROW1__GPIO4_IO09 0x80000000 // pin 48
  442. MX6QDL_PAD_KEY_COL1__GPIO4_IO08 0x80000000 // pin 49
  443. MX6QDL_PAD_EIM_OE__GPIO2_IO25 0x80000000 // pin 50
  444. MX6QDL_PAD_EIM_CS1__GPIO2_IO24 0x80000000 // pin 51
  445. MX6QDL_PAD_EIM_CS0__GPIO2_IO23 0x80000000 // pin 52
  446. MX6QDL_PAD_EIM_D24__GPIO3_IO24 0x80000000 // pin 53
  447. >;
  448. };*/
  449.  
  450. pinctrl_enet: enetgrp {
  451. fsl,pins = <
  452. MX6QDL_PAD_RGMII_RXC__RGMII_RXC 0x1b0b0
  453. MX6QDL_PAD_RGMII_RD0__RGMII_RD0 0x1b0b0
  454. MX6QDL_PAD_RGMII_RD1__RGMII_RD1 0x1b0b0
  455. MX6QDL_PAD_RGMII_RD2__RGMII_RD2 0x1b0b0
  456. MX6QDL_PAD_RGMII_RD3__RGMII_RD3 0x1b0b0
  457. MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL 0x1b0b0
  458. MX6QDL_PAD_RGMII_TXC__RGMII_TXC 0x1b0b0
  459. MX6QDL_PAD_RGMII_TD0__RGMII_TD0 0x1b0b0
  460. MX6QDL_PAD_RGMII_TD1__RGMII_TD1 0x1b0b0
  461. MX6QDL_PAD_RGMII_TD2__RGMII_TD2 0x1b0b0
  462. MX6QDL_PAD_RGMII_TD3__RGMII_TD3 0x1b0b0
  463. MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL 0x1b0b0
  464. MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
  465. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  466. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  467. MX6QDL_PAD_EIM_D23__GPIO3_IO23 0x80000000 /* reset */
  468. MX6QDL_PAD_EIM_EB3__GPIO2_IO31 0x80000000 /* ethernet power */
  469. >;
  470. };
  471.  
  472. pinctrl_i2c1: i2c1grp {
  473. fsl,pins = <
  474. MX6QDL_PAD_CSI0_DAT9__I2C1_SCL 0x4001b8b1
  475. MX6QDL_PAD_CSI0_DAT8__I2C1_SDA 0x4001b8b1
  476. >;
  477. };
  478.  
  479. pinctrl_i2c2: i2c2grp {
  480. fsl,pins = <
  481. MX6QDL_PAD_KEY_COL3__I2C2_SCL 0x4001b8b1
  482. MX6QDL_PAD_KEY_ROW3__I2C2_SDA 0x4001b8b1
  483. >;
  484. };
  485.  
  486. pinctrl_i2c3: i2c3grp {
  487. fsl,pins = <
  488. MX6QDL_PAD_GPIO_5__I2C3_SCL 0x4001b8b1
  489. MX6QDL_PAD_GPIO_6__I2C3_SDA 0x4001b8b1
  490. >;
  491. };
  492.  
  493. pinctrl_ov5640: ov5640grp {
  494. fsl,pins = <
  495. MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x80000000 /* camera reset */
  496. MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x80000000 /* camera enable */
  497. MX6QDL_PAD_CSI0_MCLK__CCM_CLKO1 0x130b0
  498. >;
  499. };
  500.  
  501. pinctrl_uart2: uart2grp {
  502. fsl,pins = <
  503. MX6QDL_PAD_EIM_D26__UART2_TX_DATA 0x1b0b1
  504. MX6QDL_PAD_EIM_D27__UART2_RX_DATA 0x1b0b1
  505. >;
  506. };
  507.  
  508. pinctrl_uart4: uart4grp {
  509. fsl,pins = <
  510. MX6QDL_PAD_KEY_COL0__UART4_TX_DATA 0x1b0b1
  511. MX6QDL_PAD_KEY_ROW0__UART4_RX_DATA 0x1b0b1
  512. >;
  513. };
  514.  
  515. pinctrl_udoo_ard_alt: udooard2grp {
  516. fsl,pins = <
  517. MX6QDL_PAD_DISP0_DAT0__GPIO4_IO21 0x80000000
  518. MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x80000000
  519. MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x80000000
  520. MX6QDL_PAD_GPIO_0__GPIO1_IO00 0x80000000
  521. >;
  522. };
  523.  
  524. pinctrl_flexcan1: can1grp {
  525. fsl,pins = <
  526. MX6QDL_PAD_GPIO_7__FLEXCAN1_TX 0x1b0b1
  527. MX6QDL_PAD_GPIO_8__FLEXCAN1_RX 0x1b0b1
  528. >;
  529. };
  530.  
  531. pinctrl_pwm4: pwm4grp {
  532. fls,pins = <
  533. MX6QDL_PAD_SD4_DAT2__PWM4_OUT 0x1b0b1
  534. >;
  535. };
  536.  
  537. pinctrl_pwm3: pwm3grp {
  538. fls,pins = <
  539. MX6QDL_PAD_SD4_DAT1__PWM3_OUT 0x1b0b1
  540. >;
  541. };
  542.  
  543. pinctrl_pwm1: pwm1grp {
  544. fsl,pins = <
  545. MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1
  546. >;
  547. };
  548.  
  549. pinctrl_pwm2: pwm2grp {
  550. fsl,pins = <
  551. MX6QDL_PAD_GPIO_1__PWM2_OUT 0x1b0b1
  552. >;
  553. };
  554.  
  555. pinctrl_onewire: onewire-0 {
  556. fsl,pins = <
  557. MX6QDL_PAD_DISP0_DAT11__GPIO5_IO05 0x1b0b0
  558. >;
  559. };
  560.  
  561. pinctrl_usdhc3: usdhc3grp {
  562. fsl,pins = <
  563. MX6QDL_PAD_SD3_CMD__SD3_CMD 0x17059
  564. MX6QDL_PAD_SD3_CLK__SD3_CLK 0x10059
  565. MX6QDL_PAD_SD3_DAT0__SD3_DATA0 0x17059
  566. MX6QDL_PAD_SD3_DAT1__SD3_DATA1 0x17059
  567. MX6QDL_PAD_SD3_DAT2__SD3_DATA2 0x17059
  568. MX6QDL_PAD_SD3_DAT3__SD3_DATA3 0x17059
  569. >;
  570. };
  571.  
  572. pinctrl_spdif_1: spdifgrp-1 {
  573. fsl,pins = <
  574. MX6QDL_PAD_KEY_COL3__SPDIF_IN 0x1b0b0
  575. >;
  576. };
  577.  
  578. pinctrl_hdmi_cec: hdmicecgrp {
  579. fsl,pins = <
  580. MX6QDL_PAD_EIM_A25__HDMI_TX_CEC_LINE 0x1f8b0
  581. >;
  582. };
  583.  
  584. ac97link_running: ac97link_runninggrp {
  585. fsl,pins = <
  586. MX6QDL_PAD_DI0_PIN2__AUD6_TXD 0x80000000
  587. MX6QDL_PAD_DI0_PIN3__AUD6_TXFS 0x80000000
  588. MX6QDL_PAD_DI0_PIN4__AUD6_RXD 0x80000000
  589. MX6QDL_PAD_DI0_PIN15__AUD6_TXC 0x80000000
  590. >;
  591. };
  592.  
  593. ac97link_warm_reset: ac97link_warm_resetgrp {
  594. fsl,pins = <
  595. MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x80000000
  596. >;
  597. };
  598.  
  599. ac97link_reset: audmuxgrp_reset {
  600. fsl,pins = <
  601. MX6QDL_PAD_EIM_EB2__GPIO2_IO30 0x80000000
  602. MX6QDL_PAD_DI0_PIN3__GPIO4_IO19 0x80000000
  603. MX6QDL_PAD_DI0_PIN2__GPIO4_IO18 0x80000000
  604. >;
  605. };
  606. };
  607. };
  608.  
  609. &uart2 {
  610. pinctrl-names = "default";
  611. pinctrl-0 = <&pinctrl_uart2>;
  612. status = "okay";
  613. };
  614.  
  615. &uart4 { /* sam3x port */
  616. pinctrl-names = "default";
  617. pinctrl-0 = <&pinctrl_uart4>;
  618. status = "okay";
  619. };
  620.  
  621. &usdhc3 {
  622. pinctrl-names = "default";
  623. pinctrl-0 = <&pinctrl_usdhc3>;
  624. non-removable;
  625. keep-power-in-suspend;
  626. status = "okay";
  627. };
  628.  
  629. &usbotg {
  630. pinctrl-names = "default";
  631. vbus-supply = <&reg_usb_otg_vbus>;
  632. status = "okay";
  633. };
  634.  
  635. &usbh1 {
  636. vbus-supply = <&reg_usb_h1_vbus>;
  637. clocks = <&clks 201>;
  638. clock-names = "phy";
  639. status = "okay";
  640. };
  641.  
  642. &mxcfb1 {
  643. status = "okay";
  644. };
  645.  
  646. &can1 {
  647. pinctrl-names = "default";
  648. pinctrl-0 = <&pinctrl_flexcan1>;
  649. xceiver-supply = <&reg_can_xcvr>;
  650. status = "okay";
  651. };
  652.  
  653. &pwm1 {
  654. pinctrl-names = "default";
  655. pinctrl-0 = <&pinctrl_pwm1>;
  656. #pwm-cells = <3>;
  657. status = "okay";
  658. };
  659.  
  660. &pwm2 {
  661. pinctrl-names = "default";
  662. pinctrl-0 = <&pinctrl_pwm2>;
  663. #pwm-cells = <3>;
  664. status = "okay";
  665. };
  666.  
  667. &pwm3 {
  668. pinctrl-names = "default";
  669. pinctrl-0 = <&pinctrl_pwm3>;
  670. #pwm-cells = <3>;
  671. status = "okay";
  672. };
  673.  
  674. &pwm4 {
  675. pinctrl-names = "default";
  676. pinctrl-0 = <&pinctrl_pwm4>;
  677. #pwm-cells = <3>;
  678. status = "okay";
  679. };
  680.  
  681. &mipi_csi {
  682. status = "okay";
  683. ipu_id = <0>;
  684. csi_id = <0>;
  685. v_channel = <0>;
  686. lanes = <2>;
  687. };
  688.  
  689. &ssi1 {
  690. fsl,mode = "ac97-slave";
  691. pinctrl-names = "default", "ac97-running", "ac97-reset", "ac97-warm-reset";
  692. pinctrl-0 = <&ac97link_running>;
  693. pinctrl-1 = <&ac97link_running>;
  694. pinctrl-2 = <&ac97link_reset>;
  695. pinctrl-3 = <&ac97link_warm_reset>;
  696. ac97-gpios = <&gpio4 19 0 &gpio4 18 0 &gpio2 30 0>;
  697. status = "okay";
  698. };
  699.  
  700. &spdif {
  701. pinctrl-names = "default";
  702. pinctrl-0 = <&pinctrl_spdif_1>;
  703. status = "disabled";
  704. };
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