.def tmp = r16
.def step = r18
.def delayCnt = r19
.def cnt = r24

.cseg
    rjmp reset

.org $00C
rjmp timer1

reset:
    ldi tmp, low(RAMEND)
    out SPL, tmp
    ldi tmp, high(RAMEND)
    out SPH, tmp

	ldi tmp, (1<<PD5)
	out DDRD, tmp

    ldi tmp, (1 << WGM10)
    out TCCR1A, tmp

    ldi tmp, (1 << CS11) | (1 << CS10)
    out TCCR1B, tmp

	ldi tmp, 0xf0
	out DDRB, tmp

	ldi tmp, 0x0f
	out PORTB, tmp

	ldi step, 0x10

	ldi tmp, high(128)
	out OCR1AH, tmp
	ldi tmp, low(128)
	out OCR1AL, tmp

	ldi tmp, (1 << OCIE1A)
    out TIMSK, tmp

	ldi delayCnt, 1

    sei

main:
	sbis PINB,0
	rcall smanji

	sbis PINB,1
	rcall povecaj

	rcall delay
    rjmp main

timer1:
    in tmp, DDRD
    com tmp
    out DDRD, tmp
reti

smanji:
	ldi tmp, 0x10
	in cnt, OCR1AL
	cpse cnt, tmp
		sub cnt, step
	out OCR1AL, cnt
ret

povecaj:
	ldi tmp, 0xe0
	in cnt, OCR1AL
	cpse cnt, tmp
		add cnt, step
	out OCR1AL, cnt
ret


delay:
	clr r20
	clr r21
	mov r22, delayCnt
	delayLoop:
		dec r20
		brne delayLoop
		dec r21
		brne delayLoop
		dec r22
		brne delayLoop
ret