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  1. #/************************************************************************/
  2. /* */
  3. /* Copyright 2012 Broadcom Corporation */
  4. /* */
  5. /* Unless you and Broadcom execute a separate written software license */
  6. /* agreement governing use of this software, this software is licensed */
  7. /* to you under the terms of the GNU General Public License version 2 */
  8. /* (the GPL), available at */
  9. /* */
  10. /* http://www.broadcom.com/licenses/GPLv2.php */
  11. /* */
  12. /* with the following added to such license: */
  13. /* */
  14. /* As a special exception, the copyright holders of this software give */
  15. /* you permission to link this software with independent modules, and */
  16. /* to copy and distribute the resulting executable under terms of your */
  17. /* choice, provided that you also meet, for each linked independent */
  18. /* module, the terms and conditions of the license of that module. An */
  19. /* independent module is a module which is not derived from this */
  20. /* software. The special exception does not apply to any */
  21. /* modifications of the software. */
  22. /* */
  23. /* Notwithstanding the above, under no circumstances may you combine */
  24. /* this software in any way with any other Broadcom software provided */
  25. /* under a license other than the GPL, without Broadcom's express */
  26. /* prior written consent. */
  27. /* */
  28. /************************************************************************/
  29. #include <linux/version.h>
  30. #include <linux/init.h>
  31. #include <linux/device.h>
  32. #include <linux/platform_device.h>
  33. #include <linux/interrupt.h>
  34. #include <linux/irq.h>
  35. #include <linux/mfd/bcm590xx/pmic.h>
  36. #include <linux/of_platform.h>
  37. #include <linux/of.h>
  38. #include <linux/of_fdt.h>
  39. #include <mach/pinmux.h>
  40.  
  41. #ifdef CONFIG_ANDROID_PMEM
  42. #include <linux/android_pmem.h>
  43. #endif
  44. #ifdef CONFIG_ION_BCM_NO_DT
  45. #include <linux/ion.h>
  46. #include <linux/broadcom/bcm_ion.h>
  47. #endif
  48. #ifdef CONFIG_IOMMU_API
  49. #include <plat/bcm_iommu.h>
  50. #endif
  51. #include <linux/serial_8250.h>
  52. #include <linux/i2c.h>
  53. #include <linux/i2c-kona.h>
  54. #include <linux/spi/spi.h>
  55. #include <linux/clk.h>
  56. #include <linux/bootmem.h>
  57. #include <linux/input.h>
  58. #include <linux/mfd/bcm590xx/core.h>
  59. #include <asm/gpio.h>
  60. #include <linux/gpio.h>
  61. #include <linux/gpio_keys.h>
  62. #include <linux/i2c-kona.h>
  63. #include <linux/i2c.h>
  64. #include <linux/i2c/tango_ts.h>
  65. #include <asm/mach/arch.h>
  66. #include <asm/mach-types.h>
  67. #include <asm/mach/map.h>
  68. #include <asm/hardware/gic.h>
  69. #include <mach/hardware.h>
  70. #include <mach/hardware.h>
  71. #include <mach/kona_headset_pd.h>
  72. #include <mach/kona.h>
  73. #include <mach/sdio_platform.h>
  74. #include <mach/hawaii.h>
  75. #include <mach/io_map.h>
  76. #include <mach/irqs.h>
  77. #include <mach/rdb/brcm_rdb_uartb.h>
  78. #include <mach/clock.h>
  79. #include <plat/spi_kona.h>
  80. #include <plat/chal/chal_trace.h>
  81. #include <plat/pi_mgr.h>
  82. #include <plat/spi_kona.h>
  83.  
  84. #include <trace/stm.h>
  85.  
  86. #include "devices.h"
  87.  
  88. #ifdef CONFIG_KEYBOARD_BCM
  89. #include <mach/bcm_keypad.h>
  90. #endif
  91. #ifdef CONFIG_DMAC_PL330
  92. #include <mach/irqs.h>
  93. #include <plat/pl330-pdata.h>
  94. #include <linux/dma-mapping.h>
  95. #endif
  96.  
  97. #if defined(CONFIG_SPI_GPIO)
  98. #include <linux/spi/spi_gpio.h>
  99. #endif
  100.  
  101. #if defined(CONFIG_HAPTIC)
  102. #include <linux/haptic.h>
  103. #endif
  104.  
  105. #if (defined(CONFIG_BCM_RFKILL) || defined(CONFIG_BCM_RFKILL_MODULE))
  106. #include <linux/broadcom/bcmbt_rfkill.h>
  107. #endif
  108.  
  109. #ifdef CONFIG_BCM_BZHW
  110. #include <linux/broadcom/bcm_bzhw.h>
  111. #endif
  112.  
  113. #ifdef CONFIG_BCM_BT_LPM
  114. #include <linux/broadcom/bcmbt_lpm.h>
  115. #endif
  116.  
  117. #if defined(CONFIG_SENSORS_BMA222)
  118. #include <linux/bma222.h>
  119. #endif
  120.  
  121. #if defined(CONFIG_BMP18X) || defined(CONFIG_BMP18X_I2C) || defined(CONFIG_BMP18X_I2C_MODULE)
  122. #include <linux/bmp18x.h>
  123. #include <mach/bmp18x_i2c_settings.h>
  124. #endif
  125.  
  126. #if defined(CONFIG_AL3006) || defined(CONFIG_AL3006_MODULE)
  127. #include <linux/al3006.h>
  128. #include <mach/al3006_i2c_settings.h>
  129. #endif
  130.  
  131. #if defined(CONFIG_INV_MPU_IIO) || defined(CONFIG_INV_MPU_IIO_MODULE)
  132. #include <linux/mpu.h>
  133. #include <linux/i2c/inv_mpu_settings.h>
  134. #endif
  135.  
  136. #if defined(CONFIG_SENSORS_KIONIX_KXTIK) \
  137. || defined(CONFIG_SENSORS_KIONIX_KXTIK_MODULE)
  138. #include <linux/kxtik.h>
  139. #endif /* CONFIG_SENSORS_KIONIX_KXTIK */
  140.  
  141. #ifdef CONFIG_BACKLIGHT_PWM
  142. #include <linux/pwm_backlight.h>
  143. #endif
  144.  
  145. #if defined(CONFIG_BCM_ALSA_SOUND)
  146. #include <mach/caph_platform.h>
  147. #include <mach/caph_settings.h>
  148. #endif
  149.  
  150. #ifdef CONFIG_VIDEO_UNICAM_CAMERA
  151. #include <media/soc_camera.h>
  152. #endif
  153.  
  154. #ifdef CONFIG_VIDEO_KONA
  155. #include <media/v4l2-device.h>
  156. #include <media/v4l2-subdev.h>
  157. #include <media/kona-unicam.h>
  158. #include <media/ov5640.h>
  159. #endif
  160.  
  161. #ifdef CONFIG_WD_TAPPER
  162. #include <linux/broadcom/wd-tapper.h>
  163. #endif
  164.  
  165. #ifdef CONFIG_USB_DWC_OTG
  166. #include <linux/usb/bcm_hsotgctrl.h>
  167. #include <linux/usb/otg.h>
  168. #endif
  169.  
  170. #ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
  171. #include "hawaii_wifi.h"
  172.  
  173. extern int
  174. hawaii_wifi_status_register(void (*callback) (int card_present, void *dev_id),
  175. void *dev_id);
  176. #endif
  177.  
  178. /* SD */
  179. #define SD_CARDDET_GPIO_PIN 91
  180.  
  181. /* Touch */
  182. #define TSC_GPIO_IRQ_PIN 73
  183.  
  184. #define TSC_GPIO_RESET_PIN 70
  185. #define TANGO_I2C_TS_DRIVER_NUM_BYTES_TO_READ 14
  186.  
  187. int reset_pwm_padcntrl(void)
  188. {
  189. struct pin_config new_pin_config;
  190. int ret;
  191. new_pin_config.name = PN_GPIO24;
  192. new_pin_config.func = PF_GPIO24;
  193. ret = pinmux_set_pin_config(&new_pin_config);
  194. return ret;
  195. }
  196.  
  197. #ifdef CONFIG_ANDROID_PMEM
  198. struct android_pmem_platform_data android_pmem_data = {
  199. .name = "pmem",
  200. .cmasize = 0,
  201. .carveout_base = 0x9e000000,
  202. .carveout_size = 0,
  203. };
  204. #endif
  205.  
  206.  
  207. #ifdef CONFIG_ION_BCM_NO_DT
  208. struct ion_platform_data ion_system_data = {
  209. .nr = 1,
  210. #ifdef CONFIG_IOMMU_API
  211. .pdev_iommu = &iommu_mm_device,
  212. #endif
  213. #ifdef CONFIG_BCM_IOVMM
  214. .pdev_iovmm = &iovmm_mm_256mb_device,
  215. #endif
  216. .heaps = {
  217. [0] = {
  218. .id = 0,
  219. .type = ION_HEAP_TYPE_SYSTEM,
  220. .name = "ion-system",
  221. .base = 0,
  222. .limit = 0,
  223. .size = 0,
  224. },
  225. },
  226. };
  227.  
  228. struct ion_platform_data ion_system_extra_data = {
  229. .nr = 1,
  230. #ifdef CONFIG_IOMMU_API
  231. .pdev_iommu = &iommu_mm_device,
  232. #endif
  233. #ifdef CONFIG_BCM_IOVMM
  234. .pdev_iovmm = &iovmm_mm_device,
  235. #endif
  236. .heaps = {
  237. [0] = {
  238. .id = 1,
  239. .type = ION_HEAP_TYPE_SYSTEM,
  240. .name = "ion-system-extra",
  241. .base = 0,
  242. .limit = 0,
  243. .size = 0,
  244. },
  245. },
  246. };
  247.  
  248. struct ion_platform_data ion_carveout_data = {
  249. .nr = 2,
  250. #ifdef CONFIG_IOMMU_API
  251. .pdev_iommu = &iommu_mm_device,
  252. #endif
  253. #ifdef CONFIG_BCM_IOVMM
  254. .pdev_iovmm = &iovmm_mm_256mb_device,
  255. #endif
  256. .heaps = {
  257. [0] = {
  258. .id = 9,
  259. .type = ION_HEAP_TYPE_CARVEOUT,
  260. .name = "ion-carveout",
  261. .base = 0x90000000,
  262. .limit = 0xa0000000,
  263. .size = (16 * SZ_1M),
  264. #ifdef CONFIG_ION_OOM_KILLER
  265. .lmk_enable = 0,
  266. .lmk_min_score_adj = 411,
  267. .lmk_min_free = 32,
  268. #endif
  269. },
  270. [1] = {
  271. .id = 10,
  272. .type = ION_HEAP_TYPE_CARVEOUT,
  273. .name = "ion-carveout-extra",
  274. .base = 0,
  275. .limit = 0,
  276. .size = (0 * SZ_1M),
  277. #ifdef CONFIG_ION_OOM_KILLER
  278. .lmk_enable = 0,
  279. .lmk_min_score_adj = 411,
  280. .lmk_min_free = 32,
  281. #endif
  282. },
  283. },
  284. };
  285.  
  286. #ifdef CONFIG_CMA
  287. struct ion_platform_data ion_cma_data = {
  288. .nr = 2,
  289. #ifdef CONFIG_IOMMU_API
  290. .pdev_iommu = &iommu_mm_device,
  291. #endif
  292. #ifdef CONFIG_BCM_IOVMM
  293. .pdev_iovmm = &iovmm_mm_256mb_device,
  294. #endif
  295. .heaps = {
  296. [0] = {
  297. .id = 5,
  298. .type = ION_HEAP_TYPE_DMA,
  299. .name = "ion-cma",
  300. .base = 0x90000000,
  301. .limit = 0xa0000000,
  302. .size = (0 * SZ_1M),
  303. #ifdef CONFIG_ION_OOM_KILLER
  304. .lmk_enable = 1,
  305. .lmk_min_score_adj = 411,
  306. .lmk_min_free = 32,
  307. #endif
  308. },
  309. [1] = {
  310. .id = 6,
  311. .type = ION_HEAP_TYPE_DMA,
  312. .name = "ion-cma-extra",
  313. .base = 0,
  314. .limit = 0,
  315. .size = (0 * SZ_1M),
  316. #ifdef CONFIG_ION_OOM_KILLER
  317. .lmk_enable = 1,
  318. .lmk_min_score_adj = 411,
  319. .lmk_min_free = 32,
  320. #endif
  321. },
  322. },
  323. };
  324. #endif /* CONFIG_CMA */
  325. #if defined(CONFIG_MM_SECURE_DRIVER)
  326. struct ion_platform_data ion_secure_data = {
  327. .nr = 2,
  328. #ifdef CONFIG_IOMMU_API
  329. .pdev_iommu = &iommu_mm_device,
  330. #endif
  331. #ifdef CONFIG_BCM_IOVMM
  332. .pdev_iovmm = &iovmm_mm_device,
  333. #endif
  334. .heaps = {
  335. [0] = {
  336. .id = 13,
  337. .type = ION_HEAP_TYPE_SECURE,
  338. .name = "ion-secure",
  339. .base = 0,
  340. .limit = 0,
  341. .size = (16 * SZ_1M),
  342. },
  343. [1] = {
  344. .id = 14,
  345. .type = ION_HEAP_TYPE_SECURE,
  346. .name = "ion-secure-extra",
  347. .base = 0,
  348. .limit = 0,
  349. .size = (0 * SZ_1M),
  350. },
  351. },
  352. };
  353. #endif /* CONFIG_MM_SECURE_DRIVER */
  354. #endif /* CONFIG_ION_BCM_NO_DT */
  355.  
  356.  
  357. #ifdef CONFIG_VIDEO_ADP1653
  358. #define ADP1653_I2C_ADDR 0x60
  359. static struct i2c_board_info adp1653_flash[] = {
  360. {
  361. I2C_BOARD_INFO("adp1653", (ADP1653_I2C_ADDR >> 1))
  362. },
  363. };
  364. #endif
  365.  
  366. #ifdef CONFIG_VIDEO_UNICAM_CAMERA
  367.  
  368. static struct regulator *d_gpsr_cam0_1v8;
  369. static struct regulator *d_lvldo2_cam1_1v8;
  370. static struct regulator *d_1v8_mmc1_vcc;
  371. static struct regulator *d_3v0_mmc1_vcc;
  372.  
  373. #define SENSOR_0_GPIO_PWRDN (002)
  374. #define SENSOR_0_GPIO_RST (111)
  375. #define SENSOR_0_CLK "dig_ch0_clk" /*DCLK1 */
  376. #define SENSOR_0_CLK_FREQ (13000000)
  377. #define CSI0_LP_FREQ (100000000)
  378. #define CSI1_LP_FREQ (100000000)
  379.  
  380. #define SENSOR_1_CLK "dig_ch0_clk" /* DCLK1 */
  381. #define SENSOR_1_CLK_FREQ (26000000)
  382.  
  383. #define SENSOR_1_GPIO_PWRDN (005)
  384.  
  385.  
  386. static int hawaii_camera_power(struct device *dev, int on)
  387. {
  388. unsigned int value;
  389. int ret = -1;
  390. struct clk *clock;
  391. struct clk *lp_clock;
  392. struct clk *axi_clk;
  393. static struct pi_mgr_dfs_node unicam_dfs_node;
  394. struct soc_camera_device *icd = to_soc_camera_dev(dev);
  395. struct soc_camera_link *icl = to_soc_camera_link(icd);
  396.  
  397. printk(KERN_INFO "%s:camera power %s\n", __func__, (on ? "on" : "off"));
  398. if (!unicam_dfs_node.valid) {
  399. ret = pi_mgr_dfs_add_request(&unicam_dfs_node, "unicam",
  400. PI_MGR_PI_ID_MM,
  401. PI_MGR_DFS_MIN_VALUE);
  402. if (ret) {
  403. return -1;
  404. }
  405. if (gpio_request_one(SENSOR_0_GPIO_RST, GPIOF_DIR_OUT |
  406. GPIOF_INIT_LOW, "Cam0Rst")) {
  407. printk(KERN_ERR "Unable to get cam0 RST GPIO\n");
  408. return -1;
  409. }
  410. if (gpio_request_one(SENSOR_0_GPIO_PWRDN, GPIOF_DIR_OUT |
  411. GPIOF_INIT_LOW, "CamPWDN")) {
  412. printk(KERN_ERR "Unable to get cam0 PWDN GPIO\n");
  413. return -1;
  414. }
  415. /*MMC1 VCC */
  416. d_1v8_mmc1_vcc = regulator_get(NULL, icl->regulators[1].supply);
  417. if (IS_ERR_OR_NULL(d_1v8_mmc1_vcc))
  418. printk(KERN_ERR "Failed to get d_1v8_mmc1_vcc\n");
  419. d_3v0_mmc1_vcc = regulator_get(NULL, icl->regulators[2].supply);
  420. if (IS_ERR_OR_NULL(d_3v0_mmc1_vcc))
  421. printk(KERN_ERR "Failed to get d_3v0_mmc1_vcc\n");
  422. d_gpsr_cam0_1v8 = regulator_get(NULL,
  423. icl->regulators[0].supply);
  424. if (IS_ERR_OR_NULL(d_gpsr_cam0_1v8))
  425. printk(KERN_ERR "Failed to get d_gpsr_cam0_1v8\n");
  426. if (d_lvldo2_cam1_1v8 == NULL) {
  427. d_lvldo2_cam1_1v8 = regulator_get(NULL,
  428. icl->regulators[3].supply);
  429. if (IS_ERR_OR_NULL(d_lvldo2_cam1_1v8))
  430. printk(KERN_ERR "Fd_lvldo2_cam1_1v8 cam\n");
  431. }
  432. }
  433.  
  434. ret = -1;
  435. lp_clock = clk_get(NULL, CSI0_LP_PERI_CLK_NAME_STR);
  436. if (IS_ERR_OR_NULL(lp_clock)) {
  437. printk(KERN_ERR "Unable to get %s clock\n",
  438. CSI0_LP_PERI_CLK_NAME_STR);
  439. goto e_clk_get;
  440. }
  441.  
  442. clock = clk_get(NULL, SENSOR_0_CLK);
  443. if (IS_ERR_OR_NULL(clock)) {
  444. printk(KERN_ERR "Unable to get SENSOR_0 clock\n");
  445. goto e_clk_get;
  446. }
  447. axi_clk = clk_get(NULL, "csi0_axi_clk");
  448. if (IS_ERR_OR_NULL(axi_clk)) {
  449. printk(KERN_ERR "Unable to get AXI clock\n");
  450. goto e_clk_get;
  451. }
  452. if (on) {
  453. if (pi_mgr_dfs_request_update(&unicam_dfs_node, PI_OPP_TURBO))
  454. printk("DVFS for UNICAM failed\n");
  455. regulator_enable(d_3v0_mmc1_vcc);
  456. usleep_range(1000, 1010);
  457. regulator_enable(d_1v8_mmc1_vcc);
  458. usleep_range(1000, 1010);
  459. regulator_enable(d_gpsr_cam0_1v8);
  460. usleep_range(1000, 1010);
  461. regulator_enable(d_lvldo2_cam1_1v8);
  462. usleep_range(1000, 1010);
  463.  
  464. if (mm_ccu_set_pll_select(CSI0_BYTE1_PLL, 8)) {
  465. pr_err("failed to set BYTE1\n");
  466. goto e_clk_pll;
  467. }
  468. if (mm_ccu_set_pll_select(CSI0_BYTE0_PLL, 8)) {
  469. pr_err("failed to set BYTE0\n");
  470. goto e_clk_pll;
  471. }
  472. if (mm_ccu_set_pll_select(CSI0_CAMPIX_PLL, 8)) {
  473. pr_err("failed to set PIXPLL\n");
  474. goto e_clk_pll;
  475. }
  476.  
  477. value = clk_enable(axi_clk);
  478. if (value) {
  479. pr_err(KERN_ERR "Failed to enable axi clock\n");
  480. goto e_clk_axi;
  481. }
  482. value = clk_enable(lp_clock);
  483. if (value) {
  484. pr_err(KERN_ERR "Failed to enable lp clock\n");
  485. goto e_clk_lp;
  486. }
  487.  
  488. value = clk_set_rate(lp_clock, CSI0_LP_FREQ);
  489. if (value) {
  490. pr_err("Failed to set lp clock\n");
  491. goto e_clk_set_lp;
  492. }
  493. value = clk_enable(clock);
  494. if (value) {
  495. pr_err("Failed to enable sensor 0 clock\n");
  496. goto e_clk_sensor;
  497. }
  498. value = clk_set_rate(clock, SENSOR_0_CLK_FREQ);
  499. if (value) {
  500. pr_err("Failed to set sensor0 clock\n");
  501. goto e_clk_set_sensor;
  502. }
  503. usleep_range(10000, 10100);
  504. gpio_set_value(SENSOR_0_GPIO_RST, 0);
  505. usleep_range(10000, 10100);
  506. gpio_set_value(SENSOR_0_GPIO_PWRDN, 0);
  507. usleep_range(5000, 5100);
  508. gpio_set_value(SENSOR_0_GPIO_RST, 1);
  509. msleep(30);
  510. } else {
  511. gpio_set_value(SENSOR_0_GPIO_RST, 0);
  512. usleep_range(1000, 1100);
  513. gpio_set_value(SENSOR_0_GPIO_PWRDN, 1);
  514. clk_disable(clock);
  515. clk_disable(lp_clock);
  516. clk_disable(axi_clk);
  517. regulator_disable(d_lvldo2_cam1_1v8);
  518. regulator_disable(d_3v0_mmc1_vcc);
  519. regulator_disable(d_1v8_mmc1_vcc);
  520. regulator_disable(d_gpsr_cam0_1v8);
  521. if (pi_mgr_dfs_request_update
  522. (&unicam_dfs_node, PI_MGR_DFS_MIN_VALUE)) {
  523. printk("Failed to set DVFS for unicam\n");
  524. }
  525. }
  526. return 0;
  527.  
  528. e_clk_set_sensor:
  529. clk_disable(clock);
  530. e_clk_sensor:
  531. e_clk_set_lp:
  532. clk_disable(lp_clock);
  533. e_clk_lp:
  534. clk_disable(axi_clk);
  535. e_clk_axi:
  536. e_clk_pll:
  537. e_clk_get:
  538. return ret;
  539. }
  540. static int hawaii_camera_reset(struct device *dev)
  541. {
  542. /* reset the camera gpio */
  543. printk(KERN_INFO "%s:camera reset\n", __func__);
  544. return 0;
  545. }
  546.  
  547. static int hawaii_camera_power_front(struct device *dev, int on)
  548. {
  549. unsigned int value;
  550. int ret = -1;
  551. struct clk *clock;
  552. struct clk *axi_clk;
  553. struct clk *axi_clk_0;
  554. struct clk *lp_clock_0;
  555. struct clk *lp_clock_1;
  556. static struct pi_mgr_dfs_node unicam_dfs_node;
  557. struct soc_camera_device *icd = to_soc_camera_dev(dev);
  558. struct soc_camera_link *icl = to_soc_camera_link(icd);
  559.  
  560.  
  561. printk(KERN_INFO "%s:camera power %s\n", __func__, (on ? "on" : "off"));
  562. if (!unicam_dfs_node.valid) {
  563. ret = pi_mgr_dfs_add_request(&unicam_dfs_node, "unicam",
  564. PI_MGR_PI_ID_MM,
  565. PI_MGR_DFS_MIN_VALUE);
  566. if (ret) {
  567. return -1;
  568. }
  569. if (gpio_request_one(SENSOR_1_GPIO_PWRDN, GPIOF_DIR_OUT |
  570. GPIOF_INIT_LOW, "Cam1PWDN")) {
  571. printk(KERN_ERR "Unable to get CAM1PWDN\n");
  572. return -1;
  573. }
  574. d_lvldo2_cam1_1v8 = regulator_get(NULL,
  575. icl->regulators[0].supply);
  576. if (IS_ERR_OR_NULL(d_lvldo2_cam1_1v8))
  577. printk(KERN_ERR "Failed to get d_lvldo2_cam1_1v8\n");
  578. if (d_1v8_mmc1_vcc == NULL) {
  579. d_1v8_mmc1_vcc = regulator_get(NULL,
  580. icl->regulators[1].supply);
  581. if (IS_ERR_OR_NULL(d_1v8_mmc1_vcc))
  582. printk(KERN_ERR "Err d_1v8_mmc1_vcc\n");
  583. }
  584. if (d_3v0_mmc1_vcc == NULL) {
  585. d_3v0_mmc1_vcc = regulator_get(NULL,
  586. icl->regulators[2].supply);
  587. if (IS_ERR_OR_NULL(d_3v0_mmc1_vcc))
  588. printk(KERN_ERR "d_3v0_mmc1_vcc");
  589. }
  590. if (d_gpsr_cam0_1v8 == NULL) {
  591. d_gpsr_cam0_1v8 = regulator_get(NULL,
  592. icl->regulators[3].supply);
  593. if (IS_ERR_OR_NULL(d_gpsr_cam0_1v8))
  594. printk(KERN_ERR "Fl d_gpsr_cam0_1v8 get fail");
  595. }
  596. }
  597.  
  598. ret = -1;
  599. lp_clock_0 = clk_get(NULL, CSI0_LP_PERI_CLK_NAME_STR);
  600. if (IS_ERR_OR_NULL(lp_clock_0)) {
  601. printk(KERN_ERR "Unable to get %s clock\n",
  602. CSI0_LP_PERI_CLK_NAME_STR);
  603. goto e_clk_get;
  604. }
  605.  
  606. lp_clock_1 = clk_get(NULL, CSI1_LP_PERI_CLK_NAME_STR);
  607. if (IS_ERR_OR_NULL(lp_clock_1)) {
  608. printk(KERN_ERR "Unable to get %s clock\n",
  609. CSI1_LP_PERI_CLK_NAME_STR);
  610. goto e_clk_get;
  611. }
  612.  
  613. clock = clk_get(NULL, SENSOR_1_CLK);
  614. if (IS_ERR_OR_NULL(clock)) {
  615. printk(KERN_ERR "Unable to get SENSOR_1 clock\n");
  616. goto e_clk_get;
  617. }
  618. axi_clk_0 = clk_get(NULL, "csi0_axi_clk");
  619. if (IS_ERR_OR_NULL(axi_clk_0)) {
  620. printk(KERN_ERR "Unable to get AXI clock 0\n");
  621. goto e_clk_get;
  622. }
  623. axi_clk = clk_get(NULL, "csi1_axi_clk");
  624. if (IS_ERR_OR_NULL(axi_clk)) {
  625. printk(KERN_ERR "Unable to get AXI clock 1\n");
  626. goto e_clk_get;
  627. }
  628. if (on) {
  629. if (pi_mgr_dfs_request_update(&unicam_dfs_node, PI_OPP_TURBO))
  630. printk("DVFS for UNICAM failed\n");
  631. gpio_set_value(SENSOR_1_GPIO_PWRDN, 1);
  632. usleep_range(5000, 5010);
  633. regulator_enable(d_lvldo2_cam1_1v8);
  634. usleep_range(1000, 1010);
  635. regulator_enable(d_1v8_mmc1_vcc);
  636. usleep_range(1000, 1010);
  637. /* Secondary cam addition */
  638. regulator_enable(d_gpsr_cam0_1v8);
  639. usleep_range(1000, 1010);
  640. regulator_enable(d_3v0_mmc1_vcc);
  641. usleep_range(1000, 1010);
  642.  
  643. if (mm_ccu_set_pll_select(CSI1_BYTE1_PLL, 8)) {
  644. pr_err("failed to set BYTE1\n");
  645. goto e_clk_pll;
  646. }
  647. if (mm_ccu_set_pll_select(CSI1_BYTE0_PLL, 8)) {
  648. pr_err("failed to set BYTE0\n");
  649. goto e_clk_pll;
  650. }
  651. if (mm_ccu_set_pll_select(CSI1_CAMPIX_PLL, 8)) {
  652. pr_err("failed to set PIXPLL\n");
  653. goto e_clk_pll;
  654. }
  655.  
  656. value = clk_enable(lp_clock_0);
  657. if (value) {
  658. printk(KERN_ERR "Failed to enable lp clock 0\n");
  659. goto e_clk_lp0;
  660. }
  661.  
  662. value = clk_set_rate(lp_clock_0, CSI0_LP_FREQ);
  663. if (value) {
  664. pr_err("Failed to set lp clock 0\n");
  665. goto e_clk_set_lp0;
  666. }
  667.  
  668. value = clk_enable(lp_clock_1);
  669. if (value) {
  670. pr_err(KERN_ERR "Failed to enable lp clock 1\n");
  671. goto e_clk_lp1;
  672. }
  673.  
  674. value = clk_set_rate(lp_clock_1, CSI1_LP_FREQ);
  675. if (value) {
  676. pr_err("Failed to set lp clock 1\n");
  677. goto e_clk_set_lp1;
  678. }
  679.  
  680. value = clk_enable(axi_clk_0);
  681. if (value) {
  682. printk(KERN_ERR "Failed to enable axi clock 0\n");
  683. goto e_clk_axi_clk_0;
  684. }
  685. value = clk_enable(axi_clk);
  686. if (value) {
  687. printk(KERN_ERR "Failed to enable axi clock 1\n");
  688. goto e_clk_axi;
  689. }
  690. value = clk_enable(clock);
  691. if (value) {
  692. printk("Failed to enable sensor 1 clock\n");
  693. goto e_clk_clock;
  694. }
  695. value = clk_set_rate(clock, SENSOR_1_CLK_FREQ);
  696. if (value) {
  697. printk("Failed to set sensor 1 clock\n");
  698. goto e_clk_set_clock;
  699. }
  700. usleep_range(10000, 10100);
  701. gpio_set_value(SENSOR_1_GPIO_PWRDN, 0);
  702. msleep(30);
  703. } else {
  704. gpio_set_value(SENSOR_1_GPIO_PWRDN, 1);
  705. clk_disable(lp_clock_0);
  706. clk_disable(lp_clock_1);
  707. clk_disable(clock);
  708. clk_disable(axi_clk);
  709. clk_disable(axi_clk_0);
  710. regulator_disable(d_lvldo2_cam1_1v8);
  711. regulator_disable(d_1v8_mmc1_vcc);
  712. regulator_disable(d_gpsr_cam0_1v8);
  713. regulator_disable(d_3v0_mmc1_vcc);
  714. if (pi_mgr_dfs_request_update
  715. (&unicam_dfs_node, PI_MGR_DFS_MIN_VALUE)) {
  716. printk("Failed to set DVFS for unicam\n");
  717. }
  718. }
  719. return 0;
  720.  
  721. e_clk_set_clock:
  722. clk_disable(clock);
  723. e_clk_clock:
  724. clk_disable(axi_clk);
  725. e_clk_axi:
  726. clk_disable(axi_clk_0);
  727. e_clk_axi_clk_0:
  728. e_clk_set_lp1:
  729. clk_disable(lp_clock_1);
  730. e_clk_lp1:
  731. e_clk_set_lp0:
  732. clk_disable(lp_clock_0);
  733. e_clk_lp0:
  734. e_clk_pll:
  735. e_clk_get:
  736. return ret;
  737. }
  738.  
  739. static int hawaii_camera_reset_front(struct device *dev)
  740. {
  741. /* reset the camera gpio */
  742. printk(KERN_INFO "%s:camera reset\n", __func__);
  743. return 0;
  744. }
  745.  
  746. static struct soc_camera_link iclink_ov5640 = {
  747. .power = &hawaii_camera_power,
  748. .reset = &hawaii_camera_reset,
  749. };
  750.  
  751. static struct soc_camera_link iclink_ov7692 = {
  752. .power = &hawaii_camera_power_front,
  753. .reset = &hawaii_camera_reset_front,
  754. };
  755.  
  756. #endif /* CONFIG_VIDEO_UNICAM_CAMERA */
  757.  
  758. static struct spi_kona_platform_data hawaii_ssp0_info = {
  759. #ifdef CONFIG_DMAC_PL330
  760. .enable_dma = 1,
  761. #else
  762. .enable_dma = 0,
  763. #endif
  764. .cs_line = 1,
  765. .mode = SPI_LOOP | SPI_MODE_3,
  766. };
  767.  
  768. static struct spi_kona_platform_data hawaii_ssp1_info = {
  769. #ifdef CONFIG_DMAC_PL330
  770. .enable_dma = 1,
  771. #else
  772. .enable_dma = 0,
  773. #endif
  774. };
  775.  
  776. #ifdef CONFIG_STM_TRACE
  777. static struct stm_platform_data hawaii_stm_pdata = {
  778. .regs_phys_base = STM_BASE_ADDR,
  779. .channels_phys_base = SWSTM_BASE_ADDR,
  780. .id_mask = 0x0, /* Skip ID check/match */
  781. .final_funnel = CHAL_TRACE_FIN_FUNNEL,
  782. };
  783. #endif
  784.  
  785. #if defined(CONFIG_USB_DWC_OTG)
  786. static struct bcm_hsotgctrl_platform_data hsotgctrl_plat_data = {
  787. .hsotgctrl_virtual_mem_base = KONA_USB_HSOTG_CTRL_VA,
  788. .chipreg_virtual_mem_base = KONA_CHIPREG_VA,
  789. .irq = BCM_INT_ID_HSOTG_WAKEUP,
  790. .usb_ahb_clk_name = USB_OTG_AHB_BUS_CLK_NAME_STR,
  791. .mdio_mstr_clk_name = MDIOMASTER_PERI_CLK_NAME_STR,
  792. };
  793. #endif
  794.  
  795. struct platform_device *hawaii_common_plat_devices[] __initdata = {
  796. &pmu_device,
  797. &hawaii_ssp0_device,
  798.  
  799. #ifdef CONFIG_SENSORS_KONA
  800. &thermal_device,
  801. #endif
  802.  
  803. #ifdef CONFIG_STM_TRACE
  804. &hawaii_stm_device,
  805. #endif
  806.  
  807. #if defined(CONFIG_HW_RANDOM_KONA)
  808. &rng_device,
  809. #endif
  810.  
  811. #if defined(CONFIG_USB_DWC_OTG)
  812. &hawaii_usb_phy_platform_device,
  813. &hawaii_hsotgctrl_platform_device,
  814. &hawaii_otg_platform_device,
  815. #endif
  816.  
  817. #ifdef CONFIG_KONA_AVS
  818. &avs_device,
  819. #endif
  820.  
  821. #ifdef CONFIG_KONA_CPU_FREQ_DRV
  822. &kona_cpufreq_device,
  823. #endif
  824.  
  825. #ifdef CONFIG_CRYPTO_DEV_BRCM_SPUM_HASH
  826. &hawaii_spum_device,
  827. #endif
  828.  
  829. #ifdef CONFIG_CRYPTO_DEV_BRCM_SPUM_AES
  830. &hawaii_spum_aes_device,
  831. #endif
  832.  
  833. #ifdef CONFIG_UNICAM
  834. &hawaii_unicam_device,
  835. #endif
  836.  
  837. #ifdef CONFIG_VIDEO_UNICAM_CAMERA
  838. &hawaii_camera_device,
  839. #endif
  840.  
  841. #ifdef CONFIG_SND_BCM_SOC
  842. &hawaii_audio_device,
  843. &caph_i2s_device,
  844. &caph_pcm_device,
  845. &spdif_dit_device,
  846.  
  847. #endif
  848. };
  849.  
  850.  
  851. #if defined(CONFIG_SENSORS_KIONIX_KXTIK) \
  852. || defined(CONFIG_SENSORS_KIONIX_KXTIK_MODULE)
  853. #define KXTIK_DEVICE_MAP 2
  854. #define KXTIK_MAP_X ((KXTIK_DEVICE_MAP-1)%2)
  855. #define KXTIK_MAP_Y (KXTIK_DEVICE_MAP%2)
  856. #define KXTIK_NEG_X (((KXTIK_DEVICE_MAP+2)/2)%2)
  857. #define KXTIK_NEG_Y (((KXTIK_DEVICE_MAP+5)/4)%2)
  858. #define KXTIK_NEG_Z ((KXTIK_DEVICE_MAP-1)/4)
  859.  
  860. struct kxtik_platform_data kxtik_pdata = {
  861. .min_interval = 5,
  862. .poll_interval = 200,
  863. .axis_map_x = KXTIK_MAP_X,
  864. .axis_map_y = KXTIK_MAP_Y,
  865. .axis_map_z = 2,
  866. .negate_x = KXTIK_NEG_X,
  867. .negate_y = KXTIK_NEG_Y,
  868. .negate_z = KXTIK_NEG_Z,
  869. .res_12bit = RES_12BIT,
  870. .g_range = KXTIK_G_2G,
  871. };
  872.  
  873. #define KXTIK_GPIO_IRQ_PIN (64)
  874. #define KXTIK_I2C_BUS_ID (0)
  875.  
  876. static struct i2c_board_info __initdata kxtik_i2c_boardinfo[] = {
  877. {
  878. I2C_BOARD_INFO("kxtik", KXTIK_SLAVE_ADDR),
  879. .platform_data = &kxtik_pdata,
  880. .irq = gpio_to_irq(KXTIK_GPIO_IRQ_PIN),
  881. },
  882. };
  883.  
  884. static int kxtik_init_platform_hw(void)
  885. {
  886. int ret = 0;
  887. ret = gpio_request(KXTIK_GPIO_IRQ_PIN, "kxtik-irq");
  888. if (ret < 0) {
  889. printk(KERN_INFO
  890. "kxtik: sensors gpio_request GPIO %d failed, err %d\n",
  891. KXTIK_GPIO_IRQ_PIN, ret);
  892. return ret;
  893. }
  894. ret = gpio_direction_input(KXTIK_GPIO_IRQ_PIN);
  895. if (ret < 0) {
  896. printk(KERN_INFO
  897. "kxtik: sensors gpio_direction_input set GPIO %d as input failed, err %d\n",
  898. KXTIK_GPIO_IRQ_PIN, ret);
  899. gpio_free(KXTIK_GPIO_IRQ_PIN);
  900. return ret;
  901. }
  902. return ret;
  903. }
  904. #endif /* CONFIG_SENSORS_KIONIX_KXTIK */
  905.  
  906. #if defined(CONFIG_MPU_SENSORS_KXTF9)
  907. static struct ext_slave_platform_data inv_mpu_kxtf9_data = {
  908. .bus = EXT_SLAVE_BUS_SECONDARY,
  909. .orientation = MPU3050_DRIVER_ACCEL_KXTF9_ORIENTATION,
  910. };
  911.  
  912. static struct i2c_board_info __initdata inv_mpu_kxtf9_boardinfo[] = {
  913. {
  914. I2C_BOARD_INFO("kxtf9", MPU_SENSORS_KXTF9_SLAVE_ADDR),
  915. .platform_data = &inv_mpu_kxtf9_data,
  916. },
  917. };
  918. #endif /* CONFIG_MPU_SENSORS_KXTF9 */
  919.  
  920. #if defined(CONFIG_SENSORS_BMA222)
  921. static struct bma222_accl_platform_data bma_pdata = {
  922. .orientation = BMA_ROT_90,
  923. .invert = false,
  924. };
  925. #endif
  926.  
  927. #ifdef CONFIG_KONA_HEADSET_MULTI_BUTTON
  928.  
  929. #define HS_IRQ gpio_to_irq(92)
  930. #define HSB_IRQ BCM_INT_ID_AUXMIC_COMP2
  931. #define HSB_REL_IRQ BCM_INT_ID_AUXMIC_COMP2_INV
  932. static unsigned int hawaii_button_adc_values[3][2] = {
  933. /* SEND/END Min, Max */
  934. {0, 10},
  935. /* Volume Up Min, Max */
  936. {11, 30},
  937. /* Volue Down Min, Max */
  938. {30, 680},
  939. };
  940.  
  941. static unsigned int hawaii_button_adc_values_2_1[3][2] = {
  942. /* SEND/END Min, Max */
  943. {0, 104},
  944. /* Volume Up Min, Max */
  945. {139, 270},
  946. /* Volue Down Min, Max */
  947. {330, 680},
  948. };
  949. static struct kona_headset_pd hawaii_headset_data = {
  950. /* GPIO state read is 0 on HS insert and 1 for
  951. * HS remove
  952. */
  953.  
  954. .hs_default_state = 0,
  955. /*
  956. * Because of the presence of the resistor in the MIC_IN line.
  957. * The actual ground may not be 0, but a small offset is added to it.
  958. * This needs to be subtracted from the measured voltage to determine the
  959. * correct value. This will vary for different HW based on the resistor
  960. * values used.
  961. *
  962. * if there is a resistor present on this line, please measure the load
  963. * value and put it here, otherwise 0.
  964. *
  965. */
  966. .phone_ref_offset = 0,
  967.  
  968. /*
  969. * Inform the driver whether there is a GPIO present on the board to
  970. * detect accessory insertion/removal _OR_ should the driver use the
  971. * COMP1 for the same.
  972. */
  973. .gpio_for_accessory_detection = 1,
  974.  
  975. /* Low voltage mode for test purposes only.
  976. * Leave disabled for normal usage*/
  977. /*
  978. * Pass the board specific button detection range
  979. */
  980. .button_adc_values_low = 0,
  981.  
  982. /*
  983. * Pass the board specific button detection range
  984. */
  985. .button_adc_values_high = hawaii_button_adc_values_2_1,
  986.  
  987. /* AUDLDO supply id for changing regulator mode*/
  988. .ldo_id = "audldo_uc",
  989.  
  990. };
  991. #endif /* CONFIG_KONA_HEADSET_MULTI_BUTTON */
  992.  
  993. #ifdef CONFIG_DMAC_PL330
  994. static struct kona_pl330_data hawaii_pl330_pdata = {
  995. /* Non Secure DMAC virtual base address */
  996. .dmac_ns_base = KONA_DMAC_NS_VA,
  997. /* Secure DMAC virtual base address */
  998. .dmac_s_base = KONA_DMAC_S_VA,
  999. /* # of PL330 dmac channels 'configurable' */
  1000. .num_pl330_chans = 8,
  1001. /* irq number to use */
  1002. .irq_base = BCM_INT_ID_DMAC0,
  1003. /* # of PL330 Interrupt lines connected to GIC */
  1004. .irq_line_count = 8,
  1005. };
  1006. #endif
  1007.  
  1008. #ifdef CONFIG_BCM_BT_LPM
  1009. #define GPIO_BT_WAKE 32
  1010. #define GPIO_HOST_WAKE 72
  1011.  
  1012. static struct bcmbt_platform_data brcm_bt_lpm_data = {
  1013. .bt_wake_gpio = GPIO_BT_WAKE,
  1014. .host_wake_gpio = GPIO_HOST_WAKE,
  1015. .bt_uart_port = 1,
  1016. };
  1017.  
  1018. static struct platform_device board_bcmbt_lpm_device = {
  1019. .name = "bcmbt-lpm",
  1020. .id = -1,
  1021. .dev = {
  1022. .platform_data = &brcm_bt_lpm_data,
  1023. },
  1024. };
  1025. #endif
  1026.  
  1027. /*
  1028. * SPI board info for the slaves
  1029. */
  1030. static struct spi_board_info spi_slave_board_info[] __initdata = {
  1031. #ifdef CONFIG_SPI_SPIDEV
  1032. {
  1033. .modalias = "spidev", /* use spidev generic driver */
  1034. .max_speed_hz = 13000000, /* use max speed */
  1035. .bus_num = 0, /* framework bus number */
  1036. .chip_select = 0, /* for each slave */
  1037. .platform_data = NULL, /* no spi_driver specific */
  1038. .irq = 0, /* IRQ for this device */
  1039. .mode = SPI_LOOP, /* SPI mode 0 */
  1040. },
  1041. #endif
  1042. };
  1043.  
  1044. #if defined(CONFIG_HAPTIC_SAMSUNG_PWM)
  1045. void haptic_gpio_setup(void)
  1046. {
  1047. /* Board specific configuration like pin mux & GPIO */
  1048. }
  1049.  
  1050. static struct haptic_platform_data haptic_control_data = {
  1051. /* Haptic device name: can be device-specific name like ISA1000 */
  1052. .name = "pwm_vibra",
  1053. /* PWM interface name to request */
  1054. .pwm_id = 2,
  1055. /* Invalid gpio for now, pass valid gpio number if connected */
  1056. .gpio = ARCH_NR_GPIOS,
  1057. .setup_pin = haptic_gpio_setup,
  1058. };
  1059.  
  1060. struct platform_device haptic_pwm_device = {
  1061. .name = "samsung_pwm_haptic",
  1062. .id = -1,
  1063. .dev = {.platform_data = &haptic_control_data,}
  1064. };
  1065.  
  1066. #endif /* CONFIG_HAPTIC_SAMSUNG_PWM */
  1067.  
  1068. static struct sdio_platform_cfg hawaii_sdio_param = {
  1069.  
  1070. #ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
  1071. .register_status_notify = hawaii_wifi_status_register,
  1072. #endif
  1073.  
  1074. };
  1075.  
  1076. static struct sdio_platform_cfg hawaii_sdio0_param = {
  1077. .configure_sdio_pullup = configure_sdio_pullup,
  1078. };
  1079.  
  1080. static const struct of_dev_auxdata hawaii_auxdata_lookup[] __initconst = {
  1081.  
  1082. OF_DEV_AUXDATA("bcm,pwm-backlight", 0x0,
  1083. "pwm-backlight.0", NULL),
  1084.  
  1085. OF_DEV_AUXDATA("bcm,sdhci", 0x3F190000,
  1086. "sdhci.1", NULL),
  1087.  
  1088. OF_DEV_AUXDATA("bcm,sdhci", 0x3F1A0000,
  1089. "sdhci.2", &hawaii_sdio_param),
  1090.  
  1091. OF_DEV_AUXDATA("bcm,sdhci", 0x3F180000,
  1092. "sdhci.0", &hawaii_sdio0_param),
  1093.  
  1094. OF_DEV_AUXDATA("bcm,soc-camera", 0x3c,
  1095. "soc-back-camera", &iclink_ov5640),
  1096.  
  1097. OF_DEV_AUXDATA("bcm,soc-camera", 0x3e,
  1098. "soc-front-camera", &iclink_ov7692),
  1099. {},
  1100. };
  1101.  
  1102. #ifdef CONFIG_VIDEO_KONA
  1103. static struct ov5640_platform_data ov5640_cam1_pdata = {
  1104. .s_power = hawaii_ov_cam1_power,
  1105. };
  1106.  
  1107. struct unicam_subdev_i2c_board_info ov5640_cam1_i2c_device = {
  1108. .board_info = {
  1109. I2C_BOARD_INFO("ov5640-mc", OV5640_I2C_ADDRESS),
  1110. .platform_data = &ov5640_cam1_pdata,
  1111. },
  1112. .i2c_adapter_id = 0,
  1113. };
  1114.  
  1115. static struct unicam_v4l2_subdevs_groups hawaii_unicam_subdevs[] = {
  1116. {
  1117. /* ov5640 */
  1118. .i2c_info = &ov5640_cam1_i2c_device,
  1119. .interface = UNICAM_INTERFACE_CSI2_PHY1,
  1120. .bus = {
  1121. .csi2 = {
  1122. .lanes = CSI2_DUAL_LANE_SENSOR,
  1123. .port = UNICAM_PORT_AFE_0,
  1124. },
  1125. },
  1126. },
  1127. };
  1128.  
  1129. static struct unicam_platform_data hawaii_unicam_pdata = {
  1130. .subdevs = hawaii_unicam_subdevs,
  1131. .num_subdevs = ARRAY_SIZE(hawaii_unicam_subdevs),
  1132. };
  1133.  
  1134. static struct resource hawaii_unicam_rsrc[] = {
  1135. [0] = {
  1136. .start = BCM_INT_ID_CSI,
  1137. .end = BCM_INT_ID_CSI,
  1138. .flags = IORESOURCE_IRQ,
  1139. },
  1140. };
  1141.  
  1142. static struct platform_device hawaii_unicam_device = {
  1143. /* adding prefix mc to differ from char unicam interface */
  1144. .name = "kona-unicam-mc",
  1145. .id = 0,
  1146. .resource = hawaii_unicam_rsrc,
  1147. .num_resources = ARRAY_SIZE(hawaii_unicam_rsrc),
  1148. .dev = {
  1149. .platform_data = &hawaii_unicam_pdata,
  1150. },
  1151. };
  1152.  
  1153. late_initcall(hawaii_camera_init);
  1154. #endif
  1155. /* Remove this comment when camera data for Hawaii is updated */
  1156.  
  1157. #if defined(CONFIG_SENSORS_BMA222)
  1158. static struct i2c_board_info __initdata bma222_accl_info[] = {
  1159. {
  1160. I2C_BOARD_INFO("bma222_accl", 0x08),
  1161. .irq = -1,
  1162. .platform_data = &bma_pdata,
  1163. },
  1164. };
  1165. #endif
  1166.  
  1167. #ifdef CONFIG_TOUCHSCREEN_FT5306
  1168. static int ts_power(ts_power_status vreg_en)
  1169. {
  1170. struct regulator *reg = NULL;
  1171. if (!reg) {
  1172. /* Remove this comment when the regulator references are fixed here for Hawaii */
  1173. reg = regulator_get(NULL, "hv8");
  1174. if (!reg || IS_ERR(reg)) {
  1175. pr_err("No Regulator available for ldo_hv8\n");
  1176. return -1;
  1177. }
  1178. }
  1179. if (reg) {
  1180. if (vreg_en) {
  1181. regulator_set_voltage(reg, 3000000, 3000000);
  1182. pr_err("Turn on TP (ldo_hv8) to 2.8V\n");
  1183. regulator_enable(reg);
  1184. } else {
  1185. pr_err("Turn off TP (ldo_hv8)\n");
  1186. regulator_disable(reg);
  1187. }
  1188. } else {
  1189. pr_err("TP Regulator Alloc Failed");
  1190. return -1;
  1191. }
  1192. return 0;
  1193. }
  1194.  
  1195. static struct Synaptics_ts_platform_data ft5306_plat_data = {
  1196. .power = ts_power,
  1197. };
  1198.  
  1199. static struct i2c_board_info __initdata ft5306_info[] = {
  1200. { /* New touch screen i2c slave address. */
  1201. I2C_BOARD_INFO("FocalTech-Ft5306", (0x70 >> 1)),
  1202. .platform_data = &ft5306_plat_data,
  1203. .irq = gpio_to_irq(TSC_GPIO_IRQ_PIN),
  1204. },
  1205. };
  1206. #endif
  1207.  
  1208. #if defined(CONFIG_BCM_ALSA_SOUND)
  1209. static struct caph_platform_cfg board_caph_platform_cfg =
  1210. #ifdef HW_CFG_CAPH
  1211. HW_CFG_CAPH;
  1212. #else
  1213. {
  1214. .aud_ctrl_plat_cfg = {
  1215. .ext_aud_plat_cfg = {
  1216. .ihf_ext_amp_gpio = -1,
  1217. .dock_aud_route_gpio = -1,
  1218. .mic_sel_aud_route_gpio = -1,
  1219. }
  1220. }
  1221. };
  1222. #endif
  1223.  
  1224. static struct platform_device board_caph_device = {
  1225. .name = "brcm_caph_device",
  1226. .id = -1, /*Indicates only one device */
  1227. .dev = {
  1228. .platform_data = &board_caph_platform_cfg,
  1229. },
  1230. };
  1231.  
  1232. #endif /* CONFIG_BCM_ALSA_SOUND */
  1233.  
  1234.  
  1235. #ifdef CONFIG_BYPASS_WIFI_DEVTREE
  1236. static struct board_wifi_info hawaii_board_wifi_info = {
  1237. .wl_reset_gpio = 3,
  1238. .host_wake_gpio = 74,
  1239. .board_nvram_file
  1240. = "/system/vendor/firmware/fw_wifi_nvram_4334_hs1x.txt",
  1241. .module_name = "bcmdhd_4334",
  1242. };
  1243.  
  1244. static struct platform_device hawaii_wifi_pltfm_device = {
  1245. .name = "bcm_wifi",
  1246. .id = -1,
  1247. .dev = {
  1248. .platform_data = &hawaii_board_wifi_info,
  1249. }
  1250. };
  1251. #endif
  1252.  
  1253. static struct platform_device *hawaii_devices[] __initdata = {
  1254. #ifdef CONFIG_KONA_HEADSET_MULTI_BUTTON
  1255. &hawaii_headset_device,
  1256. #endif
  1257.  
  1258. #ifdef CONFIG_DMAC_PL330
  1259. &hawaii_pl330_dmac_device,
  1260. #endif
  1261.  
  1262. #ifdef CONFIG_HAPTIC_SAMSUNG_PWM
  1263. &haptic_pwm_device,
  1264. #endif
  1265.  
  1266. #ifdef CONFIG_BCM_BT_LPM
  1267. &board_bcmbt_lpm_device,
  1268. #endif
  1269.  
  1270. #ifdef CONFIG_VIDEO_KONA
  1271. &hawaii_unicam_device,
  1272. #endif
  1273.  
  1274. #if defined(CONFIG_BCM_ALSA_SOUND)
  1275. &board_caph_device,
  1276. #endif
  1277.  
  1278. #ifdef CONFIG_BYPASS_WIFI_DEVTREE
  1279. &hawaii_wifi_pltfm_device,
  1280. #endif
  1281.  
  1282.  
  1283. };
  1284.  
  1285. static void __init hawaii_add_i2c_devices(void)
  1286. {
  1287.  
  1288. #ifdef CONFIG_VIDEO_ADP1653
  1289. i2c_register_board_info(0, adp1653_flash, ARRAY_SIZE(adp1653_flash));
  1290. #endif
  1291.  
  1292. #ifdef CONFIG_TOUCHSCREEN_FT5306
  1293. i2c_register_board_info(3, ft5306_info, ARRAY_SIZE(ft5306_info));
  1294. #endif
  1295.  
  1296. #ifdef CONFIG_SENSORS_BMA222
  1297. i2c_register_board_info(2, bma222_accl_info,
  1298. ARRAY_SIZE(bma222_accl_info));
  1299. #endif
  1300.  
  1301. #if defined(CONFIG_MPU_SENSORS_KXTF9)
  1302. inv_mpu_kxtf9_boardinfo[0].irq =
  1303. gpio_to_irq(MPU_SENSORS_KXTF9_IRQ_GPIO);
  1304. i2c_register_board_info(0, inv_mpu_kxtf9_boardinfo,
  1305. ARRAY_SIZE(inv_mpu_kxtf9_boardinfo));
  1306. #endif /* CONFIG_MPU_SENSORS_KXTF9 */
  1307.  
  1308. #if defined(CONFIG_SENSORS_KIONIX_KXTIK) \
  1309. || defined(CONFIG_SENSORS_KIONIX_KXTIK_MODULE)
  1310. i2c_register_board_info(KXTIK_I2C_BUS_ID,
  1311. kxtik_i2c_boardinfo,
  1312. ARRAY_SIZE(kxtik_i2c_boardinfo));
  1313. #endif /* CONFIG_SENSORS_KIONIX_KXTIK */
  1314.  
  1315. }
  1316.  
  1317. #ifdef CONFIG_ION_BCM_NO_DT
  1318. #ifdef CONFIG_IOMMU_API
  1319. struct bcm_iommu_pdata iommu_mm_pdata = {
  1320. .name = "iommu-mm",
  1321. .iova_begin = 0x80000000,
  1322. .iova_size = 0x80000000,
  1323. .errbuf_size = 0x1000,
  1324. .skip_enable = 1,
  1325. };
  1326. #endif
  1327. #ifdef CONFIG_BCM_IOVMM
  1328. struct bcm_iovmm_pdata iovmm_mm_pdata = {
  1329. .name = "iovmm-mm",
  1330. .base = 0xc0000000,
  1331. .size = 0x30000000,
  1332. .order = 0,
  1333. };
  1334. struct bcm_iovmm_pdata iovmm_mm_256mb_pdata = {
  1335. .name = "iovmm-mm-256mb",
  1336. .base = 0xf0000000,
  1337. .size = 0x0bf00000,
  1338. .order = 0,
  1339. };
  1340. #endif
  1341. #endif /* CONFIG_ION_BCM_NO_DT */
  1342.  
  1343. /* The GPIO used to indicate accessory insertion in this board */
  1344. #define HS_IRQ gpio_to_irq(92)
  1345.  
  1346. static void hawaii_add_pdata(void)
  1347. {
  1348. hawaii_ssp0_device.dev.platform_data = &hawaii_ssp0_info;
  1349. hawaii_ssp1_device.dev.platform_data = &hawaii_ssp1_info;
  1350. #ifdef CONFIG_BCM_STM
  1351. hawaii_stm_device.dev.platform_data = &hawaii_stm_pdata;
  1352. #endif
  1353. hawaii_headset_device.dev.platform_data = &hawaii_headset_data;
  1354. /* The resource in position 2 (starting from 0) is used to fill
  1355. * the GPIO number. The driver file assumes this. So put the
  1356. * board specific GPIO number here
  1357. */
  1358. hawaii_headset_device.resource[2].start = HS_IRQ;
  1359. hawaii_headset_device.resource[2].end = HS_IRQ;
  1360.  
  1361. hawaii_pl330_dmac_device.dev.platform_data = &hawaii_pl330_pdata;
  1362. #ifdef CONFIG_USB_DWC_OTG
  1363. hawaii_hsotgctrl_platform_device.dev.platform_data =
  1364. &hsotgctrl_plat_data;
  1365. hawaii_usb_phy_platform_device.dev.platform_data =
  1366. &hsotgctrl_plat_data;
  1367. #endif
  1368. #ifdef CONFIG_ION_BCM_NO_DT
  1369. #ifdef CONFIG_IOMMU_API
  1370. iommu_mm_device.dev.platform_data = &iommu_mm_pdata;
  1371. #endif
  1372. #ifdef CONFIG_BCM_IOVMM
  1373. iovmm_mm_device.dev.platform_data = &iovmm_mm_pdata;
  1374. iovmm_mm_256mb_device.dev.platform_data = &iovmm_mm_256mb_pdata;
  1375. ion_system_device.dev.platform_data = &ion_system_data;
  1376. ion_system_extra_device.dev.platform_data = &ion_system_extra_data;
  1377. #endif
  1378. #endif /* CONFIG_ION_BCM_NO_DT */
  1379. }
  1380.  
  1381. void __init hawaii_add_common_devices(void)
  1382. {
  1383. #ifdef CONFIG_ANDROID_PMEM
  1384. platform_device_register(&android_pmem);
  1385. #endif
  1386.  
  1387. platform_add_devices(hawaii_common_plat_devices,
  1388. ARRAY_SIZE(hawaii_common_plat_devices));
  1389. }
  1390.  
  1391. static void __init hawaii_add_devices(void)
  1392. {
  1393.  
  1394. hawaii_add_pdata();
  1395.  
  1396. #ifdef CONFIG_ION_BCM_NO_DT
  1397. #ifdef CONFIG_IOMMU_API
  1398. platform_device_register(&iommu_mm_device);
  1399. #endif
  1400. #ifdef CONFIG_BCM_IOVMM
  1401. platform_device_register(&iovmm_mm_device);
  1402. platform_device_register(&iovmm_mm_256mb_device);
  1403. platform_device_register(&ion_system_device);
  1404. platform_device_register(&ion_system_extra_device);
  1405. #endif
  1406. platform_device_register(&ion_carveout_device);
  1407. #ifdef CONFIG_CMA
  1408. platform_device_register(&ion_cma_device);
  1409. #endif
  1410. #if defined(CONFIG_MM_SECURE_DRIVER)
  1411. platform_device_register(&ion_secure_device);
  1412. #endif /* CONFIG_MM_SECURE_DRIVER */
  1413. #endif /* CONFIG_ION_BCM_NO_DT */
  1414.  
  1415. platform_add_devices(hawaii_devices, ARRAY_SIZE(hawaii_devices));
  1416.  
  1417. hawaii_add_i2c_devices();
  1418.  
  1419. spi_register_board_info(spi_slave_board_info,
  1420. ARRAY_SIZE(spi_slave_board_info));
  1421.  
  1422. }
  1423.  
  1424. static struct of_device_id hawaii_dt_match_table[] __initdata = {
  1425. { .compatible = "simple-bus", },
  1426. {}
  1427. };
  1428.  
  1429. static void __init hawaii_init(void)
  1430. {
  1431. hawaii_add_devices();
  1432. hawaii_add_common_devices();
  1433. /* Populate platform_devices from device tree data */
  1434. of_platform_populate(NULL, hawaii_dt_match_table,
  1435. hawaii_auxdata_lookup, &platform_bus);
  1436. return;
  1437. }
  1438.  
  1439. static int __init hawaii_add_lateinit_devices(void)
  1440. {
  1441.  
  1442. #ifdef CONFIG_BRCM_UNIFIED_DHD_SUPPORT
  1443. hawaii_wlan_init();
  1444. #endif
  1445. return 0;
  1446. }
  1447.  
  1448. late_initcall(hawaii_add_lateinit_devices);
  1449.  
  1450. static const char *hawaii_dt_compat[] = { "bcm,hawaii", NULL, };
  1451. DT_MACHINE_START(HAWAII, "hawaii")
  1452. .map_io = hawaii_map_io,
  1453. .init_irq = kona_init_irq,
  1454. .handle_irq = gic_handle_irq,
  1455. .timer = &kona_timer,
  1456. .init_machine = hawaii_init,
  1457. .reserve = hawaii_reserve,
  1458. .restart = hawaii_restart,
  1459. .dt_compat = hawaii_dt_compat,
  1460. MACHINE_END
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