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  1. /*
  2. * Copyright (C) 2014 starterkit.ru
  3. */
  4.  
  5. /dts-v1/;
  6.  
  7. #include "imx6dl.dtsi"
  8.  
  9. / {
  10. model = "Starterkit i.MX6 Solo OEM Board";
  11. compatible = "sk,imx6dl-oem", "fsl,imx6dl-sabresd", "fsl,imx6dl";
  12.  
  13. aliases {
  14. mxcfb0 = &mxcfb1;
  15. mxcfb1 = &mxcfb2;
  16. };
  17.  
  18. memory {
  19. reg = <0x10000000 0x20000000>;
  20. };
  21.  
  22. regulators {
  23. compatible = "simple-bus";
  24.  
  25. reg_3p3v: 3p3v {
  26. compatible = "regulator-fixed";
  27. regulator-name = "3P3V";
  28. regulator-min-microvolt = <3300000>;
  29. regulator-max-microvolt = <3300000>;
  30. regulator-always-on;
  31. };
  32.  
  33. reg_usb_h1_vbus: usb_h1_vbus {
  34. compatible = "regulator-fixed";
  35. regulator-name = "usb_h1_vbus";
  36. regulator-min-microvolt = <5000000>;
  37. regulator-max-microvolt = <5000000>;
  38. gpio = <&gpio7 7 0>;
  39. enable-active-high;
  40. };
  41. };
  42.  
  43. mxcfb1: fb@0 {
  44. compatible = "fsl,mxc_sdc_fb";
  45. disp_dev = "ldb";
  46. interface_pix_fmt = "RGB24";
  47. mode_str ="LDB-XGA";
  48. default_bpp = <16>;
  49. int_clk = <0>;
  50. late_init = <0>;
  51. status = "disabled";
  52. };
  53.  
  54. mxcfb2: fb@1 {
  55. compatible = "fsl,mxc_sdc_fb";
  56. disp_dev = "hdmi";
  57. interface_pix_fmt = "RGB24";
  58. mode_str = "1280x720M@60";
  59. default_bpp = <16>;
  60. int_clk = <0>;
  61. late_init = <0>;
  62. status = "disabled";
  63. };
  64.  
  65. lcd@0 {
  66. compatible = "fsl,lcd";
  67. ipu_id = <0>;
  68. disp_id = <0>;
  69. default_ifmt = "bgr666";
  70. pinctrl-names = "default";
  71. pinctrl-0 = <&pinctrl_ipu1_lcd_oem>;
  72. status = "okay";
  73. display-timings {
  74. MI0570KT1 {
  75. clock-frequency = <25000000>;
  76. hactive = <640>;
  77. vactive = <480>;
  78. hfront-porch = <16>;
  79. hback-porch = <114>;
  80. hsync-len = <30>;
  81. vback-porch = <32>;
  82. vfront-porch = <10>;
  83. vsync-len = <3>;
  84. pixelclk-active = <1>;
  85. hsync-active = <0>;
  86. vsync-active = <0>;
  87. de-active = <1>;
  88. };
  89. };
  90. };
  91.  
  92. backlight {
  93. compatible = "pwm-backlight";
  94. pwms = <&pwm1 0 50000 0 0>;
  95. brightness-levels = <0 2 4 6 8 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95 100>;
  96. default-brightness-level = <23>;
  97. };
  98.  
  99. gpio-keys {
  100. compatible = "gpio-keys";
  101. button-key {
  102. label = "IMX_BUT";
  103. gpios = <&gpio6 3 0>;
  104. linux,code = <59>; /* KEY_F1 */
  105. };
  106. gsm-ring {
  107. label = "GSM_RING";
  108. gpios = <&gpio6 2 0>;
  109. linux,code = <60>; /* KEY_F2 */
  110. };
  111. };
  112.  
  113. v4l2_cap_0 {
  114. compatible = "fsl,imx6q-v4l2-capture";
  115. ipu_id = <0>;
  116. csi_id = <0>;
  117. mclk_source = <0>;
  118. status = "okay";
  119. };
  120.  
  121. v4l2_out {
  122. compatible = "fsl,mxc_v4l2_output";
  123. status = "okay";
  124. };
  125. };
  126.  
  127. &ecspi4 {
  128. fsl,spi-num-chipselects = <1>;
  129. cs-gpios = <&gpio3 20 0>;
  130. pinctrl-names = "default";
  131. pinctrl-0 = <&pinctrl_ecspi4_oem>;
  132. status = "okay";
  133.  
  134. tsc2046@0 { /* touch screen */
  135. compatible = "ti,tsc2046";
  136. reg = <0>;
  137. spi-max-frequency = <1000000>;
  138. /* pen irq is GPIO3_17 */
  139. interrupt-parent = <&gpio3>;
  140. interrupts = <17 0x2>;
  141. pendown-gpio = <&gpio3 17 0>;
  142. vcc-supply = <&reg_3p3v>;
  143.  
  144. ti,x-min = <150>;
  145. ti,x-max = <3830>;
  146. ti,y-min = <190>;
  147. ti,y-max = <3830>;
  148. ti,settle-delay-usec = <250>;
  149.  
  150. linux,wakeup;
  151. };
  152. };
  153.  
  154. &fec {
  155. pinctrl-names = "default";
  156. pinctrl-0 = <&pinctrl_enet_oem>;
  157. phy-mode = "rmii";
  158. phy-reset-gpios = <&gpio1 23 0>;
  159. status = "okay";
  160. };
  161.  
  162. &gpmi {
  163. pinctrl-names = "default";
  164. pinctrl-0 = <&pinctrl_gpmi_nand_oem>;
  165. status = "okay";
  166.  
  167. partition@0 {
  168. label = "bootloader";
  169. reg = <0x0000000 0x01000000>;
  170. };
  171.  
  172. partition@1000000 {
  173. label = "environment";
  174. reg = <0x01000000 0x00200000>;
  175. };
  176.  
  177. partition@1200000 {
  178. label = "kernel";
  179. reg = <0x01200000 0x03200000>;
  180. };
  181.  
  182. partition@4400000 {
  183. label = "filesystem";
  184. reg = <0x04400000 0x78A00000>;
  185. };
  186. };
  187.  
  188. &iomuxc {
  189. pinctrl-names = "default";
  190. pinctrl-0 = <&pinctrl_hog>;
  191.  
  192. hog {
  193. pinctrl_hog: hoggrp {
  194. fsl,pins = <
  195. MX6QDL_PAD_EIM_D20__GPIO3_IO20 0x80000000 /* TS_CS */
  196. MX6QDL_PAD_EIM_D17__GPIO3_IO17 0x80000000 /* TS PENIRQ */
  197. MX6QDL_PAD_SD4_DAT2__GPIO2_IO10 0x80000000 /* GSM_PWR_STATE */
  198. MX6QDL_PAD_CSI0_DAT14__GPIO6_IO00 0x80000000 /* GSM_EMERG */
  199. MX6QDL_PAD_CSI0_DAT15__GPIO6_IO01 0x80000000 /* GSM_ON */
  200. MX6QDL_PAD_CSI0_DAT16__GPIO6_IO02 0x80000000 /* GSM_RING */
  201. MX6QDL_PAD_CSI0_DAT17__GPIO6_IO03 0x80000000 /* IMX_BUT */
  202. MX6QDL_PAD_CSI0_DAT18__GPIO6_IO04 0x80000000 /* LED1 */
  203. MX6QDL_PAD_CSI0_DAT19__GPIO6_IO05 0x80000000 /* LED2 */
  204. MX6QDL_PAD_CSI0_MCLK__GPIO5_IO19 0x80000000 /* RESET_BL */
  205. MX6QDL_PAD_CSI0_VSYNC__GPIO5_IO21 0x80000000 /* USB_PWR */
  206. MX6QDL_PAD_CSI0_PIXCLK__GPIO5_IO18 0x80000000 /* BOOT0 */
  207. MX6QDL_PAD_CSI0_DATA_EN__GPIO5_IO20 0x80000000 /* BOOT1 */
  208. MX6QDL_PAD_ENET_REF_CLK__GPIO1_IO23 0x80000000 /* PHY Reset */
  209. MX6QDL_PAD_SD3_DAT3__GPIO7_IO07 0x80000000 /* USB Host power */
  210. >;
  211. };
  212. };
  213.  
  214. ecspi4 {
  215. pinctrl_ecspi4_oem: ecspi4-oem {
  216. fsl,pins = <
  217. MX6QDL_PAD_EIM_D21__ECSPI4_SCLK 0x100b1
  218. MX6QDL_PAD_EIM_D22__ECSPI4_MISO 0x100b1
  219. MX6QDL_PAD_EIM_D28__ECSPI4_MOSI 0x100b1
  220. >;
  221. };
  222. };
  223.  
  224. fec {
  225. pinctrl_enet_oem: enet-oem {
  226. fsl,pins = <
  227. MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
  228. MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
  229. MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
  230. MX6QDL_PAD_ENET_CRS_DV__ENET_RX_EN 0x1b0b0
  231. MX6QDL_PAD_ENET_RX_ER__ENET_RX_ER 0x1b0b0
  232. MX6QDL_PAD_ENET_TX_EN__ENET_TX_EN 0x1b0b0
  233. MX6QDL_PAD_ENET_RXD0__ENET_RX_DATA0 0x1b0b0
  234. MX6QDL_PAD_ENET_RXD1__ENET_RX_DATA1 0x1b0b0
  235. MX6QDL_PAD_ENET_TXD0__ENET_TX_DATA0 0x1b0b0
  236. MX6QDL_PAD_ENET_TXD1__ENET_TX_DATA1 0x1b0b0
  237. >;
  238. };
  239. };
  240.  
  241. gpmi-nand {
  242. pinctrl_gpmi_nand_oem: gpmi-nand-oem {
  243. fsl,pins = <
  244. MX6QDL_PAD_NANDF_CLE__NAND_CLE 0xb0b1
  245. MX6QDL_PAD_NANDF_ALE__NAND_ALE 0xb0b1
  246. MX6QDL_PAD_NANDF_WP_B__NAND_WP_B 0xb0b1
  247. MX6QDL_PAD_NANDF_RB0__NAND_READY_B 0xb000
  248. MX6QDL_PAD_NANDF_CS0__NAND_CE0_B 0xb0b1
  249. MX6QDL_PAD_NANDF_CS1__NAND_CE1_B 0xb0b1
  250. MX6QDL_PAD_SD4_CMD__NAND_RE_B 0xb0b1
  251. MX6QDL_PAD_SD4_CLK__NAND_WE_B 0xb0b1
  252. MX6QDL_PAD_NANDF_D0__NAND_DATA00 0xb0b1
  253. MX6QDL_PAD_NANDF_D1__NAND_DATA01 0xb0b1
  254. MX6QDL_PAD_NANDF_D2__NAND_DATA02 0xb0b1
  255. MX6QDL_PAD_NANDF_D3__NAND_DATA03 0xb0b1
  256. MX6QDL_PAD_NANDF_D4__NAND_DATA04 0xb0b1
  257. MX6QDL_PAD_NANDF_D5__NAND_DATA05 0xb0b1
  258. MX6QDL_PAD_NANDF_D6__NAND_DATA06 0xb0b1
  259. MX6QDL_PAD_NANDF_D7__NAND_DATA07 0xb0b1
  260. MX6QDL_PAD_SD4_DAT0__NAND_DQS 0x00b1
  261. >;
  262. };
  263. };
  264.  
  265. ipu1 {
  266. pinctrl_ipu1_lcd_oem: ipu1-lcd-oem {
  267. fsl,pins = <
  268. MX6QDL_PAD_DI0_DISP_CLK__IPU1_DI0_DISP_CLK 0x10
  269. MX6QDL_PAD_DI0_PIN15__IPU1_DI0_PIN15 0x10
  270. MX6QDL_PAD_DI0_PIN2__IPU1_DI0_PIN02 0x10
  271. MX6QDL_PAD_DI0_PIN3__IPU1_DI0_PIN03 0x10
  272. MX6QDL_PAD_DI0_PIN4__IPU1_DI0_PIN04 0x80000000
  273. MX6QDL_PAD_DISP0_DAT0__IPU1_DISP0_DATA00 0x10
  274. MX6QDL_PAD_DISP0_DAT1__IPU1_DISP0_DATA01 0x10
  275. MX6QDL_PAD_DISP0_DAT2__IPU1_DISP0_DATA02 0x10
  276. MX6QDL_PAD_DISP0_DAT3__IPU1_DISP0_DATA03 0x10
  277. MX6QDL_PAD_DISP0_DAT4__IPU1_DISP0_DATA04 0x10
  278. MX6QDL_PAD_DISP0_DAT5__IPU1_DISP0_DATA05 0x10
  279. MX6QDL_PAD_DISP0_DAT6__IPU1_DISP0_DATA06 0x10
  280. MX6QDL_PAD_DISP0_DAT7__IPU1_DISP0_DATA07 0x10
  281. MX6QDL_PAD_DISP0_DAT8__IPU1_DISP0_DATA08 0x10
  282. MX6QDL_PAD_DISP0_DAT9__IPU1_DISP0_DATA09 0x10
  283. MX6QDL_PAD_DISP0_DAT10__IPU1_DISP0_DATA10 0x10
  284. MX6QDL_PAD_DISP0_DAT11__IPU1_DISP0_DATA11 0x10
  285. MX6QDL_PAD_DISP0_DAT12__IPU1_DISP0_DATA12 0x10
  286. MX6QDL_PAD_DISP0_DAT13__IPU1_DISP0_DATA13 0x10
  287. MX6QDL_PAD_DISP0_DAT14__IPU1_DISP0_DATA14 0x10
  288. MX6QDL_PAD_DISP0_DAT15__IPU1_DISP0_DATA15 0x10
  289. MX6QDL_PAD_DISP0_DAT16__IPU1_DISP0_DATA16 0x10
  290. MX6QDL_PAD_DISP0_DAT17__IPU1_DISP0_DATA17 0x10
  291. MX6QDL_PAD_DISP0_DAT18__IPU1_DISP0_DATA18 0x10
  292. MX6QDL_PAD_DISP0_DAT19__IPU1_DISP0_DATA19 0x10
  293. MX6QDL_PAD_DISP0_DAT20__IPU1_DISP0_DATA20 0x10
  294. MX6QDL_PAD_DISP0_DAT21__IPU1_DISP0_DATA21 0x10
  295. MX6QDL_PAD_DISP0_DAT22__IPU1_DISP0_DATA22 0x10
  296. MX6QDL_PAD_DISP0_DAT23__IPU1_DISP0_DATA23 0x10
  297. >;
  298. };
  299. };
  300.  
  301. pwm1 {
  302. pinctrl_pwm1_oem: pwm4-oem {
  303. fsl,pins = <
  304. MX6QDL_PAD_GPIO_9__PWM1_OUT 0x1b0b1 /* LCD brightness */
  305. >;
  306. };
  307. };
  308.  
  309. uart1 {
  310. pinctrl_uart1_oem: uart1-oem {
  311. fsl,pins = <
  312. MX6QDL_PAD_CSI0_DAT10__UART1_TX_DATA 0x1b0b1
  313. MX6QDL_PAD_CSI0_DAT11__UART1_RX_DATA 0x1b0b1
  314. >;
  315. };
  316. };
  317.  
  318. uart2 {
  319. pinctrl_uart2_oem: uart2-oem {
  320. fsl,pins = <
  321. MX6QDL_PAD_GPIO_7__UART2_TX_DATA 0x1b0b1
  322. MX6QDL_PAD_GPIO_8__UART2_RX_DATA 0x1b0b1
  323. >;
  324. };
  325. };
  326.  
  327. uart3 {
  328. pinctrl_uart3_oem: uart3-oem {
  329. fsl,pins = <
  330. MX6QDL_PAD_EIM_D24__UART3_TX_DATA 0x1b0b1
  331. MX6QDL_PAD_EIM_D25__UART3_RX_DATA 0x1b0b1
  332. >;
  333. };
  334. };
  335.  
  336. usbotg {
  337. pinctrl_usbotg_oem: usbotg-oem {
  338. fsl,pins = <
  339. MX6QDL_PAD_GPIO_1__USB_OTG_ID 0x17059
  340. >;
  341. };
  342. };
  343. };
  344.  
  345. &ldb {
  346. ipu_id = <0>;
  347. disp_id = <0>;
  348. ext_ref = <1>;
  349. mode = "sep0";
  350. sec_ipu_id = <0>;
  351. sec_disp_id = <1>;
  352. status = "okay";
  353. };
  354.  
  355. &pcie {
  356. status = "okay";
  357. };
  358.  
  359. &uart1 {
  360. pinctrl-names = "default";
  361. pinctrl-0 = <&pinctrl_uart1_oem>;
  362. status = "okay";
  363. };
  364.  
  365. &uart2 {
  366. pinctrl-names = "default";
  367. pinctrl-0 = <&pinctrl_uart2_oem>;
  368. status = "okay";
  369. };
  370.  
  371. &uart3 {
  372. pinctrl-names = "default";
  373. pinctrl-0 = <&pinctrl_uart3_oem>;
  374. status = "okay";
  375. };
  376.  
  377. &usbh1 {
  378. vbus-supply = <&reg_usb_h1_vbus>;
  379. status = "okay";
  380. };
  381.  
  382. &usbotg {
  383. pinctrl-names = "default";
  384. pinctrl-0 = <&pinctrl_usbotg_oem>;
  385. disable-over-current;
  386. status = "okay";
  387. };
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