--- a/drivers/tty/serial/mxs-auart.c
+++ b/drivers/tty/serial/mxs-auart.c
@@ -137,6 +137,7 @@
 #define MXS_AUART_DMA_TX_SYNC  2  /* bit 2 */
 #define MXS_AUART_DMA_RX_READY 3  /* bit 3 */
 #define MXS_AUART_RTSCTS   4  /* bit 4 */
+#define MXS_AUART_RS485        5 /* bit 5 */
    unsigned long flags;
    unsigned int ctrl;
    enum mxs_auart_type devtype;
@@ -279,7 +280,9 @@
        return;
    }

-
+   if ((test_bit(MXS_AUART_RS485, &s->flags)) && (!(readl(s->port.membase + AUART_STAT) & AUART_STAT_TXFF)) && ((s->port.x_char) || (!uart_circ_empty(xmit) && !uart_tx_stopped(&s->port))))
+       writel(AUART_CTRL2_RTS, s->port.membase + AUART_CTRL2_CLR);
+
    while (!(readl(s->port.membase + AUART_STAT) &
         AUART_STAT_TXFF)) {
        if (s->port.x_char) {
@@ -309,6 +312,10 @@

    if (uart_tx_stopped(&s->port))
        mxs_auart_stop_tx(&s->port);
+   if(test_bit(MXS_AUART_RS485, &s->flags)) {
+       while ((readl(s->port.membase + AUART_STAT) & AUART_STAT_BUSY));
+       writel(AUART_CTRL2_RTS, s->port.membase + AUART_CTRL2_SET);
+   }
 }

 static void mxs_auart_rx_char(struct mxs_auart_port *s)
@@ -632,7 +639,7 @@
        ctrl |= AUART_LINECTRL_STP2;

    /* figure out the hardware flow control settings */
-   if (cflag & CRTSCTS) {
+   if ((cflag & CRTSCTS) && ~(test_bit(MXS_AUART_RS485, &s->flags))) {
        /*
         * The DMA has a bug(see errata:2836) in mx23.
         * So we can not implement the DMA for auart in mx23,
@@ -649,6 +656,8 @@
        ctrl2 |= AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN;
    } else {
        ctrl2 &= ~(AUART_CTRL2_CTSEN | AUART_CTRL2_RTSEN);
+       if (test_bit(MXS_AUART_RS485, &s->flags))
+           ctrl2 |= AUART_CTRL2_RTS;
    }

    /* set baud rate */
@@ -1011,6 +1020,10 @@
    if (of_get_property(np, "fsl,uart-has-rtscts", NULL))
        set_bit(MXS_AUART_RTSCTS, &s->flags);

+   if (of_get_property(np, "fsl,rs485-uart", NULL))
+       set_bit(MXS_AUART_RS485, &s->flags);
+
+
    return 0;
 }