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- ;-----------------------------------------------
- ; RESET - $EE24
- ;-----------------------------------------------
- RESET: ; ADR: $EE24
- SEI ; Set interrupt disable.
- LDA #%00010000 ; 10h
- ; PPU setup 1.
- ; D0-D1: Base nametable address: $2000
- ; D2: VRAM increment by 1.
- ; D3: Sprite pattern table for 8x8 sprites: $0000
- ; D4: Background pattern table: $1000
- ; D5: Sprite size: 8x8
- ; D6: PPU master/slave: No effect.
- ; D7: NMI off at the start of vertical blanking period.
- STA $2000
- STA PPUCTRL
- CLD ; Clear decimal mode.
- LDA #%00000110 ; 06h
- ; PPU setup 2.
- ; D0: Normal color.
- ; D1: Show background in leftmost 8 pixels of screen.
- ; D2: Show sprites in leftmost 8 pixels of screen.
- ; D3: Background disabled.
- ; D4: Sprites disabled.
- ; D5: No red intensify.
- ; D6: No green intensify.
- ; D7: No blue intensify.
- STA PPUMASK
- STA $2001
- LDX #$02
- WAIT_VBL: ; ADR: $EE36
- ; Wait for vertical blank. At least 1 frame.
- LDA $2002 ; Read PPU status.
- BPL WAIT_VBL
- ; X = 02h
- DEX ; X = 01h
- ; Decrement X register.
- ; Burn up cycles by running the code.
- BNE WAIT_VBL
- ; X = 00h
- STX $4022 ; Disable timer IRQ interrupt.
- STX $4023 ; Disable RP2C33 I/O control. Disk functions and
- ; Sound disabled.
- LDA #%10000011 ; 83h
- ; D0: Enable disk I/O
- ; D1: Enable sound
- ; D7: Unknown function
- ; D7 needs to be reverse engineered.
- STA $4023
- STX PPUSCROLL_1 ; Write to shadow copy to reset scroll address latch.
- STX PPUSCROLL_2
- STX P1CTRL ; Clear player 1 controller shadow copy.
- STX $4016
- LDA #%00101110 ; 2Eh
- ; D0: Drive motor stopped.
- ; D1: No effect turning motor on.
- ; D2: Read disk data.
- ; D3: Vertical mirroring.
- ; D4: CRC Phase read/write data.
- ; D5: Unknown. Must be a 1.
- ; D6: Ignore data in $4024. Stream of 0's written
- ; to the disk.
- ; D7: Transfer without using IRQ.
- ; D5 needs reverse engineering.
- STA DISKCTRL
- STA $4025
- LDA #%11111111 ; D0-D6: All bits set for data output to expansion terminal.
- ; D7: Battery status set for checking via $4033.
- STA EXT_CONNECT_O ; Shadow of $4026.
- STA $4026
- ; X = 00h
- ; D7: Interrupt clear
- ; D6: Loop set to 0.
- ; D0-D3: Timer period $1AC.
- STX $4010
- LDA #%11000000 ; C0h
- ; D7: Mode 1 5 step sequence
- ; D6: Frame interrupt cleared.
- STA $4017
- LDA #%00001111 ; 0Fh
- ; D0: Square 1 channel on
- ; D1: Square 2 channel on
- ; D2: Triangle channel on
- ; D3: Noise channel on
- STA $4015
- LDA #%10000000 ; 80h
- ; D0-D5: Volume envelope speed 0.
- ; D6: Volume change direction decrease.
- ; D7: Volume envelope mode off.
- STA $4080
- LDA #$E8 ; Set volume and sweep envelope.
- STA $408A
- LDX #$FF ; Set stack pointer to the top of the stack.
- TXS ; $01FF
- LDA #$C0 ; Initialize both action on NMI and IRQ.
- STA ACT_NMI
- LDA #$80
- STA ACT_IRQ
- LDA ACT_RESET
- CMP #$35 ; If 35h, disk and boot files are loaded.
- BNE + ; If not 35h, branch.
- LDA RESET_VAR
- CMP #$53 ; If 53h, FDS was soft reset by user.
- BEQ LOAD_DISK_RSET ;
- CMP #$AC ; If ACh, FDS was cold booted.
- BNE + ; If not ACh, branch.
- LDA #$53 ; Initialized RESET_VAR for next user reset.
- STA RESET_VAR
- LOAD_DISK_RSET: ; ADR: $EE9B
- JSR RESET_PPU1
- CLI ; Clear interrupt disable.
- JMP (DISK_RESET_VECTOR) ; Go to disk reset vector.
- +: ; ADR: $EEA2
- LDA #00 ; 00h - $00 - $F8.
- LDX #248 ; 248 bytes F8h
- CLR_MEM_1: ; ADR: $EEA6
- ; Clear F8h or 248 bytes in Zero Page WRAM.
- ; Using a countdown decrement loop.
- STA $00,X
- DEX
- BNE CLR_MEM_1
- ;--------------------------------------
- ; A = 0 X = 0
- STA $0301
- LDA #$7D
- STA $0300
- LDA #$FF
- STA $0302
- ; Unknown initialization.
- ;--------------------------------------
- JSR GETCTRL_STATUS
- LDA P1CTRL_D0_B ; Load controller 1 status bit 0.
- CMP #%00110000 ; 30h
- ; Check start and select controller buttons.
- ; If pressed continue on to boot test screen.
- BNE SKIP_BOOT_TEST ; If not 30h, skip boot test screen.
- LDA #$00
- STA ACT_RESET
- JMP BOOT_TEST ; Go to boot test screen.
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