112

_NUMBER 2

VAR DATA_WDT AGENT_RESPONSE_DESC.DATA_WDT

ITER N $AGENT_NUMBER
MODULE


input  (AGENT_REQ_DESC+)      qpc_req$N;
output (AGENT_RESPONSE_DESC-) qpc_response$N;

input clk;
input reset;

wire (AGENT_REQ_DESC+) s0_qpc_gnt;

wire [LOG2($AGENT_NUMBER)-1:0] s0_agent_gntid;

g_arbiter #(DESC = AGENT_REQ_DESC+, AGENT_NUM = $AGENT_NUMBER, IO_CHOSEN_ID = 1) g_arbiter_agent (
   .in$N   (qpc_req$N),
   .chosen (s0_qpc_gnt),
.chosen_id(s0_agent_gntid));
wire (AGENT_REQ_DESC-) s0_qpc_gnt_post_tap;
g_tap #(DESC = AGENT_REQ_DESC-)   g_tap_pipe_entrance (
   .in         (s0_qpc_gnt),
   .out        (s0_qpc_gnt_post_tap),
   .tap_enable (1'b1)

);

/////////////////////////////////////////////////////////////////////////
/// s1 - Stall and wait for Sram array
////////////////////////////////////////////////////////////////////////



wire [LOG2($AGENT_NUMBER)-1:0] s1_agent_gntid;
wire (AGENT_REQ_DESC-)         s1_qpc_gnt;



g_ff #(INTERFACE = 2, DESC = AGENT_REQ_DESC- , DESC0 = LOG2($AGENT_NUMBER) ) g_ff_qpc_gnt_s1 (
   .ns  (s0_qpc_gnt_post_tap),
   .ps  (s1_qpc_gnt),
   .ns0 (s0_agent_gntid),
   .ps0 (s1_agent_gntid)
);



///////////////////////////////////////////
///////////////////s2 pipe stage return response and write new data to array
//////////////////////////////////////////

wire [ $DATA_WDT  -1:0] s2_qpc_old_data; // output of mem

wire (AGENT_REQ_DESC-)         s2_qpc_gnt;
wire [LOG2($AGENT_NUMBER)-1:0] s2_agent_gntid;



g_ff #(INTERFACE = 2, DESC = AGENT_REQ_DESC- , DESC0 = LOG2($AGENT_NUMBER) ) g_ff_qpc_gnt_s2 (
   .ns  ( s1_qpc_gnt),
   .ps  (s2_qpc_gnt),
   .ns0 (s1_agent_gntid),
   .ps0 (s2_agent_gntid)
);




assign IPACK(qpc_response$N.vld)       = PAD($AGENT_NUMBER-1, s2_qpc_gnt.vld) << s2_agent_gntid;
assign qpc_response$N.pre_request_data = s2_qpc_old_data;


wire [$DATA_WDT-1:0] s2_qpc_new_data =
{$DATA_WDT { (s2_qpc_gnt.command ==  COMMAND_ENUM.COMMAND_INC)      }} &  (s2_qpc_old_data + PAD($DATA_WDT-1,1'b1)) |
{$DATA_WDT { (s2_qpc_gnt.command ==  COMMAND_ENUM.COMMAND_DEC)     }} &  (s2_qpc_old_data - PAD($DATA_WDT-1,1'b1)) |
{$DATA_WDT { (s2_qpc_gnt.command ==  COMMAND_ENUM.COMMAND_RESET) }}  &   $DATA_WDT'd0 ;
// TODO: which one is better?
//g_mux #(CNT=3,DESC=$DATA_WDT ) g_mux_data_out   (
// .sel({(s2_qpc_gnt.command ==  s2_qpc_gnt.COMMAND_INC)  , (s2_qpc_gnt.command ==  s2_qpc_gnt.COMMAND_DEC)  , (s2_qpc_gnt.command == s2_qpc_gnt.COMMAND_RESET)} ),
// .in2(s2_qpc_old_data + PAD($DATA_WDT-1,1'b1)),
// .in1(s2_qpc_old_data - PAD($DATA_WDT-1,1'b1)),
// .in0($DATA_WDT'd0),
//      .out(s2_qpc_new_data) );

////////////////////////
//// S3 - bypass sampleing
////////////////////////
wire [$DATA_WDT -1:0] s3_qpc_new_data;
g_ff     #(DESC = $DATA_WDT )  g_ff_s3_bypass (
   .vld (s2_qpc_gnt.vld),
   .ns  (s2_qpc_new_data),
   .ps  (s3_qpc_new_data)
);

//// Array + FF

// TODO: add the ff inside the SRAM

wire s0s2_bypass = (  s0_qpc_gnt.addr ==       s2_qpc_gnt.addr) &   s2_qpc_gnt.vld;
wire s1s2_bypass = (  s1_qpc_gnt.addr ==       s2_qpc_gnt.addr) &   s2_qpc_gnt.vld;

reg s1s3_bypass;
always @(posedge clk)
   s1s3_bypass <= #1 s0s2_bypass;

wire [$DATA_WDT-1:0] s1_qpc_old_data_pre_bypass;
sram #(DESC = $DATA_WDT , ROWS = AGENT_REQ_DESC.NUM_OF_ADDRS , TYPE = RW, OUT_FF_TYPE = NO_FF) sram (
   .clk        (clk),
   .write_vld  ( s2_qpc_gnt.vld),
   .write_addr (s2_qpc_gnt.addr),
   .write_data (  s2_qpc_new_data),
   .read_vld   (   s0_qpc_gnt.vld & ~ s0s2_bypass),
   .read_addr  (s0_qpc_gnt.addr),
   .data_out   (    s1_qpc_old_data_pre_bypass)
);


g_ff  #(DESC = $DATA_WDT , IO_VLD = 0 )  g_ff_sram_bypass (
   .ns (
      s1s2_bypass ? s2_qpc_new_data :
      s1s3_bypass ? s3_qpc_new_data :  s1_qpc_old_data_pre_bypass
   ),
.ps(s2_qpc_old_data));