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Oct 3rd, 2010
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  1. .segment "HEADER"
  2.  
  3.     .byte        "NES", $1A        ; iNES header identifier
  4.     .byte        8                 ; UNROM has 8 16k banks
  5.     .byte        0                 ; UNROM uses CHR-RAM, so no CHR-ROM
  6.     .byte        $20, $00          ; UNROM is Mapper 2
  7.     .byte        $00               ; UNROM has no PRG RAM
  8.  
  9. .segment "CODE"
  10.  
  11. reset:
  12.  
  13.     sei                            ; Ignore IRQs
  14.     cld                            ; Disable decimal mode
  15.     ldx         #$40
  16.     stx         $4017              ; Disable APU frame IRQ
  17.     ldx         #$ff
  18.     txs                            ; Set up stack
  19.     inx                            ; Now X = 0
  20.     stx         $2000              ; Disable NMI
  21.     stx         $2001              ; Disable rendering
  22.     stx         $4010              ; Disable DMC IRQs
  23.  
  24.     ; Clear the VBLANK flag so we know that we are waiting for the
  25.     ; start of a vertical blank and not powering on with the
  26.     ; VBLANK flag spuriously set
  27.     bit         $2002
  28.  
  29.     ; First of two waits for vertical blank to make sure that the
  30.     ; PPU has stabilized
  31. @vblankwait1:
  32.  
  33.     bit        $2002
  34.     bpl        @vblankwait1
  35.  
  36.     ; We now have about 30,000 cycles to burn before the PPU stabilizes.
  37.     ; One thing we can do with this time is put RAM in a known state.
  38.     ; Here we fill it with $00, which matches what (say) a C compiler
  39.     ; expects for BSS. Conveniently, X is still 0.
  40.     txa
  41.  
  42. @clrmem:
  43.  
  44.     sta        $0000, x
  45.     sta        $0100, x
  46.     sta        $0300, x
  47.     sta        $0400, x
  48.     sta        $0500, x
  49.     sta        $0600, x
  50.     sta        $0700, x            ; Remove this if you're storing reset
  51.                                    ; persistent data
  52.     lda        #$FE
  53.     sta        $0200, x
  54.     inx
  55.     bne        @clrmem
  56.  
  57. @vblankwait2:
  58.  
  59.     bit        $2002
  60.     bpl        @vblankwait2
  61.  
  62. start:
  63.     jsr        initgraphics       ; Jump to the routine which initializes
  64.                                   ; graphics
  65. forever:
  66.  
  67.     jmp        forever            ; Jump back to forever, infinite loop
  68.  
  69.  
  70. initgraphics:
  71.     jsr        loadchrram         ; Load CHR-RAM from PRG-ROM
  72.     jsr        loadpalettes       ; Jump to palette loading routine
  73.     jsr        initsprites        ; Next, jump to sprites loading routine
  74.  
  75.     rts
  76.  
  77. loadchrram:
  78.     src        = 0
  79.     lda        #<mario_chr       ; Load the source address into a pointer
  80.                                  ; in zeropage
  81.     sta        src
  82.     lda        #>mario_chr
  83.     sta        src+1
  84.  
  85.     ldy        #0                ; Starting index into the first page
  86.     sty        $2006            ; Load the destination address into the PPU
  87.     sty        $2006
  88.     ldx        #32               ; Number of 256-byte pages to copy
  89. @loop:
  90.     lda        (src),y           ; Copy one byte
  91.     sta        $2007
  92.     iny
  93.     bne        @loop             ; repeat until we finish the page
  94.     inc        src+1             ; go to the next page
  95.     dex
  96.     bne        @loop             ; repeat until we've copied enough pages
  97.  
  98.     rts
  99.  
  100. loadpalettes:
  101.     lda        $2002        ; Read PPU status to reset the high/low latch
  102.     lda        #$3F
  103.     sta        $2006        ; Write the high byte of $3F00 address
  104.     lda        #$00
  105.     sta        $2006        ; Write the low byte of $3F00 address
  106.     ldx        #$00         ; Start out at 0
  107. @loop:
  108.     lda        palette, x   ; Load data from address
  109.                             ; (palette + the value in x)
  110.     sta        $2007        ; Write to PPU
  111.     inx                     ; X = X + 1
  112.     cpx        #$20         ; Compare to hex $20, decimal 32
  113.     bne        @loop        ; Branch to palette loading loop
  114.                             ; if compare was not equal to zero
  115.  
  116.     rts
  117.  
  118. palette:
  119.     ; Background palette
  120.     .byte     $0F, $31, $32, $33
  121.     .byte     $0F, $35, $36, $37
  122.     .byte     $0F, $39, $3A, $3B
  123.     .byte     $0F, $3D, $3E, $0F
  124.     ; Sprite palette
  125.     .byte     $0F, $16, $27, $18
  126.     .byte     $0F, $02, $38, $3C
  127.     .byte     $0F, $1C, $15, $14
  128.     .byte     $0F, $02, $38, $3C
  129.  
  130. initsprites:
  131.     ldx       #$00         ; Start at 0
  132. @loop:
  133.     lda       sprites, x    ; Load data from address (sprites + x)
  134.     sta       $0200, x      ; Store into RAM address ($0200 + x)
  135.     inx                     ; X = X + 1
  136.     cpx       #$20          ; Compare X to hex $20, decimal 32
  137.     bne       @loop         ; Branch to loading sprites loop if compare
  138.                             ; was not Equal to zero
  139.  
  140.     lda      #%10000000
  141.     sta      $2000          ; Enable NMI, sprites from Pattern Table 1
  142.  
  143.     lda      #%00010000
  144.     sta      $2001          ; Enable sprites
  145.  
  146.     rts
  147.  
  148. sprites:
  149.     ;;      vert tile attr horiz
  150.     .byte   $80, $32, $00, $80 ; sprite 0
  151.     .byte   $80, $33, $00, $88 ; sprite 1
  152.     .byte   $88, $34, $00, $80 ; sprite 2
  153.     .byte   $88, $35, $00, $88 ; sprite 3
  154.  
  155. nmi:
  156.  
  157.     lda        #$00
  158.     sta        $2003        ; Set the low byte (00) of the ram address
  159.     lda        #$02
  160.     sta        $4014        ; Set the high byte (02) of the RAM address,
  161.                             ; start the transfer
  162.  
  163. latchcontroller:
  164.  
  165.     lda       #$01
  166.     sta       $4016
  167.     lda       #$00
  168.     sta       $4016       ; Tell both the controllers to latch buttons
  169.  
  170. read_a:
  171.  
  172.     lda       $4016       ; Player 1 - A
  173.     and       #%00000001  ; Only look at bit 0
  174.     beq       @done  ; Branch to @done if button is NOT pressed (0)
  175.     lda       $0203       ; Load sprite X position
  176.     clc                   ; Make sure the carry flag is clear
  177.     adc       #$01        ; A = A + 1
  178.     sta       $0203       ; save sprite X position
  179. @done:                        ; handling this button is done
  180.  
  181. read_b:
  182.  
  183.     lda       $4016           ; Player 1 - B
  184.     and       #%00000001      ; Only look at bit 0
  185.     beq       @done     ; Branch to @done if button is NOT pressed (0)
  186.     lda       $0203           ; Load sprite X position
  187.     sec                       ; Make sure the carry flag is set
  188.     sbc       #$01            ; A = A - 1
  189.     sta       $0203           ; save sprite X position
  190. @done:                            ; handling this button is done
  191.  
  192.     rti
  193.  
  194. .segment "VECTORS"
  195.  
  196.     ; When an NMI happens (once per frame if enabled) the label nmi:
  197.     .word     nmi
  198.     ; When the processor first turns on or is reset, it will jump to the
  199.     ; label reset:
  200.     .word     reset
  201.     ; External interrupt IRQ is not used in this tutorial
  202.     .word     0
  203.  
  204. .segment "RODATA"
  205.  
  206. mario_chr:
  207.  
  208.     .incbin "mario.chr"
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