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Testing 68k MD

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Oct 21st, 2012
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Motorola 68000 HiSoft Dev 4.73 KB | None | 0 0
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  1.     dc.l 0x00FFE000
  2.     dc.l EntryPoint
  3.     dc.l Interrupt
  4.     dc.l Interrupt
  5.     dc.l Interrupt
  6.     dc.l Interrupt
  7.     dc.l Interrupt
  8.     dc.l Interrupt
  9.     dc.l Interrupt
  10.     dc.l Interrupt
  11.     dc.l Interrupt
  12.     dc.l Interrupt
  13.     dc.l Interrupt
  14.     dc.l Interrupt
  15.     dc.l Interrupt
  16.     dc.l Interrupt
  17.     dc.l Interrupt
  18.     dc.l Interrupt
  19.     dc.l Interrupt
  20.     dc.l Interrupt
  21.     dc.l Interrupt
  22.     dc.l Interrupt
  23.     dc.l Interrupt
  24.     dc.l Interrupt
  25.     dc.l Interrupt
  26.     dc.l Interrupt
  27.     dc.l Interrupt
  28.     dc.l Interrupt
  29.     dc.l HBlank
  30.     dc.l Interrupt
  31.     dc.l VBlank
  32.     dc.l Interrupt
  33.     dc.l Interrupt
  34.     dc.l Interrupt
  35.     dc.l Interrupt
  36.     dc.l Interrupt
  37.     dc.l Interrupt
  38.     dc.l Interrupt
  39.     dc.l Interrupt
  40.     dc.l Interrupt
  41.     dc.l Interrupt
  42.     dc.l Interrupt
  43.     dc.l Interrupt
  44.     dc.l Interrupt
  45.     dc.l Interrupt
  46.     dc.l Interrupt
  47.     dc.l Interrupt
  48.     dc.l Interrupt
  49.     dc.l Interrupt
  50.     dc.l Interrupt
  51.     dc.l Interrupt
  52.     dc.l Interrupt
  53.     dc.l Interrupt
  54.     dc.l Interrupt
  55.     dc.l Interrupt
  56.     dc.l Interrupt
  57.     dc.l Interrupt
  58.     dc.l Interrupt
  59.     dc.l Interrupt
  60.     dc.l Interrupt
  61.     dc.l Interrupt
  62.     dc.l Interrupt
  63.     dc.l Interrupt
  64.     dc.l Interrupt
  65.    
  66.     dc.b "SEGA MEGA DRIVE (C)AXEL 2012.OCT"
  67.     dc.b "DOMESTIC TITLE                                  "
  68.     dc.b "INTERNATIONAL TITLE                             "
  69.     dc.b "AI 01234567-89"
  70.    
  71.     dc.w 0x0000
  72.    
  73.     dc.b "J               "
  74.    
  75.     dc.l 0x00000000
  76.     dc.l __end
  77.    
  78.     dc.l 0x00FF0000
  79.     dc.l 0x00FFFFFF
  80.    
  81.     dc.l 0x00000000
  82.     dc.l 0x00000000
  83.     dc.l 0x00000000
  84.     dc.l 0x00000000
  85.     dc.l 0x00000000
  86.     dc.l 0x00000000
  87.    
  88.     dc.b "                                        "
  89.    
  90.     dc.b "JUE             "
  91.    
  92.  
  93. EntryPoint:
  94.     tst.w 0x00A10008
  95.     bne Main
  96.     tst.w 0x00A1000C
  97.     bne Main
  98.    
  99.     move.l #0x00000000, d0
  100.     move.l #0x00000000, a0
  101.     move.l #0x00003FFF, d1
  102.    
  103. @Clear:
  104.     move.l d0, -(a0)
  105.     dbra d1, @Clear
  106.    
  107.     move.b 0x00A10001, d0
  108.     andi.b #0x0F, d0
  109.     beq @Skip
  110.     move.l #'SEGA', 0x00A14000
  111. @Skip:
  112.  
  113.  
  114. InitZ80:
  115.     move.w #0x0100, 0x00A11100
  116.     move.w #0x0100, 0x00A11200
  117.    
  118. @Wait:
  119.     btst #0x0, 0x00A11100
  120.     bne @Wait
  121.    
  122.     lea Z80Data, a0
  123.     move.l #0x00A00000, a1
  124.     move.l #0x29, d0
  125. @Copy:
  126.     move.b (a0)+, (a1)+
  127.     dbra d0, @Copy
  128.    
  129.     move.w #0x0000, 0x00A11200
  130.     move.w #0x0000, 0x00A11100
  131.    
  132. Z80Data:
  133.     dc.w 0xAF01, 0xD91F
  134.     dc.w 0x1127, 0x0021
  135.     dc.w 0x2600, 0xF977
  136.     dc.w 0xEDB0, 0xDDE1
  137.     dc.w 0xFDE1, 0xED47
  138.     dc.w 0xED4F, 0xD1E1
  139.     dc.w 0xF108, 0xD9C1
  140.     dc.w 0xD1E1, 0xF1F9
  141.     dc.w 0xF3ED, 0x5636
  142.     dc.w 0xE9E9, 0x8104
  143.     dc.w 0x8F01
  144.    
  145.    
  146. InitPSG:
  147.     lea PSGData, a0
  148.     move.l #0x03, d0
  149.    
  150. @Copy:
  151.     move.b (a0)+, 0x00C00011
  152.     dbra d0, @Copy
  153.    
  154. PSGData:
  155.     dc.w 0x9FBF, 0xDFFF
  156.    
  157.    
  158. InitVDP:
  159.     lea VDPRegisters, a0
  160.     move.l #0x18, d0
  161.     move.l #0x00008000, d1
  162. @Copy:
  163.     move.b (a0)+, d1
  164.     move.w d1, 0x00C00004
  165.     add.w #0x0100, d1
  166.     dbra d0, @Copy
  167.    
  168. VDPRegisters:
  169.     dc.b 0x14       ; 0001 0100 Bit 2 is always 1, HBlank enabled
  170.     dc.b 0x74       ; 0111 0100 Bit 2 set = Mega Drive mode = always, DMA enabled, VBlank enabled, Display enabled
  171.     dc.b 0x30       ; 0011 0000 Plane A NT located at 0x30 * 0x400 = 0xC000
  172.     dc.b 0x40       ; 0100 0000 Window NT located at 0x40 * 0x400 = 0x10000
  173.     dc.b 0x05       ; 0000 0101 Plane B NT located at 0x05 * 0x2000 = 0xA000
  174.     dc.b 0x70       ; 0111 0000 Sprite Attribute Table located at 0x70 * 0x200 = 0xE000
  175.     dc.b 0x00       ; 0000 0000 Unused
  176.     dc.b 0x00       ; 0000 0000 BG Colour, bits 4-5 is the palette, bits 0-3 is the colour
  177.     dc.b 0x00       ; 0000 0000 Unused
  178.     dc.b 0x00       ; 0000 0000 Unused
  179.     dc.b 0x00       ; 0000 0000 Bits 0-7 is what scanline you want your HBlank on
  180.     dc.b 0x08       ; 0000 1000 External interrupts enabled, H/V scrolling enabled
  181.     dc.b 0x81       ; 1000 0001 Bits 0 and 7 controll the same thing and thus shold be the same. 40 tile wide display, no interlace
  182.     dc.b 0x34   ; 0011 0100 Bits 0-5 controls where the HScroll data is stored, 0x34 * 0x400 = 0xD000
  183.     dc.b 0x00       ; 0000 0000 Unused
  184.     dc.b 0x00   ; 0000 0000 Auto-increment after VRAM access off
  185.     dc.b 0x01       ; 0000 0001 Plane size, bits 0-1 sets the vertical size for plane A and B, bits 4-5 horizontal. 00 = 32 tiles, 01 = 64 tiles, 10 = Unused, 11 = 128 tiles
  186.     dc.b 0x00       ; 0000 0000
  187.     dc.b 0x00       ; 0000 0000
  188.     dc.b 0x00       ; 0000 0000
  189.     dc.b 0x00       ; 0000 0000
  190.     dc.b 0x00       ; 0000 0000
  191.     dc.b 0x00       ; 0000 0000
  192.     dc.b 0x00       ; 0000 0000
  193.    
  194.    
  195.     move.b #0x00, 0x00A10009
  196.     move.b #0x00, 0x00A1000B
  197.     move.b #0x00, 0x00A1000D
  198.  
  199.  
  200.     move.l #0x00000000, a0
  201.     movem.l (a0), d0-d7/a1-a7
  202.  
  203.  
  204.     move.w #0x2700, sr
  205.  
  206.  
  207.     move.w #0x8F02, 0x00C00004
  208.     lea Palette, a0
  209.     move.l #0x07, d0
  210. @Loop:
  211.     move.l (a0)+, 0x00C00000
  212.     dbra d0, @Loop
  213.    
  214.     move.w #0x8708, 0x00C00004
  215.    
  216.  
  217.    
  218. Main:
  219.  
  220.     jmp Main
  221.    
  222. HBlank:
  223. VBlank:
  224. Interrupt:
  225.     rte
  226.    
  227.    
  228.    
  229. Palette:
  230.     dc.w 0x0000
  231.     dc.w 0x000E
  232.     dc.w 0x00E0
  233.     dc.w 0x0E00
  234.     dc.w 0x0000
  235.     dc.w 0x0EEE
  236.     dc.w 0x00EE
  237.     dc.w 0x008E
  238.     dc.w 0x0E0E
  239.     dc.w 0x0808
  240.     dc.w 0x0444
  241.     dc.w 0x0888
  242.     dc.w 0x0EE0
  243.     dc.w 0x000A
  244.     dc.w 0x0600
  245.     dc.w 0x0060
  246.    
  247.  
  248. __end:
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